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-rw-r--r--include/linux/dmaengine.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 40cd75e21ea2..03a1febe8740 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -387,7 +387,7 @@ enum dma_residue_granularity {
387/* struct dma_slave_caps - expose capabilities of a slave channel only 387/* struct dma_slave_caps - expose capabilities of a slave channel only
388 * 388 *
389 * @src_addr_widths: bit mask of src addr widths the channel supports 389 * @src_addr_widths: bit mask of src addr widths the channel supports
390 * @dstn_addr_widths: bit mask of dstn addr widths the channel supports 390 * @dst_addr_widths: bit mask of dstn addr widths the channel supports
391 * @directions: bit mask of slave direction the channel supported 391 * @directions: bit mask of slave direction the channel supported
392 * since the enum dma_transfer_direction is not defined as bits for each 392 * since the enum dma_transfer_direction is not defined as bits for each
393 * type of direction, the dma controller should fill (1 << <TYPE>) and same 393 * type of direction, the dma controller should fill (1 << <TYPE>) and same
@@ -398,7 +398,7 @@ enum dma_residue_granularity {
398 */ 398 */
399struct dma_slave_caps { 399struct dma_slave_caps {
400 u32 src_addr_widths; 400 u32 src_addr_widths;
401 u32 dstn_addr_widths; 401 u32 dst_addr_widths;
402 u32 directions; 402 u32 directions;
403 bool cmd_pause; 403 bool cmd_pause;
404 bool cmd_terminate; 404 bool cmd_terminate;
@@ -639,10 +639,10 @@ struct dma_device {
639 void (*device_free_chan_resources)(struct dma_chan *chan); 639 void (*device_free_chan_resources)(struct dma_chan *chan);
640 640
641 struct dma_async_tx_descriptor *(*device_prep_dma_memcpy)( 641 struct dma_async_tx_descriptor *(*device_prep_dma_memcpy)(
642 struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, 642 struct dma_chan *chan, dma_addr_t dst, dma_addr_t src,
643 size_t len, unsigned long flags); 643 size_t len, unsigned long flags);
644 struct dma_async_tx_descriptor *(*device_prep_dma_xor)( 644 struct dma_async_tx_descriptor *(*device_prep_dma_xor)(
645 struct dma_chan *chan, dma_addr_t dest, dma_addr_t *src, 645 struct dma_chan *chan, dma_addr_t dst, dma_addr_t *src,
646 unsigned int src_cnt, size_t len, unsigned long flags); 646 unsigned int src_cnt, size_t len, unsigned long flags);
647 struct dma_async_tx_descriptor *(*device_prep_dma_xor_val)( 647 struct dma_async_tx_descriptor *(*device_prep_dma_xor_val)(
648 struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt, 648 struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt,