diff options
Diffstat (limited to 'include/linux/dmaengine.h')
| -rw-r--r-- | include/linux/dmaengine.h | 62 |
1 files changed, 52 insertions, 10 deletions
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h index c73f1e2b59b7..2e2aa3df170c 100644 --- a/include/linux/dmaengine.h +++ b/include/linux/dmaengine.h | |||
| @@ -23,9 +23,6 @@ | |||
| 23 | 23 | ||
| 24 | #include <linux/device.h> | 24 | #include <linux/device.h> |
| 25 | #include <linux/uio.h> | 25 | #include <linux/uio.h> |
| 26 | #include <linux/kref.h> | ||
| 27 | #include <linux/completion.h> | ||
| 28 | #include <linux/rcupdate.h> | ||
| 29 | #include <linux/dma-mapping.h> | 26 | #include <linux/dma-mapping.h> |
| 30 | 27 | ||
| 31 | /** | 28 | /** |
| @@ -97,7 +94,6 @@ typedef struct { DECLARE_BITMAP(bits, DMA_TX_TYPE_END); } dma_cap_mask_t; | |||
| 97 | 94 | ||
| 98 | /** | 95 | /** |
| 99 | * struct dma_chan_percpu - the per-CPU part of struct dma_chan | 96 | * struct dma_chan_percpu - the per-CPU part of struct dma_chan |
| 100 | * @refcount: local_t used for open-coded "bigref" counting | ||
| 101 | * @memcpy_count: transaction counter | 97 | * @memcpy_count: transaction counter |
| 102 | * @bytes_transferred: byte counter | 98 | * @bytes_transferred: byte counter |
| 103 | */ | 99 | */ |
| @@ -114,13 +110,11 @@ struct dma_chan_percpu { | |||
| 114 | * @cookie: last cookie value returned to client | 110 | * @cookie: last cookie value returned to client |
| 115 | * @chan_id: channel ID for sysfs | 111 | * @chan_id: channel ID for sysfs |
| 116 | * @dev: class device for sysfs | 112 | * @dev: class device for sysfs |
| 117 | * @refcount: kref, used in "bigref" slow-mode | ||
| 118 | * @slow_ref: indicates that the DMA channel is free | ||
| 119 | * @rcu: the DMA channel's RCU head | ||
| 120 | * @device_node: used to add this to the device chan list | 113 | * @device_node: used to add this to the device chan list |
| 121 | * @local: per-cpu pointer to a struct dma_chan_percpu | 114 | * @local: per-cpu pointer to a struct dma_chan_percpu |
| 122 | * @client-count: how many clients are using this channel | 115 | * @client-count: how many clients are using this channel |
| 123 | * @table_count: number of appearances in the mem-to-mem allocation table | 116 | * @table_count: number of appearances in the mem-to-mem allocation table |
| 117 | * @private: private data for certain client-channel associations | ||
| 124 | */ | 118 | */ |
| 125 | struct dma_chan { | 119 | struct dma_chan { |
| 126 | struct dma_device *device; | 120 | struct dma_device *device; |
| @@ -134,6 +128,7 @@ struct dma_chan { | |||
| 134 | struct dma_chan_percpu *local; | 128 | struct dma_chan_percpu *local; |
| 135 | int client_count; | 129 | int client_count; |
| 136 | int table_count; | 130 | int table_count; |
| 131 | void *private; | ||
| 137 | }; | 132 | }; |
| 138 | 133 | ||
| 139 | /** | 134 | /** |
| @@ -207,12 +202,11 @@ struct dma_async_tx_descriptor { | |||
| 207 | /** | 202 | /** |
| 208 | * struct dma_device - info on the entity supplying DMA services | 203 | * struct dma_device - info on the entity supplying DMA services |
| 209 | * @chancnt: how many DMA channels are supported | 204 | * @chancnt: how many DMA channels are supported |
| 205 | * @privatecnt: how many DMA channels are requested by dma_request_channel | ||
| 210 | * @channels: the list of struct dma_chan | 206 | * @channels: the list of struct dma_chan |
| 211 | * @global_node: list_head for global dma_device_list | 207 | * @global_node: list_head for global dma_device_list |
| 212 | * @cap_mask: one or more dma_capability flags | 208 | * @cap_mask: one or more dma_capability flags |
| 213 | * @max_xor: maximum number of xor sources, 0 if no capability | 209 | * @max_xor: maximum number of xor sources, 0 if no capability |
| 214 | * @refcount: reference count | ||
| 215 | * @done: IO completion struct | ||
| 216 | * @dev_id: unique device ID | 210 | * @dev_id: unique device ID |
| 217 | * @dev: struct device reference for dma mapping api | 211 | * @dev: struct device reference for dma mapping api |
| 218 | * @device_alloc_chan_resources: allocate resources and return the | 212 | * @device_alloc_chan_resources: allocate resources and return the |
| @@ -225,11 +219,13 @@ struct dma_async_tx_descriptor { | |||
| 225 | * @device_prep_dma_interrupt: prepares an end of chain interrupt operation | 219 | * @device_prep_dma_interrupt: prepares an end of chain interrupt operation |
| 226 | * @device_prep_slave_sg: prepares a slave dma operation | 220 | * @device_prep_slave_sg: prepares a slave dma operation |
| 227 | * @device_terminate_all: terminate all pending operations | 221 | * @device_terminate_all: terminate all pending operations |
| 222 | * @device_is_tx_complete: poll for transaction completion | ||
| 228 | * @device_issue_pending: push pending transactions to hardware | 223 | * @device_issue_pending: push pending transactions to hardware |
| 229 | */ | 224 | */ |
| 230 | struct dma_device { | 225 | struct dma_device { |
| 231 | 226 | ||
| 232 | unsigned int chancnt; | 227 | unsigned int chancnt; |
| 228 | unsigned int privatecnt; | ||
| 233 | struct list_head channels; | 229 | struct list_head channels; |
| 234 | struct list_head global_node; | 230 | struct list_head global_node; |
| 235 | dma_cap_mask_t cap_mask; | 231 | dma_cap_mask_t cap_mask; |
| @@ -282,6 +278,36 @@ static inline void dmaengine_put(void) | |||
| 282 | } | 278 | } |
| 283 | #endif | 279 | #endif |
| 284 | 280 | ||
| 281 | #ifdef CONFIG_NET_DMA | ||
| 282 | #define net_dmaengine_get() dmaengine_get() | ||
| 283 | #define net_dmaengine_put() dmaengine_put() | ||
| 284 | #else | ||
| 285 | static inline void net_dmaengine_get(void) | ||
| 286 | { | ||
| 287 | } | ||
| 288 | static inline void net_dmaengine_put(void) | ||
| 289 | { | ||
| 290 | } | ||
| 291 | #endif | ||
| 292 | |||
| 293 | #ifdef CONFIG_ASYNC_TX_DMA | ||
| 294 | #define async_dmaengine_get() dmaengine_get() | ||
| 295 | #define async_dmaengine_put() dmaengine_put() | ||
| 296 | #define async_dma_find_channel(type) dma_find_channel(type) | ||
| 297 | #else | ||
| 298 | static inline void async_dmaengine_get(void) | ||
| 299 | { | ||
| 300 | } | ||
| 301 | static inline void async_dmaengine_put(void) | ||
| 302 | { | ||
| 303 | } | ||
| 304 | static inline struct dma_chan * | ||
| 305 | async_dma_find_channel(enum dma_transaction_type type) | ||
| 306 | { | ||
| 307 | return NULL; | ||
| 308 | } | ||
| 309 | #endif | ||
| 310 | |||
| 285 | dma_cookie_t dma_async_memcpy_buf_to_buf(struct dma_chan *chan, | 311 | dma_cookie_t dma_async_memcpy_buf_to_buf(struct dma_chan *chan, |
| 286 | void *dest, void *src, size_t len); | 312 | void *dest, void *src, size_t len); |
| 287 | dma_cookie_t dma_async_memcpy_buf_to_pg(struct dma_chan *chan, | 313 | dma_cookie_t dma_async_memcpy_buf_to_pg(struct dma_chan *chan, |
| @@ -297,6 +323,11 @@ static inline void async_tx_ack(struct dma_async_tx_descriptor *tx) | |||
| 297 | tx->flags |= DMA_CTRL_ACK; | 323 | tx->flags |= DMA_CTRL_ACK; |
| 298 | } | 324 | } |
| 299 | 325 | ||
| 326 | static inline void async_tx_clear_ack(struct dma_async_tx_descriptor *tx) | ||
| 327 | { | ||
| 328 | tx->flags &= ~DMA_CTRL_ACK; | ||
| 329 | } | ||
| 330 | |||
| 300 | static inline bool async_tx_test_ack(struct dma_async_tx_descriptor *tx) | 331 | static inline bool async_tx_test_ack(struct dma_async_tx_descriptor *tx) |
| 301 | { | 332 | { |
| 302 | return (tx->flags & DMA_CTRL_ACK) == DMA_CTRL_ACK; | 333 | return (tx->flags & DMA_CTRL_ACK) == DMA_CTRL_ACK; |
| @@ -323,6 +354,13 @@ __dma_cap_set(enum dma_transaction_type tx_type, dma_cap_mask_t *dstp) | |||
| 323 | set_bit(tx_type, dstp->bits); | 354 | set_bit(tx_type, dstp->bits); |
| 324 | } | 355 | } |
| 325 | 356 | ||
| 357 | #define dma_cap_clear(tx, mask) __dma_cap_clear((tx), &(mask)) | ||
| 358 | static inline void | ||
| 359 | __dma_cap_clear(enum dma_transaction_type tx_type, dma_cap_mask_t *dstp) | ||
| 360 | { | ||
| 361 | clear_bit(tx_type, dstp->bits); | ||
| 362 | } | ||
| 363 | |||
| 326 | #define dma_cap_zero(mask) __dma_cap_zero(&(mask)) | 364 | #define dma_cap_zero(mask) __dma_cap_zero(&(mask)) |
| 327 | static inline void __dma_cap_zero(dma_cap_mask_t *dstp) | 365 | static inline void __dma_cap_zero(dma_cap_mask_t *dstp) |
| 328 | { | 366 | { |
| @@ -400,11 +438,16 @@ static inline enum dma_status dma_async_is_complete(dma_cookie_t cookie, | |||
| 400 | enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie); | 438 | enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie); |
| 401 | #ifdef CONFIG_DMA_ENGINE | 439 | #ifdef CONFIG_DMA_ENGINE |
| 402 | enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx); | 440 | enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx); |
| 441 | void dma_issue_pending_all(void); | ||
| 403 | #else | 442 | #else |
| 404 | static inline enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx) | 443 | static inline enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx) |
| 405 | { | 444 | { |
| 406 | return DMA_SUCCESS; | 445 | return DMA_SUCCESS; |
| 407 | } | 446 | } |
| 447 | static inline void dma_issue_pending_all(void) | ||
| 448 | { | ||
| 449 | do { } while (0); | ||
| 450 | } | ||
| 408 | #endif | 451 | #endif |
| 409 | 452 | ||
| 410 | /* --- DMA device --- */ | 453 | /* --- DMA device --- */ |
| @@ -413,7 +456,6 @@ int dma_async_device_register(struct dma_device *device); | |||
| 413 | void dma_async_device_unregister(struct dma_device *device); | 456 | void dma_async_device_unregister(struct dma_device *device); |
| 414 | void dma_run_dependencies(struct dma_async_tx_descriptor *tx); | 457 | void dma_run_dependencies(struct dma_async_tx_descriptor *tx); |
| 415 | struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type); | 458 | struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type); |
| 416 | void dma_issue_pending_all(void); | ||
| 417 | #define dma_request_channel(mask, x, y) __dma_request_channel(&(mask), x, y) | 459 | #define dma_request_channel(mask, x, y) __dma_request_channel(&(mask), x, y) |
| 418 | struct dma_chan *__dma_request_channel(dma_cap_mask_t *mask, dma_filter_fn fn, void *fn_param); | 460 | struct dma_chan *__dma_request_channel(dma_cap_mask_t *mask, dma_filter_fn fn, void *fn_param); |
| 419 | void dma_release_channel(struct dma_chan *chan); | 461 | void dma_release_channel(struct dma_chan *chan); |
