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1/*
2 * linux/include/linux/clk-provider.h
3 *
4 * Copyright (c) 2010-2011 Jeremy Kerr <jeremy.kerr@canonical.com>
5 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef __LINUX_CLK_PROVIDER_H
12#define __LINUX_CLK_PROVIDER_H
13
14#include <linux/clk.h>
15
16#ifdef CONFIG_COMMON_CLK
17
18/**
19 * struct clk_hw - handle for traversing from a struct clk to its corresponding
20 * hardware-specific structure. struct clk_hw should be declared within struct
21 * clk_foo and then referenced by the struct clk instance that uses struct
22 * clk_foo's clk_ops
23 *
24 * clk: pointer to the struct clk instance that points back to this struct
25 * clk_hw instance
26 */
27struct clk_hw {
28 struct clk *clk;
29};
30
31/*
32 * flags used across common struct clk. these flags should only affect the
33 * top-level framework. custom flags for dealing with hardware specifics
34 * belong in struct clk_foo
35 */
36#define CLK_SET_RATE_GATE BIT(0) /* must be gated across rate change */
37#define CLK_SET_PARENT_GATE BIT(1) /* must be gated across re-parent */
38#define CLK_SET_RATE_PARENT BIT(2) /* propagate rate change up one level */
39#define CLK_IGNORE_UNUSED BIT(3) /* do not gate even if unused */
40#define CLK_IS_ROOT BIT(4) /* root clk, has no parent */
41
42/**
43 * struct clk_ops - Callback operations for hardware clocks; these are to
44 * be provided by the clock implementation, and will be called by drivers
45 * through the clk_* api.
46 *
47 * @prepare: Prepare the clock for enabling. This must not return until
48 * the clock is fully prepared, and it's safe to call clk_enable.
49 * This callback is intended to allow clock implementations to
50 * do any initialisation that may sleep. Called with
51 * prepare_lock held.
52 *
53 * @unprepare: Release the clock from its prepared state. This will typically
54 * undo any work done in the @prepare callback. Called with
55 * prepare_lock held.
56 *
57 * @enable: Enable the clock atomically. This must not return until the
58 * clock is generating a valid clock signal, usable by consumer
59 * devices. Called with enable_lock held. This function must not
60 * sleep.
61 *
62 * @disable: Disable the clock atomically. Called with enable_lock held.
63 * This function must not sleep.
64 *
65 * @recalc_rate Recalculate the rate of this clock, by quering hardware. The
66 * parent rate is an input parameter. It is up to the caller to
67 * insure that the prepare_mutex is held across this call.
68 * Returns the calculated rate. Optional, but recommended - if
69 * this op is not set then clock rate will be initialized to 0.
70 *
71 * @round_rate: Given a target rate as input, returns the closest rate actually
72 * supported by the clock.
73 *
74 * @get_parent: Queries the hardware to determine the parent of a clock. The
75 * return value is a u8 which specifies the index corresponding to
76 * the parent clock. This index can be applied to either the
77 * .parent_names or .parents arrays. In short, this function
78 * translates the parent value read from hardware into an array
79 * index. Currently only called when the clock is initialized by
80 * __clk_init. This callback is mandatory for clocks with
81 * multiple parents. It is optional (and unnecessary) for clocks
82 * with 0 or 1 parents.
83 *
84 * @set_parent: Change the input source of this clock; for clocks with multiple
85 * possible parents specify a new parent by passing in the index
86 * as a u8 corresponding to the parent in either the .parent_names
87 * or .parents arrays. This function in affect translates an
88 * array index into the value programmed into the hardware.
89 * Returns 0 on success, -EERROR otherwise.
90 *
91 * @set_rate: Change the rate of this clock. If this callback returns
92 * CLK_SET_RATE_PARENT, the rate change will be propagated to the
93 * parent clock (which may propagate again if the parent clock
94 * also sets this flag). The requested rate of the parent is
95 * passed back from the callback in the second 'unsigned long *'
96 * argument. Note that it is up to the hardware clock's set_rate
97 * implementation to insure that clocks do not run out of spec
98 * when propgating the call to set_rate up to the parent. One way
99 * to do this is to gate the clock (via clk_disable and/or
100 * clk_unprepare) before calling clk_set_rate, then ungating it
101 * afterward. If your clock also has the CLK_GATE_SET_RATE flag
102 * set then this will insure safety. Returns 0 on success,
103 * -EERROR otherwise.
104 *
105 * The clk_enable/clk_disable and clk_prepare/clk_unprepare pairs allow
106 * implementations to split any work between atomic (enable) and sleepable
107 * (prepare) contexts. If enabling a clock requires code that might sleep,
108 * this must be done in clk_prepare. Clock enable code that will never be
109 * called in a sleepable context may be implement in clk_enable.
110 *
111 * Typically, drivers will call clk_prepare when a clock may be needed later
112 * (eg. when a device is opened), and clk_enable when the clock is actually
113 * required (eg. from an interrupt). Note that clk_prepare MUST have been
114 * called before clk_enable.
115 */
116struct clk_ops {
117 int (*prepare)(struct clk_hw *hw);
118 void (*unprepare)(struct clk_hw *hw);
119 int (*enable)(struct clk_hw *hw);
120 void (*disable)(struct clk_hw *hw);
121 int (*is_enabled)(struct clk_hw *hw);
122 unsigned long (*recalc_rate)(struct clk_hw *hw,
123 unsigned long parent_rate);
124 long (*round_rate)(struct clk_hw *hw, unsigned long,
125 unsigned long *);
126 int (*set_parent)(struct clk_hw *hw, u8 index);
127 u8 (*get_parent)(struct clk_hw *hw);
128 int (*set_rate)(struct clk_hw *hw, unsigned long);
129 void (*init)(struct clk_hw *hw);
130};
131
132
133/**
134 * clk_register - allocate a new clock, register it and return an opaque cookie
135 * @dev: device that is registering this clock
136 * @name: clock name
137 * @ops: operations this clock supports
138 * @hw: link to hardware-specific clock data
139 * @parent_names: array of string names for all possible parents
140 * @num_parents: number of possible parents
141 * @flags: framework-level hints and quirks
142 *
143 * clk_register is the primary interface for populating the clock tree with new
144 * clock nodes. It returns a pointer to the newly allocated struct clk which
145 * cannot be dereferenced by driver code but may be used in conjuction with the
146 * rest of the clock API.
147 */
148struct clk *clk_register(struct device *dev, const char *name,
149 const struct clk_ops *ops, struct clk_hw *hw,
150 char **parent_names, u8 num_parents, unsigned long flags);
151
152/* helper functions */
153const char *__clk_get_name(struct clk *clk);
154struct clk_hw *__clk_get_hw(struct clk *clk);
155u8 __clk_get_num_parents(struct clk *clk);
156struct clk *__clk_get_parent(struct clk *clk);
157inline int __clk_get_enable_count(struct clk *clk);
158inline int __clk_get_prepare_count(struct clk *clk);
159unsigned long __clk_get_rate(struct clk *clk);
160unsigned long __clk_get_flags(struct clk *clk);
161int __clk_is_enabled(struct clk *clk);
162struct clk *__clk_lookup(const char *name);
163
164/*
165 * FIXME clock api without lock protection
166 */
167int __clk_prepare(struct clk *clk);
168void __clk_unprepare(struct clk *clk);
169void __clk_reparent(struct clk *clk, struct clk *new_parent);
170unsigned long __clk_round_rate(struct clk *clk, unsigned long rate);
171
172#endif /* CONFIG_COMMON_CLK */
173#endif /* CLK_PROVIDER_H */