diff options
Diffstat (limited to 'include/linux/bcma/bcma_driver_chipcommon.h')
-rw-r--r-- | include/linux/bcma/bcma_driver_chipcommon.h | 51 |
1 files changed, 50 insertions, 1 deletions
diff --git a/include/linux/bcma/bcma_driver_chipcommon.h b/include/linux/bcma/bcma_driver_chipcommon.h index fbd0d49dc4d2..3c80885fa829 100644 --- a/include/linux/bcma/bcma_driver_chipcommon.h +++ b/include/linux/bcma/bcma_driver_chipcommon.h | |||
@@ -24,7 +24,7 @@ | |||
24 | #define BCMA_CC_FLASHT_NONE 0x00000000 /* No flash */ | 24 | #define BCMA_CC_FLASHT_NONE 0x00000000 /* No flash */ |
25 | #define BCMA_CC_FLASHT_STSER 0x00000100 /* ST serial flash */ | 25 | #define BCMA_CC_FLASHT_STSER 0x00000100 /* ST serial flash */ |
26 | #define BCMA_CC_FLASHT_ATSER 0x00000200 /* Atmel serial flash */ | 26 | #define BCMA_CC_FLASHT_ATSER 0x00000200 /* Atmel serial flash */ |
27 | #define BCMA_CC_FLASHT_NFLASH 0x00000200 | 27 | #define BCMA_CC_FLASHT_NFLASH 0x00000200 /* NAND flash */ |
28 | #define BCMA_CC_FLASHT_PARA 0x00000700 /* Parallel flash */ | 28 | #define BCMA_CC_FLASHT_PARA 0x00000700 /* Parallel flash */ |
29 | #define BCMA_CC_CAP_PLLT 0x00038000 /* PLL Type */ | 29 | #define BCMA_CC_CAP_PLLT 0x00038000 /* PLL Type */ |
30 | #define BCMA_PLLTYPE_NONE 0x00000000 | 30 | #define BCMA_PLLTYPE_NONE 0x00000000 |
@@ -45,6 +45,7 @@ | |||
45 | #define BCMA_CC_CAP_PMU 0x10000000 /* PMU available (rev >= 20) */ | 45 | #define BCMA_CC_CAP_PMU 0x10000000 /* PMU available (rev >= 20) */ |
46 | #define BCMA_CC_CAP_ECI 0x20000000 /* ECI available (rev >= 20) */ | 46 | #define BCMA_CC_CAP_ECI 0x20000000 /* ECI available (rev >= 20) */ |
47 | #define BCMA_CC_CAP_SPROM 0x40000000 /* SPROM present */ | 47 | #define BCMA_CC_CAP_SPROM 0x40000000 /* SPROM present */ |
48 | #define BCMA_CC_CAP_NFLASH 0x80000000 /* NAND flash present (rev >= 35 or BCM4706?) */ | ||
48 | #define BCMA_CC_CORECTL 0x0008 | 49 | #define BCMA_CC_CORECTL 0x0008 |
49 | #define BCMA_CC_CORECTL_UARTCLK0 0x00000001 /* Drive UART with internal clock */ | 50 | #define BCMA_CC_CORECTL_UARTCLK0 0x00000001 /* Drive UART with internal clock */ |
50 | #define BCMA_CC_CORECTL_SE 0x00000002 /* sync clk out enable (corerev >= 3) */ | 51 | #define BCMA_CC_CORECTL_SE 0x00000002 /* sync clk out enable (corerev >= 3) */ |
@@ -122,10 +123,58 @@ | |||
122 | #define BCMA_CC_JCTL_EXT_EN 2 /* Enable external targets */ | 123 | #define BCMA_CC_JCTL_EXT_EN 2 /* Enable external targets */ |
123 | #define BCMA_CC_JCTL_EN 1 /* Enable Jtag master */ | 124 | #define BCMA_CC_JCTL_EN 1 /* Enable Jtag master */ |
124 | #define BCMA_CC_FLASHCTL 0x0040 | 125 | #define BCMA_CC_FLASHCTL 0x0040 |
126 | /* Start/busy bit in flashcontrol */ | ||
127 | #define BCMA_CC_FLASHCTL_OPCODE 0x000000ff | ||
128 | #define BCMA_CC_FLASHCTL_ACTION 0x00000700 | ||
129 | #define BCMA_CC_FLASHCTL_CS_ACTIVE 0x00001000 /* Chip Select Active, rev >= 20 */ | ||
125 | #define BCMA_CC_FLASHCTL_START 0x80000000 | 130 | #define BCMA_CC_FLASHCTL_START 0x80000000 |
126 | #define BCMA_CC_FLASHCTL_BUSY BCMA_CC_FLASHCTL_START | 131 | #define BCMA_CC_FLASHCTL_BUSY BCMA_CC_FLASHCTL_START |
132 | /* Flashcontrol action + opcodes for ST flashes */ | ||
133 | #define BCMA_CC_FLASHCTL_ST_WREN 0x0006 /* Write Enable */ | ||
134 | #define BCMA_CC_FLASHCTL_ST_WRDIS 0x0004 /* Write Disable */ | ||
135 | #define BCMA_CC_FLASHCTL_ST_RDSR 0x0105 /* Read Status Register */ | ||
136 | #define BCMA_CC_FLASHCTL_ST_WRSR 0x0101 /* Write Status Register */ | ||
137 | #define BCMA_CC_FLASHCTL_ST_READ 0x0303 /* Read Data Bytes */ | ||
138 | #define BCMA_CC_FLASHCTL_ST_PP 0x0302 /* Page Program */ | ||
139 | #define BCMA_CC_FLASHCTL_ST_SE 0x02d8 /* Sector Erase */ | ||
140 | #define BCMA_CC_FLASHCTL_ST_BE 0x00c7 /* Bulk Erase */ | ||
141 | #define BCMA_CC_FLASHCTL_ST_DP 0x00b9 /* Deep Power-down */ | ||
142 | #define BCMA_CC_FLASHCTL_ST_RES 0x03ab /* Read Electronic Signature */ | ||
143 | #define BCMA_CC_FLASHCTL_ST_CSA 0x1000 /* Keep chip select asserted */ | ||
144 | #define BCMA_CC_FLASHCTL_ST_SSE 0x0220 /* Sub-sector Erase */ | ||
145 | /* Flashcontrol action + opcodes for Atmel flashes */ | ||
146 | #define BCMA_CC_FLASHCTL_AT_READ 0x07e8 | ||
147 | #define BCMA_CC_FLASHCTL_AT_PAGE_READ 0x07d2 | ||
148 | #define BCMA_CC_FLASHCTL_AT_STATUS 0x01d7 | ||
149 | #define BCMA_CC_FLASHCTL_AT_BUF1_WRITE 0x0384 | ||
150 | #define BCMA_CC_FLASHCTL_AT_BUF2_WRITE 0x0387 | ||
151 | #define BCMA_CC_FLASHCTL_AT_BUF1_ERASE_PROGRAM 0x0283 | ||
152 | #define BCMA_CC_FLASHCTL_AT_BUF2_ERASE_PROGRAM 0x0286 | ||
153 | #define BCMA_CC_FLASHCTL_AT_BUF1_PROGRAM 0x0288 | ||
154 | #define BCMA_CC_FLASHCTL_AT_BUF2_PROGRAM 0x0289 | ||
155 | #define BCMA_CC_FLASHCTL_AT_PAGE_ERASE 0x0281 | ||
156 | #define BCMA_CC_FLASHCTL_AT_BLOCK_ERASE 0x0250 | ||
157 | #define BCMA_CC_FLASHCTL_AT_BUF1_WRITE_ERASE_PROGRAM 0x0382 | ||
158 | #define BCMA_CC_FLASHCTL_AT_BUF2_WRITE_ERASE_PROGRAM 0x0385 | ||
159 | #define BCMA_CC_FLASHCTL_AT_BUF1_LOAD 0x0253 | ||
160 | #define BCMA_CC_FLASHCTL_AT_BUF2_LOAD 0x0255 | ||
161 | #define BCMA_CC_FLASHCTL_AT_BUF1_COMPARE 0x0260 | ||
162 | #define BCMA_CC_FLASHCTL_AT_BUF2_COMPARE 0x0261 | ||
163 | #define BCMA_CC_FLASHCTL_AT_BUF1_REPROGRAM 0x0258 | ||
164 | #define BCMA_CC_FLASHCTL_AT_BUF2_REPROGRAM 0x0259 | ||
127 | #define BCMA_CC_FLASHADDR 0x0044 | 165 | #define BCMA_CC_FLASHADDR 0x0044 |
128 | #define BCMA_CC_FLASHDATA 0x0048 | 166 | #define BCMA_CC_FLASHDATA 0x0048 |
167 | /* Status register bits for ST flashes */ | ||
168 | #define BCMA_CC_FLASHDATA_ST_WIP 0x01 /* Write In Progress */ | ||
169 | #define BCMA_CC_FLASHDATA_ST_WEL 0x02 /* Write Enable Latch */ | ||
170 | #define BCMA_CC_FLASHDATA_ST_BP_MASK 0x1c /* Block Protect */ | ||
171 | #define BCMA_CC_FLASHDATA_ST_BP_SHIFT 2 | ||
172 | #define BCMA_CC_FLASHDATA_ST_SRWD 0x80 /* Status Register Write Disable */ | ||
173 | /* Status register bits for Atmel flashes */ | ||
174 | #define BCMA_CC_FLASHDATA_AT_READY 0x80 | ||
175 | #define BCMA_CC_FLASHDATA_AT_MISMATCH 0x40 | ||
176 | #define BCMA_CC_FLASHDATA_AT_ID_MASK 0x38 | ||
177 | #define BCMA_CC_FLASHDATA_AT_ID_SHIFT 3 | ||
129 | #define BCMA_CC_BCAST_ADDR 0x0050 | 178 | #define BCMA_CC_BCAST_ADDR 0x0050 |
130 | #define BCMA_CC_BCAST_DATA 0x0054 | 179 | #define BCMA_CC_BCAST_DATA 0x0054 |
131 | #define BCMA_CC_GPIOPULLUP 0x0058 /* Rev >= 20 only */ | 180 | #define BCMA_CC_GPIOPULLUP 0x0058 /* Rev >= 20 only */ |