diff options
Diffstat (limited to 'include/linux/bcma/bcma_driver_chipcommon.h')
| -rw-r--r-- | include/linux/bcma/bcma_driver_chipcommon.h | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/include/linux/bcma/bcma_driver_chipcommon.h b/include/linux/bcma/bcma_driver_chipcommon.h index e72938b10714..8bbfe31fbac8 100644 --- a/include/linux/bcma/bcma_driver_chipcommon.h +++ b/include/linux/bcma/bcma_driver_chipcommon.h | |||
| @@ -56,6 +56,9 @@ | |||
| 56 | #define BCMA_CC_OTPS_HW_PROTECT 0x00000001 | 56 | #define BCMA_CC_OTPS_HW_PROTECT 0x00000001 |
| 57 | #define BCMA_CC_OTPS_SW_PROTECT 0x00000002 | 57 | #define BCMA_CC_OTPS_SW_PROTECT 0x00000002 |
| 58 | #define BCMA_CC_OTPS_CID_PROTECT 0x00000004 | 58 | #define BCMA_CC_OTPS_CID_PROTECT 0x00000004 |
| 59 | #define BCMA_CC_OTPS_GU_PROG_IND 0x00000F00 /* General Use programmed indication */ | ||
| 60 | #define BCMA_CC_OTPS_GU_PROG_IND_SHIFT 8 | ||
| 61 | #define BCMA_CC_OTPS_GU_PROG_HW 0x00000100 /* HW region programmed */ | ||
| 59 | #define BCMA_CC_OTPC 0x0014 /* OTP control */ | 62 | #define BCMA_CC_OTPC 0x0014 /* OTP control */ |
| 60 | #define BCMA_CC_OTPC_RECWAIT 0xFF000000 | 63 | #define BCMA_CC_OTPC_RECWAIT 0xFF000000 |
| 61 | #define BCMA_CC_OTPC_PROGWAIT 0x00FFFF00 | 64 | #define BCMA_CC_OTPC_PROGWAIT 0x00FFFF00 |
| @@ -72,6 +75,8 @@ | |||
| 72 | #define BCMA_CC_OTPP_READ 0x40000000 | 75 | #define BCMA_CC_OTPP_READ 0x40000000 |
| 73 | #define BCMA_CC_OTPP_START 0x80000000 | 76 | #define BCMA_CC_OTPP_START 0x80000000 |
| 74 | #define BCMA_CC_OTPP_BUSY 0x80000000 | 77 | #define BCMA_CC_OTPP_BUSY 0x80000000 |
| 78 | #define BCMA_CC_OTPL 0x001C /* OTP layout */ | ||
| 79 | #define BCMA_CC_OTPL_GURGN_OFFSET 0x00000FFF /* offset of general use region */ | ||
| 75 | #define BCMA_CC_IRQSTAT 0x0020 | 80 | #define BCMA_CC_IRQSTAT 0x0020 |
| 76 | #define BCMA_CC_IRQMASK 0x0024 | 81 | #define BCMA_CC_IRQMASK 0x0024 |
| 77 | #define BCMA_CC_IRQ_GPIO 0x00000001 /* gpio intr */ | 82 | #define BCMA_CC_IRQ_GPIO 0x00000001 /* gpio intr */ |
| @@ -79,6 +84,10 @@ | |||
| 79 | #define BCMA_CC_IRQ_WDRESET 0x80000000 /* watchdog reset occurred */ | 84 | #define BCMA_CC_IRQ_WDRESET 0x80000000 /* watchdog reset occurred */ |
| 80 | #define BCMA_CC_CHIPCTL 0x0028 /* Rev >= 11 only */ | 85 | #define BCMA_CC_CHIPCTL 0x0028 /* Rev >= 11 only */ |
| 81 | #define BCMA_CC_CHIPSTAT 0x002C /* Rev >= 11 only */ | 86 | #define BCMA_CC_CHIPSTAT 0x002C /* Rev >= 11 only */ |
| 87 | #define BCMA_CC_CHIPST_4313_SPROM_PRESENT 1 | ||
| 88 | #define BCMA_CC_CHIPST_4313_OTP_PRESENT 2 | ||
| 89 | #define BCMA_CC_CHIPST_4331_SPROM_PRESENT 2 | ||
| 90 | #define BCMA_CC_CHIPST_4331_OTP_PRESENT 4 | ||
| 82 | #define BCMA_CC_JCMD 0x0030 /* Rev >= 10 only */ | 91 | #define BCMA_CC_JCMD 0x0030 /* Rev >= 10 only */ |
| 83 | #define BCMA_CC_JCMD_START 0x80000000 | 92 | #define BCMA_CC_JCMD_START 0x80000000 |
| 84 | #define BCMA_CC_JCMD_BUSY 0x80000000 | 93 | #define BCMA_CC_JCMD_BUSY 0x80000000 |
| @@ -256,7 +265,6 @@ | |||
| 256 | #define BCMA_CC_PLLCTL_ADDR 0x0660 | 265 | #define BCMA_CC_PLLCTL_ADDR 0x0660 |
| 257 | #define BCMA_CC_PLLCTL_DATA 0x0664 | 266 | #define BCMA_CC_PLLCTL_DATA 0x0664 |
| 258 | #define BCMA_CC_SPROM 0x0800 /* SPROM beginning */ | 267 | #define BCMA_CC_SPROM 0x0800 /* SPROM beginning */ |
| 259 | #define BCMA_CC_SPROM_PCIE6 0x0830 /* SPROM beginning on PCIe rev >= 6 */ | ||
| 260 | 268 | ||
| 261 | /* Divider allocation in 4716/47162/5356 */ | 269 | /* Divider allocation in 4716/47162/5356 */ |
| 262 | #define BCMA_CC_PMU5_MAINPLL_CPU 1 | 270 | #define BCMA_CC_PMU5_MAINPLL_CPU 1 |