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Diffstat (limited to 'include/asm-xtensa/io.h')
-rw-r--r-- | include/asm-xtensa/io.h | 200 |
1 files changed, 0 insertions, 200 deletions
diff --git a/include/asm-xtensa/io.h b/include/asm-xtensa/io.h deleted file mode 100644 index 07b7299dab20..000000000000 --- a/include/asm-xtensa/io.h +++ /dev/null | |||
@@ -1,200 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-xtensa/io.h | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | * | ||
8 | * Copyright (C) 2001 - 2005 Tensilica Inc. | ||
9 | */ | ||
10 | |||
11 | #ifndef _XTENSA_IO_H | ||
12 | #define _XTENSA_IO_H | ||
13 | |||
14 | #ifdef __KERNEL__ | ||
15 | #include <asm/byteorder.h> | ||
16 | #include <asm/page.h> | ||
17 | #include <linux/kernel.h> | ||
18 | |||
19 | #include <linux/types.h> | ||
20 | |||
21 | #define XCHAL_KIO_CACHED_VADDR 0xe0000000 | ||
22 | #define XCHAL_KIO_BYPASS_VADDR 0xf0000000 | ||
23 | #define XCHAL_KIO_PADDR 0xf0000000 | ||
24 | #define XCHAL_KIO_SIZE 0x10000000 | ||
25 | |||
26 | #define IOADDR(x) (XCHAL_KIO_BYPASS_VADDR + (x)) | ||
27 | |||
28 | /* | ||
29 | * swap functions to change byte order from little-endian to big-endian and | ||
30 | * vice versa. | ||
31 | */ | ||
32 | |||
33 | static inline unsigned short _swapw (unsigned short v) | ||
34 | { | ||
35 | return (v << 8) | (v >> 8); | ||
36 | } | ||
37 | |||
38 | static inline unsigned int _swapl (unsigned int v) | ||
39 | { | ||
40 | return (v << 24) | ((v & 0xff00) << 8) | ((v >> 8) & 0xff00) | (v >> 24); | ||
41 | } | ||
42 | |||
43 | /* | ||
44 | * Change virtual addresses to physical addresses and vv. | ||
45 | * These are trivial on the 1:1 Linux/Xtensa mapping | ||
46 | */ | ||
47 | |||
48 | static inline unsigned long virt_to_phys(volatile void * address) | ||
49 | { | ||
50 | return __pa(address); | ||
51 | } | ||
52 | |||
53 | static inline void * phys_to_virt(unsigned long address) | ||
54 | { | ||
55 | return __va(address); | ||
56 | } | ||
57 | |||
58 | /* | ||
59 | * virt_to_bus and bus_to_virt are deprecated. | ||
60 | */ | ||
61 | |||
62 | #define virt_to_bus(x) virt_to_phys(x) | ||
63 | #define bus_to_virt(x) phys_to_virt(x) | ||
64 | |||
65 | /* | ||
66 | * Return the virtual (cached) address for the specified bus memory. | ||
67 | * Note that we currently don't support any address outside the KIO segment. | ||
68 | */ | ||
69 | |||
70 | static inline void *ioremap(unsigned long offset, unsigned long size) | ||
71 | { | ||
72 | if (offset >= XCHAL_KIO_PADDR | ||
73 | && offset < XCHAL_KIO_PADDR + XCHAL_KIO_SIZE) | ||
74 | return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_BYPASS_VADDR); | ||
75 | |||
76 | else | ||
77 | BUG(); | ||
78 | } | ||
79 | |||
80 | static inline void *ioremap_nocache(unsigned long offset, unsigned long size) | ||
81 | { | ||
82 | if (offset >= XCHAL_KIO_PADDR | ||
83 | && offset < XCHAL_KIO_PADDR + XCHAL_KIO_SIZE) | ||
84 | return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_CACHED_VADDR); | ||
85 | else | ||
86 | BUG(); | ||
87 | } | ||
88 | |||
89 | static inline void iounmap(void *addr) | ||
90 | { | ||
91 | } | ||
92 | |||
93 | /* | ||
94 | * Generic I/O | ||
95 | */ | ||
96 | |||
97 | #define readb(addr) \ | ||
98 | ({ unsigned char __v = (*(volatile unsigned char *)(addr)); __v; }) | ||
99 | #define readw(addr) \ | ||
100 | ({ unsigned short __v = (*(volatile unsigned short *)(addr)); __v; }) | ||
101 | #define readl(addr) \ | ||
102 | ({ unsigned int __v = (*(volatile unsigned int *)(addr)); __v; }) | ||
103 | #define writeb(b, addr) (void)((*(volatile unsigned char *)(addr)) = (b)) | ||
104 | #define writew(b, addr) (void)((*(volatile unsigned short *)(addr)) = (b)) | ||
105 | #define writel(b, addr) (void)((*(volatile unsigned int *)(addr)) = (b)) | ||
106 | |||
107 | static inline __u8 __raw_readb(const volatile void __iomem *addr) | ||
108 | { | ||
109 | return *(__force volatile __u8 *)(addr); | ||
110 | } | ||
111 | static inline __u16 __raw_readw(const volatile void __iomem *addr) | ||
112 | { | ||
113 | return *(__force volatile __u16 *)(addr); | ||
114 | } | ||
115 | static inline __u32 __raw_readl(const volatile void __iomem *addr) | ||
116 | { | ||
117 | return *(__force volatile __u32 *)(addr); | ||
118 | } | ||
119 | static inline void __raw_writeb(__u8 b, volatile void __iomem *addr) | ||
120 | { | ||
121 | *(__force volatile __u8 *)(addr) = b; | ||
122 | } | ||
123 | static inline void __raw_writew(__u16 b, volatile void __iomem *addr) | ||
124 | { | ||
125 | *(__force volatile __u16 *)(addr) = b; | ||
126 | } | ||
127 | static inline void __raw_writel(__u32 b, volatile void __iomem *addr) | ||
128 | { | ||
129 | *(__force volatile __u32 *)(addr) = b; | ||
130 | } | ||
131 | |||
132 | /* These are the definitions for the x86 IO instructions | ||
133 | * inb/inw/inl/outb/outw/outl, the "string" versions | ||
134 | * insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions | ||
135 | * inb_p/inw_p/... | ||
136 | * The macros don't do byte-swapping. | ||
137 | */ | ||
138 | |||
139 | #define inb(port) readb((u8 *)((port))) | ||
140 | #define outb(val, port) writeb((val),(u8 *)((unsigned long)(port))) | ||
141 | #define inw(port) readw((u16 *)((port))) | ||
142 | #define outw(val, port) writew((val),(u16 *)((unsigned long)(port))) | ||
143 | #define inl(port) readl((u32 *)((port))) | ||
144 | #define outl(val, port) writel((val),(u32 *)((unsigned long)(port))) | ||
145 | |||
146 | #define inb_p(port) inb((port)) | ||
147 | #define outb_p(val, port) outb((val), (port)) | ||
148 | #define inw_p(port) inw((port)) | ||
149 | #define outw_p(val, port) outw((val), (port)) | ||
150 | #define inl_p(port) inl((port)) | ||
151 | #define outl_p(val, port) outl((val), (port)) | ||
152 | |||
153 | extern void insb (unsigned long port, void *dst, unsigned long count); | ||
154 | extern void insw (unsigned long port, void *dst, unsigned long count); | ||
155 | extern void insl (unsigned long port, void *dst, unsigned long count); | ||
156 | extern void outsb (unsigned long port, const void *src, unsigned long count); | ||
157 | extern void outsw (unsigned long port, const void *src, unsigned long count); | ||
158 | extern void outsl (unsigned long port, const void *src, unsigned long count); | ||
159 | |||
160 | #define IO_SPACE_LIMIT ~0 | ||
161 | |||
162 | #define memset_io(a,b,c) memset((void *)(a),(b),(c)) | ||
163 | #define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c)) | ||
164 | #define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c)) | ||
165 | |||
166 | /* At this point the Xtensa doesn't provide byte swap instructions */ | ||
167 | |||
168 | #ifdef __XTENSA_EB__ | ||
169 | # define in_8(addr) (*(u8*)(addr)) | ||
170 | # define in_le16(addr) _swapw(*(u16*)(addr)) | ||
171 | # define in_le32(addr) _swapl(*(u32*)(addr)) | ||
172 | # define out_8(b, addr) *(u8*)(addr) = (b) | ||
173 | # define out_le16(b, addr) *(u16*)(addr) = _swapw(b) | ||
174 | # define out_le32(b, addr) *(u32*)(addr) = _swapl(b) | ||
175 | #elif defined(__XTENSA_EL__) | ||
176 | # define in_8(addr) (*(u8*)(addr)) | ||
177 | # define in_le16(addr) (*(u16*)(addr)) | ||
178 | # define in_le32(addr) (*(u32*)(addr)) | ||
179 | # define out_8(b, addr) *(u8*)(addr) = (b) | ||
180 | # define out_le16(b, addr) *(u16*)(addr) = (b) | ||
181 | # define out_le32(b, addr) *(u32*)(addr) = (b) | ||
182 | #else | ||
183 | # error processor byte order undefined! | ||
184 | #endif | ||
185 | |||
186 | |||
187 | /* | ||
188 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem access | ||
189 | */ | ||
190 | #define xlate_dev_mem_ptr(p) __va(p) | ||
191 | |||
192 | /* | ||
193 | * Convert a virtual cached pointer to an uncached pointer | ||
194 | */ | ||
195 | #define xlate_dev_kmem_ptr(p) p | ||
196 | |||
197 | |||
198 | #endif /* __KERNEL__ */ | ||
199 | |||
200 | #endif /* _XTENSA_IO_H */ | ||