diff options
Diffstat (limited to 'include/asm-x86_64/ipi.h')
-rw-r--r-- | include/asm-x86_64/ipi.h | 61 |
1 files changed, 36 insertions, 25 deletions
diff --git a/include/asm-x86_64/ipi.h b/include/asm-x86_64/ipi.h index 2a5c162b7d92..a7c75ea408a8 100644 --- a/include/asm-x86_64/ipi.h +++ b/include/asm-x86_64/ipi.h | |||
@@ -18,10 +18,8 @@ | |||
18 | * Subject to the GNU Public License, v.2 | 18 | * Subject to the GNU Public License, v.2 |
19 | */ | 19 | */ |
20 | 20 | ||
21 | #include <asm/fixmap.h> | ||
22 | #include <asm/hw_irq.h> | 21 | #include <asm/hw_irq.h> |
23 | #include <asm/apicdef.h> | 22 | #include <asm/apic.h> |
24 | #include <asm/genapic.h> | ||
25 | 23 | ||
26 | /* | 24 | /* |
27 | * the following functions deal with sending IPIs between CPUs. | 25 | * the following functions deal with sending IPIs between CPUs. |
@@ -76,10 +74,42 @@ static inline void __send_IPI_shortcut(unsigned int shortcut, int vector, unsign | |||
76 | apic_write(APIC_ICR, cfg); | 74 | apic_write(APIC_ICR, cfg); |
77 | } | 75 | } |
78 | 76 | ||
77 | /* | ||
78 | * This is used to send an IPI with no shorthand notation (the destination is | ||
79 | * specified in bits 56 to 63 of the ICR). | ||
80 | */ | ||
81 | static inline void __send_IPI_dest_field(unsigned int mask, int vector, unsigned int dest) | ||
82 | { | ||
83 | unsigned long cfg; | ||
84 | |||
85 | /* | ||
86 | * Wait for idle. | ||
87 | */ | ||
88 | if (unlikely(vector == NMI_VECTOR)) | ||
89 | safe_apic_wait_icr_idle(); | ||
90 | else | ||
91 | apic_wait_icr_idle(); | ||
92 | |||
93 | /* | ||
94 | * prepare target chip field | ||
95 | */ | ||
96 | cfg = __prepare_ICR2(mask); | ||
97 | apic_write(APIC_ICR2, cfg); | ||
98 | |||
99 | /* | ||
100 | * program the ICR | ||
101 | */ | ||
102 | cfg = __prepare_ICR(0, vector, dest); | ||
103 | |||
104 | /* | ||
105 | * Send the IPI. The write to APIC_ICR fires this off. | ||
106 | */ | ||
107 | apic_write(APIC_ICR, cfg); | ||
108 | } | ||
79 | 109 | ||
80 | static inline void send_IPI_mask_sequence(cpumask_t mask, int vector) | 110 | static inline void send_IPI_mask_sequence(cpumask_t mask, int vector) |
81 | { | 111 | { |
82 | unsigned long cfg, flags; | 112 | unsigned long flags; |
83 | unsigned long query_cpu; | 113 | unsigned long query_cpu; |
84 | 114 | ||
85 | /* | 115 | /* |
@@ -88,28 +118,9 @@ static inline void send_IPI_mask_sequence(cpumask_t mask, int vector) | |||
88 | * - mbligh | 118 | * - mbligh |
89 | */ | 119 | */ |
90 | local_irq_save(flags); | 120 | local_irq_save(flags); |
91 | |||
92 | for_each_cpu_mask(query_cpu, mask) { | 121 | for_each_cpu_mask(query_cpu, mask) { |
93 | /* | 122 | __send_IPI_dest_field(x86_cpu_to_apicid[query_cpu], |
94 | * Wait for idle. | 123 | vector, APIC_DEST_PHYSICAL); |
95 | */ | ||
96 | apic_wait_icr_idle(); | ||
97 | |||
98 | /* | ||
99 | * prepare target chip field | ||
100 | */ | ||
101 | cfg = __prepare_ICR2(x86_cpu_to_apicid[query_cpu]); | ||
102 | apic_write(APIC_ICR2, cfg); | ||
103 | |||
104 | /* | ||
105 | * program the ICR | ||
106 | */ | ||
107 | cfg = __prepare_ICR(0, vector, APIC_DEST_PHYSICAL); | ||
108 | |||
109 | /* | ||
110 | * Send the IPI. The write to APIC_ICR fires this off. | ||
111 | */ | ||
112 | apic_write(APIC_ICR, cfg); | ||
113 | } | 124 | } |
114 | local_irq_restore(flags); | 125 | local_irq_restore(flags); |
115 | } | 126 | } |