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-rw-r--r--include/asm-x86/acpi.h2
-rw-r--r--include/asm-x86/cpufeature.h1
-rw-r--r--include/asm-x86/idle.h2
-rw-r--r--include/asm-x86/kgdb.h24
4 files changed, 16 insertions, 13 deletions
diff --git a/include/asm-x86/acpi.h b/include/asm-x86/acpi.h
index 635d764dc13e..35d1743b57ac 100644
--- a/include/asm-x86/acpi.h
+++ b/include/asm-x86/acpi.h
@@ -140,6 +140,8 @@ static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
140 boot_cpu_data.x86_model <= 0x05 && 140 boot_cpu_data.x86_model <= 0x05 &&
141 boot_cpu_data.x86_mask < 0x0A) 141 boot_cpu_data.x86_mask < 0x0A)
142 return 1; 142 return 1;
143 else if (boot_cpu_has(X86_FEATURE_AMDC1E))
144 return 1;
143 else 145 else
144 return max_cstate; 146 return max_cstate;
145} 147}
diff --git a/include/asm-x86/cpufeature.h b/include/asm-x86/cpufeature.h
index 9489283a4bcf..cfcfb0a806ba 100644
--- a/include/asm-x86/cpufeature.h
+++ b/include/asm-x86/cpufeature.h
@@ -81,6 +81,7 @@
81#define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* Lfence synchronizes RDTSC */ 81#define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* Lfence synchronizes RDTSC */
82#define X86_FEATURE_11AP (3*32+19) /* Bad local APIC aka 11AP */ 82#define X86_FEATURE_11AP (3*32+19) /* Bad local APIC aka 11AP */
83#define X86_FEATURE_NOPL (3*32+20) /* The NOPL (0F 1F) instructions */ 83#define X86_FEATURE_NOPL (3*32+20) /* The NOPL (0F 1F) instructions */
84#define X86_FEATURE_AMDC1E (3*32+21) /* AMD C1E detected */
84 85
85/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ 86/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
86#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ 87#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
diff --git a/include/asm-x86/idle.h b/include/asm-x86/idle.h
index d240e5b30a45..cbb649123612 100644
--- a/include/asm-x86/idle.h
+++ b/include/asm-x86/idle.h
@@ -10,4 +10,6 @@ void idle_notifier_register(struct notifier_block *n);
10void enter_idle(void); 10void enter_idle(void);
11void exit_idle(void); 11void exit_idle(void);
12 12
13void c1e_remove_cpu(int cpu);
14
13#endif 15#endif
diff --git a/include/asm-x86/kgdb.h b/include/asm-x86/kgdb.h
index 484c47554f3b..94d63db10365 100644
--- a/include/asm-x86/kgdb.h
+++ b/include/asm-x86/kgdb.h
@@ -39,12 +39,13 @@ enum regnames {
39 GDB_FS, /* 14 */ 39 GDB_FS, /* 14 */
40 GDB_GS, /* 15 */ 40 GDB_GS, /* 15 */
41}; 41};
42#define NUMREGBYTES ((GDB_GS+1)*4)
42#else /* ! CONFIG_X86_32 */ 43#else /* ! CONFIG_X86_32 */
43enum regnames { 44enum regnames64 {
44 GDB_AX, /* 0 */ 45 GDB_AX, /* 0 */
45 GDB_DX, /* 1 */ 46 GDB_BX, /* 1 */
46 GDB_CX, /* 2 */ 47 GDB_CX, /* 2 */
47 GDB_BX, /* 3 */ 48 GDB_DX, /* 3 */
48 GDB_SI, /* 4 */ 49 GDB_SI, /* 4 */
49 GDB_DI, /* 5 */ 50 GDB_DI, /* 5 */
50 GDB_BP, /* 6 */ 51 GDB_BP, /* 6 */
@@ -58,18 +59,15 @@ enum regnames {
58 GDB_R14, /* 14 */ 59 GDB_R14, /* 14 */
59 GDB_R15, /* 15 */ 60 GDB_R15, /* 15 */
60 GDB_PC, /* 16 */ 61 GDB_PC, /* 16 */
61 GDB_PS, /* 17 */
62}; 62};
63#endif /* CONFIG_X86_32 */
64 63
65/* 64enum regnames32 {
66 * Number of bytes of registers: 65 GDB_PS = 34,
67 */ 66 GDB_CS,
68#ifdef CONFIG_X86_32 67 GDB_SS,
69# define NUMREGBYTES 64 68};
70#else 69#define NUMREGBYTES ((GDB_SS+1)*4)
71# define NUMREGBYTES ((GDB_PS+1)*8) 70#endif /* CONFIG_X86_32 */
72#endif
73 71
74static inline void arch_kgdb_breakpoint(void) 72static inline void arch_kgdb_breakpoint(void)
75{ 73{