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-rw-r--r--include/asm-x86/mpspec.h36
1 files changed, 32 insertions, 4 deletions
diff --git a/include/asm-x86/mpspec.h b/include/asm-x86/mpspec.h
index 57a991b9c053..b6995e567fcc 100644
--- a/include/asm-x86/mpspec.h
+++ b/include/asm-x86/mpspec.h
@@ -13,6 +13,12 @@ extern int apic_version[MAX_APICS];
13extern u8 apicid_2_node[]; 13extern u8 apicid_2_node[];
14extern int pic_mode; 14extern int pic_mode;
15 15
16#ifdef CONFIG_X86_NUMAQ
17extern int mp_bus_id_to_node[MAX_MP_BUSSES];
18extern int mp_bus_id_to_local[MAX_MP_BUSSES];
19extern int quad_local_to_mp_bus_id [NR_CPUS/4][4];
20#endif
21
16#define MAX_APICID 256 22#define MAX_APICID 256
17 23
18#else 24#else
@@ -21,26 +27,30 @@ extern int pic_mode;
21/* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */ 27/* Each PCI slot may be a combo card with its own bus. 4 IRQ pins per slot. */
22#define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4) 28#define MAX_IRQ_SOURCES (MAX_MP_BUSSES * 4)
23 29
30#endif
31
24extern void early_find_smp_config(void); 32extern void early_find_smp_config(void);
25extern void early_get_smp_config(void); 33extern void early_get_smp_config(void);
26 34
27#endif
28
29#if defined(CONFIG_MCA) || defined(CONFIG_EISA) 35#if defined(CONFIG_MCA) || defined(CONFIG_EISA)
30extern int mp_bus_id_to_type[MAX_MP_BUSSES]; 36extern int mp_bus_id_to_type[MAX_MP_BUSSES];
31#endif 37#endif
32 38
33extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES); 39extern DECLARE_BITMAP(mp_bus_not_pci, MAX_MP_BUSSES);
34 40
35extern int mp_bus_id_to_pci_bus[MAX_MP_BUSSES];
36
37extern unsigned int boot_cpu_physical_apicid; 41extern unsigned int boot_cpu_physical_apicid;
42extern unsigned int max_physical_apicid;
38extern int smp_found_config; 43extern int smp_found_config;
39extern int mpc_default_type; 44extern int mpc_default_type;
40extern unsigned long mp_lapic_addr; 45extern unsigned long mp_lapic_addr;
41 46
42extern void find_smp_config(void); 47extern void find_smp_config(void);
43extern void get_smp_config(void); 48extern void get_smp_config(void);
49#ifdef CONFIG_X86_MPPARSE
50extern void early_reserve_e820_mpc_new(void);
51#else
52static inline void early_reserve_e820_mpc_new(void) { }
53#endif
44 54
45void __cpuinit generic_processor_info(int apicid, int version); 55void __cpuinit generic_processor_info(int apicid, int version);
46#ifdef CONFIG_ACPI 56#ifdef CONFIG_ACPI
@@ -49,6 +59,17 @@ extern void mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
49 u32 gsi); 59 u32 gsi);
50extern void mp_config_acpi_legacy_irqs(void); 60extern void mp_config_acpi_legacy_irqs(void);
51extern int mp_register_gsi(u32 gsi, int edge_level, int active_high_low); 61extern int mp_register_gsi(u32 gsi, int edge_level, int active_high_low);
62#ifdef CONFIG_X86_IO_APIC
63extern int mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
64 u32 gsi, int triggering, int polarity);
65#else
66static inline int
67mp_config_acpi_gsi(unsigned char number, unsigned int devfn, u8 pin,
68 u32 gsi, int triggering, int polarity)
69{
70 return 0;
71}
72#endif
52#endif /* CONFIG_ACPI */ 73#endif /* CONFIG_ACPI */
53 74
54#define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS) 75#define PHYSID_ARRAY_SIZE BITS_TO_LONGS(MAX_APICS)
@@ -101,6 +122,7 @@ typedef struct physid_mask physid_mask_t;
101 __physid_mask; \ 122 __physid_mask; \
102 }) 123 })
103 124
125/* Note: will create very large stack frames if physid_mask_t is big */
104#define physid_mask_of_physid(physid) \ 126#define physid_mask_of_physid(physid) \
105 ({ \ 127 ({ \
106 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \ 128 physid_mask_t __physid_mask = PHYSID_MASK_NONE; \
@@ -108,6 +130,12 @@ typedef struct physid_mask physid_mask_t;
108 __physid_mask; \ 130 __physid_mask; \
109 }) 131 })
110 132
133static inline void physid_set_mask_of_physid(int physid, physid_mask_t *map)
134{
135 physids_clear(*map);
136 physid_set(physid, *map);
137}
138
111#define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} } 139#define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
112#define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} } 140#define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
113 141