litmus-rt.git - The LITMUS^RT kernel.

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Diffstat (limited to 'include/asm-um/cache.h')

-rw-r--r--

1 files changed, 0 insertions, 3 deletions


diff --git a/include/asm-um/cache.h b/include/asm-um/cache.h index a10602a5b2d6..3d0587075521 100644 --- a/include/asm-um/cache.h +++ b/include/asm-um/cache.h
@@ -13,9 +13,6 @@
13	# define L1_CACHE_SHIFT 5	13	# define L1_CACHE_SHIFT 5
14	#endif	14	#endif
15		15
16	/* XXX: this is valid for x86 and x86_64. */
17	#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */
18
19	#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)	16	#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
20		17
21	#endif	18	#endif

#include <linux/types.h> #include <asm/delay.h> #include <irq.h> #include <hwregs/intr_vect.h> #include <hwregs/intr_vect_defs.h> #include <asm/tlbflush.h> #include <asm/mmu_context.h> #include <hwregs/asm/mmu_defs_asm.h> #include <hwregs/supp_reg.h> #include <linux/atomic.h> #include <linux/err.h> #include <linux/init.h> #include <linux/timex.h> #include <linux/sched.h> #include <linux/kernel.h> #include <linux/cpumask.h> #include <linux/interrupt.h> #include <linux/module.h> #define IPI_SCHEDULE 1 #define IPI_CALL 2 #define IPI_FLUSH_TLB 4 #define IPI_BOOT 8 #define FLUSH_ALL (void*)0xffffffff /* Vector of locks used for various atomic operations */ spinlock_t cris_atomic_locks[] = { [0 ... LOCK_COUNT - 1] = __SPIN_LOCK_UNLOCKED(cris_atomic_locks) }; /* CPU masks */ cpumask_t phys_cpu_present_map = CPU_MASK_NONE; EXPORT_SYMBOL(phys_cpu_present_map); /* Variables used during SMP boot */ volatile int cpu_now_booting = 0; volatile struct thread_info *smp_init_current_idle_thread; /* Variables used during IPI */ static DEFINE_SPINLOCK(call_lock); static DEFINE_SPINLOCK(tlbstate_lock); struct call_data_struct { void (*func) (void *info); void *info; int wait; }; static struct call_data_struct * call_data; static struct mm_struct* flush_mm; static struct vm_area_struct* flush_vma; static unsigned long flush_addr; /* Mode registers */ static unsigned long irq_regs[NR_CPUS] = { regi_irq, regi_irq2 }; static irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id); static int send_ipi(int vector, int wait, cpumask_t cpu_mask); static struct irqaction irq_ipi = { .handler = crisv32_ipi_interrupt, .flags = IRQF_DISABLED, .name = "ipi", }; extern void cris_mmu_init(void); extern void cris_timer_init(void); /* SMP initialization */ void __init smp_prepare_cpus(unsigned int max_cpus) { int i; /* From now on we can expect IPIs so set them up */ setup_irq(IPI_INTR_VECT, &irq_ipi); /* Mark all possible CPUs as present */ for (i = 0; i < max_cpus; i++) cpumask_set_cpu(i, &phys_cpu_present_map); } void __devinit smp_prepare_boot_cpu(void) { /* PGD pointer has moved after per_cpu initialization so * update the MMU. */ pgd_t **pgd; pgd = (pgd_t**)&per_cpu(current_pgd, smp_processor_id()); SUPP_BANK_SEL(1); SUPP_REG_WR(RW_MM_TLB_PGD, pgd); SUPP_BANK_SEL(2); SUPP_REG_WR(RW_MM_TLB_PGD, pgd); set_cpu_online(0, true); cpumask_set_cpu(0, &phys_cpu_present_map); set_cpu_possible(0, true); } void __init smp_cpus_done(unsigned int max_cpus) { } /* Bring one cpu online.*/ static int __init smp_boot_one_cpu(int cpuid, struct task_struct idle) { unsigned timeout; cpumask_t cpu_mask; cpumask_clear(&cpu_mask); task_thread_info(idle)->cpu = cpuid; /* Information to the CPU that is about to boot */ smp_init_current_idle_thread = task_thread_info(idle); cpu_now_booting = cpuid; /* Kick it */ set_cpu_online(cpuid, true); cpumask_set_cpu(cpuid, &cpu_mask); send_ipi(IPI_BOOT, 0, cpu_mask); set_cpu_online(cpuid, false); /* Wait for CPU to come online */ for (timeout = 0; timeout < 10000; timeout++) { if(cpu_online(cpuid)) { cpu_now_booting = 0; smp_init_current_idle_thread = NULL; return 0; /* CPU online */ } udelay(100); barrier(); } printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid); return -1; } /* Secondary CPUs starts using C here. Here we need to setup CPU * specific stuff such as the local timer and the MMU. */ void __init smp_callin(void) { extern void cpu_idle(void); int cpu = cpu_now_booting; reg_intr_vect_rw_mask vect_mask = {0}; /* Initialise the idle task for this CPU */ atomic_inc(&init_mm.mm_count); current->active_mm = &init_mm; /* Set up MMU */ cris_mmu_init(); __flush_tlb_all();


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