1 files changed, 0 insertions, 73 deletions
diff --git a/include/asm-mn10300/intctl-regs.h b/include/asm-mn10300/intctl-regs.h
deleted file mode 100644
index ba544c796c5a..000000000000
--- a/include/asm-mn10300/intctl-regs.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/* MN10300 On-board interrupt controller registers
- *
- * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
- * Written by David Howells (dhowells@redhat.com)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public Licence
- * as published by the Free Software Foundation; either version
- * 2 of the Licence, or (at your option) any later version.
- */
-#ifndef _ASM_INTCTL_REGS_H
-#define _ASM_INTCTL_REGS_H
-#include <asm/cpu-regs.h>
-#ifdef __KERNEL__
-/* interrupt controller registers */
-#define GxICR(X)                __SYSREG(0xd4000000 + (X) * 4, u16)     /* group irq ctrl regs */
-#define IAGR                    __SYSREG(0xd4000100, u16)       /* intr acceptance group reg */
-#define IAGR_GN                 0x00fc          /* group number register
-                                                 * (documentation _has_ to be wrong)
-                                                 */
-#define EXTMD                   __SYSREG(0xd4000200, u16)       /* external pin intr spec reg */
-#define GET_XIRQ_TRIGGER(X) ((EXTMD >> ((X) * 2)) & 3)
-#define SET_XIRQ_TRIGGER(X,Y)                   \
-do {                                            \
-        u16 x = EXTMD;                          \
-        x &= ~(3 << ((X) * 2));                 \
-        x |= ((Y) & 3) << ((X) * 2);            \
-        EXTMD = x;                              \
-} while (0)
-#define XIRQ_TRIGGER_LOWLEVEL   0
-#define XIRQ_TRIGGER_HILEVEL    1
-#define XIRQ_TRIGGER_NEGEDGE    2
-#define XIRQ_TRIGGER_POSEDGE    3
-/* non-maskable interrupt control */
-#define NMIIRQ                  0
-#define NMICR                   GxICR(NMIIRQ)   /* NMI control register */
-#define NMICR_NMIF              0x0001          /* NMI pin interrupt flag */
-#define NMICR_WDIF              0x0002          /* watchdog timer overflow flag */
-#define NMICR_ABUSERR           0x0008          /* async bus error flag */
-/* maskable interrupt control */
-#define GxICR_DETECT            0x0001          /* interrupt detect flag */
-#define GxICR_REQUEST           0x0010          /* interrupt request flag */
-#define GxICR_ENABLE            0x0100          /* interrupt enable flag */
-#define GxICR_LEVEL             0x7000          /* interrupt priority level */
-#define GxICR_LEVEL_0           0x0000          /* - level 0 */
-#define GxICR_LEVEL_1           0x1000          /* - level 1 */
-#define GxICR_LEVEL_2           0x2000          /* - level 2 */
-#define GxICR_LEVEL_3           0x3000          /* - level 3 */
-#define GxICR_LEVEL_4           0x4000          /* - level 4 */
-#define GxICR_LEVEL_5           0x5000          /* - level 5 */
-#define GxICR_LEVEL_6           0x6000          /* - level 6 */
-#define GxICR_LEVEL_SHIFT       12
-#ifndef __ASSEMBLY__
-extern void set_intr_level(int irq, u16 level);
-extern void set_intr_postackable(int irq);
-#endif
-/* external interrupts */
-#define XIRQxICR(X)             GxICR((X))      /* external interrupt control regs */
-#endif /* __KERNEL__ */
-#endif /* _ASM_INTCTL_REGS_H */

diff --git a/include/asm-mn10300/intctl-regs.h b/include/asm-mn10300/intctl-regs.h deleted file mode 100644 index ba544c796c5a..000000000000 --- a/include/asm-mn10300/intctl-regs.h +++ /dev/null
@@ -1,73 +0,0 @@
1	/* MN10300 On-board interrupt controller registers
2	*
3	* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
4	* Written by David Howells (dhowells@redhat.com)
5	*
6	* This program is free software; you can redistribute it and/or
7	* modify it under the terms of the GNU General Public Licence
8	* as published by the Free Software Foundation; either version
9	* 2 of the Licence, or (at your option) any later version.
10	*/
11	#ifndef _ASM_INTCTL_REGS_H
12	#define _ASM_INTCTL_REGS_H
13
14	#include <asm/cpu-regs.h>
15
16	#ifdef __KERNEL__
17
18	/* interrupt controller registers */
19	#define GxICR(X) __SYSREG(0xd4000000 + (X) * 4, u16) /* group irq ctrl regs */
20
21	#define IAGR __SYSREG(0xd4000100, u16) /* intr acceptance group reg */
22	#define IAGR_GN 0x00fc /* group number register
23	* (documentation _has_ to be wrong)
24	*/
25
26	#define EXTMD __SYSREG(0xd4000200, u16) /* external pin intr spec reg */
27	#define GET_XIRQ_TRIGGER(X) ((EXTMD >> ((X) * 2)) & 3)
28
29	#define SET_XIRQ_TRIGGER(X,Y) \
30	do { \
31	u16 x = EXTMD; \
32	x &= ~(3 << ((X) * 2)); \
33	x \|= ((Y) & 3) << ((X) * 2); \
34	EXTMD = x; \
35	} while (0)
36
37	#define XIRQ_TRIGGER_LOWLEVEL 0
38	#define XIRQ_TRIGGER_HILEVEL 1
39	#define XIRQ_TRIGGER_NEGEDGE 2
40	#define XIRQ_TRIGGER_POSEDGE 3
41
42	/* non-maskable interrupt control */
43	#define NMIIRQ 0
44	#define NMICR GxICR(NMIIRQ) /* NMI control register */
45	#define NMICR_NMIF 0x0001 /* NMI pin interrupt flag */
46	#define NMICR_WDIF 0x0002 /* watchdog timer overflow flag */
47	#define NMICR_ABUSERR 0x0008 /* async bus error flag */
48
49	/* maskable interrupt control */
50	#define GxICR_DETECT 0x0001 /* interrupt detect flag */
51	#define GxICR_REQUEST 0x0010 /* interrupt request flag */
52	#define GxICR_ENABLE 0x0100 /* interrupt enable flag */
53	#define GxICR_LEVEL 0x7000 /* interrupt priority level */
54	#define GxICR_LEVEL_0 0x0000 /* - level 0 */
55	#define GxICR_LEVEL_1 0x1000 /* - level 1 */
56	#define GxICR_LEVEL_2 0x2000 /* - level 2 */
57	#define GxICR_LEVEL_3 0x3000 /* - level 3 */
58	#define GxICR_LEVEL_4 0x4000 /* - level 4 */
59	#define GxICR_LEVEL_5 0x5000 /* - level 5 */
60	#define GxICR_LEVEL_6 0x6000 /* - level 6 */
61	#define GxICR_LEVEL_SHIFT 12
62
63	#ifndef __ASSEMBLY__
64	extern void set_intr_level(int irq, u16 level);
65	extern void set_intr_postackable(int irq);
66	#endif
67
68	/* external interrupts */
69	#define XIRQxICR(X) GxICR((X)) /* external interrupt control regs */
70
71	#endif /* __KERNEL__ */
72
73	#endif /* _ASM_INTCTL_REGS_H */