aboutsummaryrefslogtreecommitdiffstats
path: root/include/asm-mips/mips-boards/maltaint.h
diff options
context:
space:
mode:
Diffstat (limited to 'include/asm-mips/mips-boards/maltaint.h')
-rw-r--r--include/asm-mips/mips-boards/maltaint.h27
1 files changed, 27 insertions, 0 deletions
diff --git a/include/asm-mips/mips-boards/maltaint.h b/include/asm-mips/mips-boards/maltaint.h
index 7461318f1cd1..cea872fc6f5c 100644
--- a/include/asm-mips/mips-boards/maltaint.h
+++ b/include/asm-mips/mips-boards/maltaint.h
@@ -39,7 +39,9 @@
39#define MIPSCPU_INT_I8259A MIPSCPU_INT_MB0 39#define MIPSCPU_INT_I8259A MIPSCPU_INT_MB0
40#define MIPSCPU_INT_MB1 3 40#define MIPSCPU_INT_MB1 3
41#define MIPSCPU_INT_SMI MIPSCPU_INT_MB1 41#define MIPSCPU_INT_SMI MIPSCPU_INT_MB1
42#define MIPSCPU_INT_IPI0 MIPSCPU_INT_MB1 /* GIC IPI */
42#define MIPSCPU_INT_MB2 4 43#define MIPSCPU_INT_MB2 4
44#define MIPSCPU_INT_IPI1 MIPSCPU_INT_MB2 /* GIC IPI */
43#define MIPSCPU_INT_MB3 5 45#define MIPSCPU_INT_MB3 5
44#define MIPSCPU_INT_COREHI MIPSCPU_INT_MB3 46#define MIPSCPU_INT_COREHI MIPSCPU_INT_MB3
45#define MIPSCPU_INT_MB4 6 47#define MIPSCPU_INT_MB4 6
@@ -76,6 +78,31 @@
76#define MSC01E_INT_PERFCTR 10 78#define MSC01E_INT_PERFCTR 10
77#define MSC01E_INT_CPUCTR 11 79#define MSC01E_INT_CPUCTR 11
78 80
81/* GIC's Nomenclature for Core Interrupt Pins on the Malta */
82#define GIC_CPU_INT0 0 /* Core Interrupt 2 */
83#define GIC_CPU_INT1 1 /* . */
84#define GIC_CPU_INT2 2 /* . */
85#define GIC_CPU_INT3 3 /* . */
86#define GIC_CPU_INT4 4 /* . */
87#define GIC_CPU_INT5 5 /* Core Interrupt 5 */
88
89#define GIC_EXT_INTR(x) x
90
91/* Dummy data */
92#define X 0xdead
93
94/* External Interrupts used for IPI */
95#define GIC_IPI_EXT_INTR_RESCHED_VPE0 16
96#define GIC_IPI_EXT_INTR_CALLFNC_VPE0 17
97#define GIC_IPI_EXT_INTR_RESCHED_VPE1 18
98#define GIC_IPI_EXT_INTR_CALLFNC_VPE1 19
99#define GIC_IPI_EXT_INTR_RESCHED_VPE2 20
100#define GIC_IPI_EXT_INTR_CALLFNC_VPE2 21
101#define GIC_IPI_EXT_INTR_RESCHED_VPE3 22
102#define GIC_IPI_EXT_INTR_CALLFNC_VPE3 23
103
104#define MIPS_GIC_IRQ_BASE (MIPS_CPU_IRQ_BASE + 8)
105
79#ifndef __ASSEMBLY__ 106#ifndef __ASSEMBLY__
80extern void maltaint_init(void); 107extern void maltaint_init(void);
81#endif 108#endif