diff options
Diffstat (limited to 'include/asm-generic')
| -rw-r--r-- | include/asm-generic/io.h | 751 |
1 files changed, 624 insertions, 127 deletions
diff --git a/include/asm-generic/io.h b/include/asm-generic/io.h index b8fdc57a7335..9db042304df3 100644 --- a/include/asm-generic/io.h +++ b/include/asm-generic/io.h | |||
| @@ -12,6 +12,7 @@ | |||
| 12 | #define __ASM_GENERIC_IO_H | 12 | #define __ASM_GENERIC_IO_H |
| 13 | 13 | ||
| 14 | #include <asm/page.h> /* I/O is all done through memory accesses */ | 14 | #include <asm/page.h> /* I/O is all done through memory accesses */ |
| 15 | #include <linux/string.h> /* for memset() and memcpy() */ | ||
| 15 | #include <linux/types.h> | 16 | #include <linux/types.h> |
| 16 | 17 | ||
| 17 | #ifdef CONFIG_GENERIC_IOMAP | 18 | #ifdef CONFIG_GENERIC_IOMAP |
| @@ -24,260 +25,691 @@ | |||
| 24 | #define mmiowb() do {} while (0) | 25 | #define mmiowb() do {} while (0) |
| 25 | #endif | 26 | #endif |
| 26 | 27 | ||
| 27 | /*****************************************************************************/ | ||
| 28 | /* | 28 | /* |
| 29 | * readX/writeX() are used to access memory mapped devices. On some | 29 | * __raw_{read,write}{b,w,l,q}() access memory in native endianness. |
| 30 | * architectures the memory mapped IO stuff needs to be accessed | 30 | * |
| 31 | * differently. On the simple architectures, we just read/write the | 31 | * On some architectures memory mapped IO needs to be accessed differently. |
| 32 | * memory location directly. | 32 | * On the simple architectures, we just read/write the memory location |
| 33 | * directly. | ||
| 33 | */ | 34 | */ |
| 35 | |||
| 34 | #ifndef __raw_readb | 36 | #ifndef __raw_readb |
| 37 | #define __raw_readb __raw_readb | ||
| 35 | static inline u8 __raw_readb(const volatile void __iomem *addr) | 38 | static inline u8 __raw_readb(const volatile void __iomem *addr) |
| 36 | { | 39 | { |
| 37 | return *(const volatile u8 __force *) addr; | 40 | return *(const volatile u8 __force *)addr; |
| 38 | } | 41 | } |
| 39 | #endif | 42 | #endif |
| 40 | 43 | ||
| 41 | #ifndef __raw_readw | 44 | #ifndef __raw_readw |
| 45 | #define __raw_readw __raw_readw | ||
| 42 | static inline u16 __raw_readw(const volatile void __iomem *addr) | 46 | static inline u16 __raw_readw(const volatile void __iomem *addr) |
| 43 | { | 47 | { |
| 44 | return *(const volatile u16 __force *) addr; | 48 | return *(const volatile u16 __force *)addr; |
| 45 | } | 49 | } |
| 46 | #endif | 50 | #endif |
| 47 | 51 | ||
| 48 | #ifndef __raw_readl | 52 | #ifndef __raw_readl |
| 53 | #define __raw_readl __raw_readl | ||
| 49 | static inline u32 __raw_readl(const volatile void __iomem *addr) | 54 | static inline u32 __raw_readl(const volatile void __iomem *addr) |
| 50 | { | 55 | { |
| 51 | return *(const volatile u32 __force *) addr; | 56 | return *(const volatile u32 __force *)addr; |
| 52 | } | 57 | } |
| 53 | #endif | 58 | #endif |
| 54 | 59 | ||
| 55 | #define readb __raw_readb | 60 | #ifdef CONFIG_64BIT |
| 56 | 61 | #ifndef __raw_readq | |
| 57 | #define readw readw | 62 | #define __raw_readq __raw_readq |
| 58 | static inline u16 readw(const volatile void __iomem *addr) | 63 | static inline u64 __raw_readq(const volatile void __iomem *addr) |
| 59 | { | ||
| 60 | return __le16_to_cpu(__raw_readw(addr)); | ||
| 61 | } | ||
| 62 | |||
| 63 | #define readl readl | ||
| 64 | static inline u32 readl(const volatile void __iomem *addr) | ||
| 65 | { | 64 | { |
| 66 | return __le32_to_cpu(__raw_readl(addr)); | 65 | return *(const volatile u64 __force *)addr; |
| 67 | } | 66 | } |
| 67 | #endif | ||
| 68 | #endif /* CONFIG_64BIT */ | ||
| 68 | 69 | ||
| 69 | #ifndef __raw_writeb | 70 | #ifndef __raw_writeb |
| 70 | static inline void __raw_writeb(u8 b, volatile void __iomem *addr) | 71 | #define __raw_writeb __raw_writeb |
| 72 | static inline void __raw_writeb(u8 value, volatile void __iomem *addr) | ||
| 71 | { | 73 | { |
| 72 | *(volatile u8 __force *) addr = b; | 74 | *(volatile u8 __force *)addr = value; |
| 73 | } | 75 | } |
| 74 | #endif | 76 | #endif |
| 75 | 77 | ||
| 76 | #ifndef __raw_writew | 78 | #ifndef __raw_writew |
| 77 | static inline void __raw_writew(u16 b, volatile void __iomem *addr) | 79 | #define __raw_writew __raw_writew |
| 80 | static inline void __raw_writew(u16 value, volatile void __iomem *addr) | ||
| 78 | { | 81 | { |
| 79 | *(volatile u16 __force *) addr = b; | 82 | *(volatile u16 __force *)addr = value; |
| 80 | } | 83 | } |
| 81 | #endif | 84 | #endif |
| 82 | 85 | ||
| 83 | #ifndef __raw_writel | 86 | #ifndef __raw_writel |
| 84 | static inline void __raw_writel(u32 b, volatile void __iomem *addr) | 87 | #define __raw_writel __raw_writel |
| 88 | static inline void __raw_writel(u32 value, volatile void __iomem *addr) | ||
| 85 | { | 89 | { |
| 86 | *(volatile u32 __force *) addr = b; | 90 | *(volatile u32 __force *)addr = value; |
| 87 | } | 91 | } |
| 88 | #endif | 92 | #endif |
| 89 | 93 | ||
| 90 | #define writeb __raw_writeb | ||
| 91 | #define writew(b,addr) __raw_writew(__cpu_to_le16(b),addr) | ||
| 92 | #define writel(b,addr) __raw_writel(__cpu_to_le32(b),addr) | ||
| 93 | |||
| 94 | #ifdef CONFIG_64BIT | 94 | #ifdef CONFIG_64BIT |
| 95 | #ifndef __raw_readq | 95 | #ifndef __raw_writeq |
| 96 | static inline u64 __raw_readq(const volatile void __iomem *addr) | 96 | #define __raw_writeq __raw_writeq |
| 97 | static inline void __raw_writeq(u64 value, volatile void __iomem *addr) | ||
| 97 | { | 98 | { |
| 98 | return *(const volatile u64 __force *) addr; | 99 | *(volatile u64 __force *)addr = value; |
| 99 | } | 100 | } |
| 100 | #endif | 101 | #endif |
| 102 | #endif /* CONFIG_64BIT */ | ||
| 101 | 103 | ||
| 102 | #define readq readq | 104 | /* |
| 103 | static inline u64 readq(const volatile void __iomem *addr) | 105 | * {read,write}{b,w,l,q}() access little endian memory and return result in |
| 104 | { | 106 | * native endianness. |
| 105 | return __le64_to_cpu(__raw_readq(addr)); | 107 | */ |
| 106 | } | ||
| 107 | 108 | ||
| 108 | #ifndef __raw_writeq | 109 | #ifndef readb |
| 109 | static inline void __raw_writeq(u64 b, volatile void __iomem *addr) | 110 | #define readb readb |
| 111 | static inline u8 readb(const volatile void __iomem *addr) | ||
| 110 | { | 112 | { |
| 111 | *(volatile u64 __force *) addr = b; | 113 | return __raw_readb(addr); |
| 112 | } | 114 | } |
| 113 | #endif | 115 | #endif |
| 114 | 116 | ||
| 115 | #define writeq(b, addr) __raw_writeq(__cpu_to_le64(b), addr) | 117 | #ifndef readw |
| 116 | #endif /* CONFIG_64BIT */ | 118 | #define readw readw |
| 117 | 119 | static inline u16 readw(const volatile void __iomem *addr) | |
| 118 | #ifndef PCI_IOBASE | 120 | { |
| 119 | #define PCI_IOBASE ((void __iomem *) 0) | 121 | return __le16_to_cpu(__raw_readw(addr)); |
| 122 | } | ||
| 120 | #endif | 123 | #endif |
| 121 | 124 | ||
| 122 | /*****************************************************************************/ | 125 | #ifndef readl |
| 123 | /* | 126 | #define readl readl |
| 124 | * traditional input/output functions | 127 | static inline u32 readl(const volatile void __iomem *addr) |
| 125 | */ | ||
| 126 | |||
| 127 | static inline u8 inb(unsigned long addr) | ||
| 128 | { | 128 | { |
| 129 | return readb(addr + PCI_IOBASE); | 129 | return __le32_to_cpu(__raw_readl(addr)); |
| 130 | } | 130 | } |
| 131 | #endif | ||
| 131 | 132 | ||
| 132 | static inline u16 inw(unsigned long addr) | 133 | #ifdef CONFIG_64BIT |
| 134 | #ifndef readq | ||
| 135 | #define readq readq | ||
| 136 | static inline u64 readq(const volatile void __iomem *addr) | ||
| 133 | { | 137 | { |
| 134 | return readw(addr + PCI_IOBASE); | 138 | return __le64_to_cpu(__raw_readq(addr)); |
| 135 | } | 139 | } |
| 140 | #endif | ||
| 141 | #endif /* CONFIG_64BIT */ | ||
| 136 | 142 | ||
| 137 | static inline u32 inl(unsigned long addr) | 143 | #ifndef writeb |
| 144 | #define writeb writeb | ||
| 145 | static inline void writeb(u8 value, volatile void __iomem *addr) | ||
| 138 | { | 146 | { |
| 139 | return readl(addr + PCI_IOBASE); | ||
