diff options
Diffstat (limited to 'include/asm-frv/mb-regs.h')
-rw-r--r-- | include/asm-frv/mb-regs.h | 27 |
1 files changed, 19 insertions, 8 deletions
diff --git a/include/asm-frv/mb-regs.h b/include/asm-frv/mb-regs.h index 93fa732fb0cd..219e5f926f18 100644 --- a/include/asm-frv/mb-regs.h +++ b/include/asm-frv/mb-regs.h | |||
@@ -16,6 +16,17 @@ | |||
16 | #include <asm/sections.h> | 16 | #include <asm/sections.h> |
17 | #include <asm/mem-layout.h> | 17 | #include <asm/mem-layout.h> |
18 | 18 | ||
19 | #ifndef __ASSEMBLY__ | ||
20 | /* gcc builtins, annotated */ | ||
21 | |||
22 | unsigned long __builtin_read8(volatile void __iomem *); | ||
23 | unsigned long __builtin_read16(volatile void __iomem *); | ||
24 | unsigned long __builtin_read32(volatile void __iomem *); | ||
25 | void __builtin_write8(volatile void __iomem *, unsigned char); | ||
26 | void __builtin_write16(volatile void __iomem *, unsigned short); | ||
27 | void __builtin_write32(volatile void __iomem *, unsigned long); | ||
28 | #endif | ||
29 | |||
19 | #define __region_IO KERNEL_IO_START /* the region from 0xe0000000 to 0xffffffff has suitable | 30 | #define __region_IO KERNEL_IO_START /* the region from 0xe0000000 to 0xffffffff has suitable |
20 | * protection laid over the top for use in memory-mapped | 31 | * protection laid over the top for use in memory-mapped |
21 | * I/O | 32 | * I/O |
@@ -59,7 +70,7 @@ | |||
59 | #define __region_PCI_MEM (__region_CS2 + 0x08000000UL) | 70 | #define __region_PCI_MEM (__region_CS2 + 0x08000000UL) |
60 | #define __flush_PCI_writes() \ | 71 | #define __flush_PCI_writes() \ |
61 | do { \ | 72 | do { \ |
62 | __builtin_write8((volatile void *) __region_PCI_MEM, 0); \ | 73 | __builtin_write8((volatile void __iomem *) __region_PCI_MEM, 0); \ |
63 | } while(0) | 74 | } while(0) |
64 | 75 | ||
65 | #define __is_PCI_IO(addr) \ | 76 | #define __is_PCI_IO(addr) \ |
@@ -83,15 +94,15 @@ extern int __nongprelbss mb93090_mb00_detected; | |||
83 | #define __set_LEDS(X) \ | 94 | #define __set_LEDS(X) \ |
84 | do { \ | 95 | do { \ |
85 | if (mb93090_mb00_detected) \ | 96 | if (mb93090_mb00_detected) \ |
86 | __builtin_write32((void *) __addr_LEDS(), ~(X)); \ | 97 | __builtin_write32((void __iomem *) __addr_LEDS(), ~(X)); \ |
87 | } while (0) | 98 | } while (0) |
88 | #else | 99 | #else |
89 | #define __set_LEDS(X) | 100 | #define __set_LEDS(X) |
90 | #endif | 101 | #endif |
91 | 102 | ||
92 | #define __addr_LCD() (__region_CS2 + 0x01200008UL) | 103 | #define __addr_LCD() (__region_CS2 + 0x01200008UL) |
93 | #define __get_LCD(B) __builtin_read32((volatile void *) (B)) | 104 | #define __get_LCD(B) __builtin_read32((volatile void __iomem *) (B)) |
94 | #define __set_LCD(B,X) __builtin_write32((volatile void *) (B), (X)) | 105 | #define __set_LCD(B,X) __builtin_write32((volatile void __iomem *) (B), (X)) |
95 | 106 | ||
96 | #define LCD_D 0x000000ff /* LCD data bus */ | 107 | #define LCD_D 0x000000ff /* LCD data bus */ |
97 | #define LCD_RW 0x00000100 /* LCD R/W signal */ | 108 | #define LCD_RW 0x00000100 /* LCD R/W signal */ |
@@ -161,11 +172,11 @@ do { \ | |||
161 | #define __get_CLKIN() 66000000UL | 172 | #define __get_CLKIN() 66000000UL |
162 | 173 | ||
163 | #define __addr_LEDS() (__region_CS2 + 0x00000023UL) | 174 | #define __addr_LEDS() (__region_CS2 + 0x00000023UL) |
164 | #define __set_LEDS(X) __builtin_write8((volatile void *) __addr_LEDS(), (X)) | 175 | #define __set_LEDS(X) __builtin_write8((volatile void __iomem *) __addr_LEDS(), (X)) |
165 | 176 | ||
166 | #define __addr_FPGATR() (__region_CS2 + 0x00000030UL) | 177 | #define __addr_FPGATR() (__region_CS2 + 0x00000030UL) |
167 | #define __set_FPGATR(X) __builtin_write32((volatile void *) __addr_FPGATR(), (X)) | 178 | #define __set_FPGATR(X) __builtin_write32((volatile void __iomem *) __addr_FPGATR(), (X)) |
168 | #define __get_FPGATR() __builtin_read32((volatile void *) __addr_FPGATR()) | 179 | #define __get_FPGATR() __builtin_read32((volatile void __iomem *) __addr_FPGATR()) |
169 | 180 | ||
170 | #define MB93093_FPGA_FPGATR_AUDIO_CLK 0x00000003 | 181 | #define MB93093_FPGA_FPGATR_AUDIO_CLK 0x00000003 |
171 | 182 | ||
@@ -180,7 +191,7 @@ do { \ | |||
180 | #define MB93093_FPGA_SWR_PUSHSWMASK (0x1F<<26) | 191 | #define MB93093_FPGA_SWR_PUSHSWMASK (0x1F<<26) |
181 | #define MB93093_FPGA_SWR_PUSHSW4 (1<<29) | 192 | #define MB93093_FPGA_SWR_PUSHSW4 (1<<29) |
182 | 193 | ||
183 | #define __addr_FPGA_SWR ((volatile void *)(__region_CS2 + 0x28UL)) | 194 | #define __addr_FPGA_SWR ((volatile void __iomem *)(__region_CS2 + 0x28UL)) |
184 | #define __get_FPGA_PUSHSW1_5() (__builtin_read32(__addr_FPGA_SWR) & MB93093_FPGA_SWR_PUSHSWMASK) | 195 | #define __get_FPGA_PUSHSW1_5() (__builtin_read32(__addr_FPGA_SWR) & MB93093_FPGA_SWR_PUSHSWMASK) |
185 | 196 | ||
186 | 197 | ||