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-rw-r--r--include/asm-blackfin/mach-bf548/bfin_serial_5xx.h48
1 files changed, 32 insertions, 16 deletions
diff --git a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
index 7e6339f62a50..6547027cd3e6 100644
--- a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
@@ -1,22 +1,38 @@
1/*
2 * file: include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
3 * based on:
4 * author:
5 *
6 * created:
7 * description:
8 * blackfin serial driver head file
9 * rev:
10 *
11 * modified:
12 *
13 *
14 * bugs: enter bugs at http://blackfin.uclinux.org/
15 *
16 * this program is free software; you can redistribute it and/or modify
17 * it under the terms of the gnu general public license as published by
18 * the free software foundation; either version 2, or (at your option)
19 * any later version.
20 *
21 * this program is distributed in the hope that it will be useful,
22 * but without any warranty; without even the implied warranty of
23 * merchantability or fitness for a particular purpose. see the
24 * gnu general public license for more details.
25 *
26 * you should have received a copy of the gnu general public license
27 * along with this program; see the file copying.
28 * if not, write to the free software foundation,
29 * 59 temple place - suite 330, boston, ma 02111-1307, usa.
30 */
31
1#include <linux/serial.h> 32#include <linux/serial.h>
2#include <asm/dma.h> 33#include <asm/dma.h>
3#include <asm/portmux.h> 34#include <asm/portmux.h>
4 35
5#define NR_PORTS 4
6
7#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */
8#define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */
9#define OFFSET_GCTL 0x08 /* Global Control Register */
10#define OFFSET_LCR 0x0C /* Line Control Register */
11#define OFFSET_MCR 0x10 /* Modem Control Register */
12#define OFFSET_LSR 0x14 /* Line Status Register */
13#define OFFSET_MSR 0x18 /* Modem Status Register */
14#define OFFSET_SCR 0x1C /* SCR Scratch Register */
15#define OFFSET_IER_SET 0x20 /* Set Interrupt Enable Register */
16#define OFFSET_IER_CLEAR 0x24 /* Clear Interrupt Enable Register */
17#define OFFSET_THR 0x28 /* Transmit Holding register */
18#define OFFSET_RBR 0x2C /* Receive Buffer register */
19
20#define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR)) 36#define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR))
21#define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL)) 37#define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL))
22#define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH)) 38#define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH))
@@ -80,7 +96,7 @@ struct bfin_serial_port {
80#endif 96#endif
81}; 97};
82 98
83struct bfin_serial_port bfin_serial_ports[NR_PORTS]; 99struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
84struct bfin_serial_res { 100struct bfin_serial_res {
85 unsigned long uart_base_addr; 101 unsigned long uart_base_addr;
86 int uart_irq; 102 int uart_irq;