4 files changed, 40 insertions, 5 deletions

diff --git a/include/asm-avr32/atomic.h b/include/asm-avr32/atomic.h
index e0b9c44c126c..c40b6032c480 100644
--- a/include/asm-avr32/atomic.h
+++ b/include/asm-avr32/atomic.h
@@ -41,7 +41,7 @@ static inline int atomic_sub_return(int i, atomic_t *v)
                 "       stcond  %1, %0\n"
                 "       brne    1b"
                 : "=&r"(result), "=o"(v->counter)
-                : "m"(v->counter), "ir"(i)
+                : "m"(v->counter), "rKs21"(i)
                 : "cc");
 
         return result;
@@ -58,7 +58,7 @@ static inline int atomic_add_return(int i, atomic_t *v)
 {
         int result;
 
-        if (__builtin_constant_p(i))
+        if (__builtin_constant_p(i) && (i >= -1048575) && (i <= 1048576))
                 result = atomic_sub_return(-i, v);
         else
                 asm volatile(
@@ -101,7 +101,7 @@ static inline int atomic_sub_unless(atomic_t *v, int a, int u)
                 "       mov     %1, 1\n"
                 "1:"
                 : "=&r"(tmp), "=&r"(result), "=o"(v->counter)
-                : "m"(v->counter), "ir"(a), "ir"(u)
+                : "m"(v->counter), "rKs21"(a), "rKs21"(u)
                 : "cc", "memory");
 
         return result;
@@ -121,7 +121,7 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
 {
         int tmp, result;
 
-        if (__builtin_constant_p(a))
+        if (__builtin_constant_p(a) && (a >= -1048575) && (a <= 1048576))
                 result = atomic_sub_unless(v, -a, u);
         else {
                 result = 0;
diff --git a/include/asm-avr32/io.h b/include/asm-avr32/io.h
index 2fc8f111dce9..eec47500fa66 100644
--- a/include/asm-avr32/io.h
+++ b/include/asm-avr32/io.h
@@ -76,6 +76,39 @@ static inline unsigned int readl(const volatile void __iomem *addr)
 #define readsw(p, d, l)         __raw_readsw((unsigned int)p, d, l)
 #define readsl(p, d, l)         __raw_readsl((unsigned int)p, d, l)
 
+
+/*
+ * io{read,write}{8,16,32} macros in both le (for PCI style consumers) and native be
+ */
+#ifndef ioread8
+
+#define ioread8(p)      ({ unsigned int __v = __raw_readb(p); __v; })
+
+#define ioread16(p)     ({ unsigned int __v = le16_to_cpu(__raw_readw(p)); __v; })
+#define ioread16be(p)   ({ unsigned int __v = be16_to_cpu(__raw_readw(p)); __v; })
+
+#define ioread32(p)     ({ unsigned int __v = le32_to_cpu(__raw_readl(p)); __v; })
+#define ioread32be(p)   ({ unsigned int __v = be32_to_cpu(__raw_readl(p)); __v; })
+
+#define iowrite8(v,p)   __raw_writeb(v, p)
+
+#define iowrite16(v,p)  __raw_writew(cpu_to_le16(v), p)
+#define iowrite16be(v,p)        __raw_writew(cpu_to_be16(v), p)
+
+#define iowrite32(v,p)  __raw_writel(cpu_to_le32(v), p)
+#define iowrite32be(v,p)        __raw_writel(cpu_to_be32(v), p)
+
+#define ioread8_rep(p,d,c)      __raw_readsb(p,d,c)
+#define ioread16_rep(p,d,c)     __raw_readsw(p,d,c)
+#define ioread32_rep(p,d,c)     __raw_readsl(p,d,c)
+
+#define iowrite8_rep(p,s,c)     __raw_writesb(p,s,c)
+#define iowrite16_rep(p,s,c)    __raw_writesw(p,s,c)
+#define iowrite32_rep(p,s,c)    __raw_writesl(p,s,c)
+
+#endif
+
+
 /*
  * These two are only here because ALSA _thinks_ it needs them...
  */
diff --git a/include/asm-avr32/irq_regs.h b/include/asm-avr32/irq_regs.h
new file mode 100644
index 000000000000..3dd9c0b70270
--- /dev/null
+++ b/include/asm-avr32/irq_regs.h
@@ -0,0 +1 @@
+#include <asm-generic/irq_regs.h>
diff --git a/include/asm-avr32/unistd.h b/include/asm-avr32/unistd.h
index a50e5004550c..56ed1f9d348a 100644
--- a/include/asm-avr32/unistd.h
+++ b/include/asm-avr32/unistd.h
@@ -280,9 +280,10 @@
 #define __NR_sync_file_range    262
 #define __NR_tee                263
 #define __NR_vmsplice           264
+#define __NR_epoll_pwait        265
 
 #ifdef __KERNEL__
-#define NR_syscalls             265
+#define NR_syscalls             266
 
 
 #define __ARCH_WANT_IPC_PARSE_VERSION