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-rw-r--r--include/asm-arm/arch-pxa/debug-macro.S2
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h2
2 files changed, 4 insertions, 0 deletions
diff --git a/include/asm-arm/arch-pxa/debug-macro.S b/include/asm-arm/arch-pxa/debug-macro.S
index f288e74b67c2..b6ec68879176 100644
--- a/include/asm-arm/arch-pxa/debug-macro.S
+++ b/include/asm-arm/arch-pxa/debug-macro.S
@@ -11,6 +11,8 @@
11 * 11 *
12*/ 12*/
13 13
14#include "hardware.h"
15
14 .macro addruart,rx 16 .macro addruart,rx
15 mrc p15, 0, \rx, c1, c0 17 mrc p15, 0, \rx, c1, c0
16 tst \rx, #1 @ MMU enabled? 18 tst \rx, #1 @ MMU enabled?
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index b5e54a9e9fa7..51f0fe0ac165 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1505,6 +1505,7 @@
1505#define PSSR_OTGPH (1 << 6) /* OTG Peripheral control Hold */ 1505#define PSSR_OTGPH (1 << 6) /* OTG Peripheral control Hold */
1506#define PSSR_RDH (1 << 5) /* Read Disable Hold */ 1506#define PSSR_RDH (1 << 5) /* Read Disable Hold */
1507#define PSSR_PH (1 << 4) /* Peripheral Control Hold */ 1507#define PSSR_PH (1 << 4) /* Peripheral Control Hold */
1508#define PSSR_STS (1 << 3) /* Standby Mode Status */
1508#define PSSR_VFS (1 << 2) /* VDD Fault Status */ 1509#define PSSR_VFS (1 << 2) /* VDD Fault Status */
1509#define PSSR_BFS (1 << 1) /* Battery Fault Status */ 1510#define PSSR_BFS (1 << 1) /* Battery Fault Status */
1510#define PSSR_SSS (1 << 0) /* Software Sleep Status */ 1511#define PSSR_SSS (1 << 0) /* Software Sleep Status */
@@ -1965,6 +1966,7 @@
1965#define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */ 1966#define MECR_NOS (1 << 0) /* Number Of Sockets: 0 -> 1 sock, 1 -> 2 sock */
1966#define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */ 1967#define MECR_CIT (1 << 1) /* Card Is There: 0 -> no card, 1 -> card inserted */
1967 1968
1969#define MDREFR_K0DB4 (1 << 29) /* SDCLK0 Divide by 4 Control/Status */
1968#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */ 1970#define MDREFR_K2FREE (1 << 25) /* SDRAM Free-Running Control */
1969#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */ 1971#define MDREFR_K1FREE (1 << 24) /* SDRAM Free-Running Control */
1970#define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */ 1972#define MDREFR_K0FREE (1 << 23) /* SDRAM Free-Running Control */