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-rw-r--r--include/asm-arm/arch-pxa/hardware.h18
1 files changed, 3 insertions, 15 deletions
diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h
index 72b04d846a23..cf35721cfa45 100644
--- a/include/asm-arm/arch-pxa/hardware.h
+++ b/include/asm-arm/arch-pxa/hardware.h
@@ -44,24 +44,12 @@
44 44
45#ifndef __ASSEMBLY__ 45#ifndef __ASSEMBLY__
46 46
47#if 0 47# define __REG(x) (*((volatile unsigned long *)io_p2v(x)))
48# define __REG(x) (*((volatile u32 *)io_p2v(x)))
49#else
50/*
51 * This __REG() version gives the same results as the one above, except
52 * that we are fooling gcc somehow so it generates far better and smaller
53 * assembly code for access to contigous registers. It's a shame that gcc
54 * doesn't guess this by itself.
55 */
56#include <asm/types.h>
57typedef struct { volatile u32 offset[4096]; } __regbase;
58# define __REGP(x) ((__regbase *)((x)&~4095))->offset[((x)&4095)>>2]
59# define __REG(x) __REGP(io_p2v(x))
60#endif
61 48
62/* With indexed regs we don't want to feed the index through io_p2v() 49/* With indexed regs we don't want to feed the index through io_p2v()
63 especially if it is a variable, otherwise horrible code will result. */ 50 especially if it is a variable, otherwise horrible code will result. */
64# define __REG2(x,y) (*(volatile u32 *)((u32)&__REG(x) + (y))) 51# define __REG2(x,y) \
52 (*(volatile unsigned long *)((unsigned long)&__REG(x) + (y)))
65 53
66# define __PREG(x) (io_v2p((u32)&(x))) 54# define __PREG(x) (io_v2p((u32)&(x)))
67 55