diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/media/i2c/Kconfig | 9 | ||||
-rw-r--r-- | drivers/media/i2c/Makefile | 1 | ||||
-rw-r--r-- | drivers/media/i2c/ml86v7667.c | 431 |
3 files changed, 441 insertions, 0 deletions
diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig index f981d50a2a8c..9c04ddb2101e 100644 --- a/drivers/media/i2c/Kconfig +++ b/drivers/media/i2c/Kconfig | |||
@@ -245,6 +245,15 @@ config VIDEO_KS0127 | |||
245 | To compile this driver as a module, choose M here: the | 245 | To compile this driver as a module, choose M here: the |
246 | module will be called ks0127. | 246 | module will be called ks0127. |
247 | 247 | ||
248 | config VIDEO_ML86V7667 | ||
249 | tristate "OKI ML86V7667 video decoder" | ||
250 | depends on VIDEO_V4L2 && I2C | ||
251 | ---help--- | ||
252 | Support for the OKI Semiconductor ML86V7667 video decoder. | ||
253 | |||
254 | To compile this driver as a module, choose M here: the | ||
255 | module will be called ml86v7667. | ||
256 | |||
248 | config VIDEO_SAA7110 | 257 | config VIDEO_SAA7110 |
249 | tristate "Philips SAA7110 video decoder" | 258 | tristate "Philips SAA7110 video decoder" |
250 | depends on VIDEO_V4L2 && I2C | 259 | depends on VIDEO_V4L2 && I2C |
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile index 720f42d9d9f4..b40ea089861a 100644 --- a/drivers/media/i2c/Makefile +++ b/drivers/media/i2c/Makefile | |||
@@ -70,3 +70,4 @@ obj-$(CONFIG_VIDEO_AS3645A) += as3645a.o | |||
70 | obj-$(CONFIG_VIDEO_SMIAPP_PLL) += smiapp-pll.o | 70 | obj-$(CONFIG_VIDEO_SMIAPP_PLL) += smiapp-pll.o |
71 | obj-$(CONFIG_VIDEO_AK881X) += ak881x.o | 71 | obj-$(CONFIG_VIDEO_AK881X) += ak881x.o |
72 | obj-$(CONFIG_VIDEO_IR_I2C) += ir-kbd-i2c.o | 72 | obj-$(CONFIG_VIDEO_IR_I2C) += ir-kbd-i2c.o |
73 | obj-$(CONFIG_VIDEO_ML86V7667) += ml86v7667.o | ||
diff --git a/drivers/media/i2c/ml86v7667.c b/drivers/media/i2c/ml86v7667.c new file mode 100644 index 000000000000..0f256d3cc62b --- /dev/null +++ b/drivers/media/i2c/ml86v7667.c | |||
@@ -0,0 +1,431 @@ | |||
1 | /* | ||
2 | * OKI Semiconductor ML86V7667 video decoder driver | ||
3 | * | ||
4 | * Author: Vladimir Barinov <source@cogentembedded.com> | ||
5 | * Copyright (C) 2013 Cogent Embedded, Inc. | ||
6 | * Copyright (C) 2013 Renesas Solutions Corp. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | */ | ||
13 | |||
14 | #include <linux/init.h> | ||
15 | #include <linux/module.h> | ||
16 | #include <linux/i2c.h> | ||
17 | #include <linux/slab.h> | ||
18 | #include <linux/videodev2.h> | ||
19 | #include <media/v4l2-subdev.h> | ||
20 | #include <media/v4l2-device.h> | ||
21 | #include <media/v4l2-ioctl.h> | ||
22 | #include <media/v4l2-ctrls.h> | ||
23 | |||
24 | #define DRV_NAME "ml86v7667" | ||
25 | |||
26 | /* Subaddresses */ | ||
27 | #define MRA_REG 0x00 /* Mode Register A */ | ||
28 | #define MRC_REG 0x02 /* Mode Register C */ | ||
29 | #define LUMC_REG 0x0C /* Luminance Control */ | ||
30 | #define CLC_REG 0x10 /* Contrast level control */ | ||
31 | #define SSEPL_REG 0x11 /* Sync separation level */ | ||
32 | #define CHRCA_REG 0x12 /* Chrominance Control A */ | ||
33 | #define ACCC_REG 0x14 /* ACC Loop filter & Chrominance control */ | ||
34 | #define ACCRC_REG 0x15 /* ACC Reference level control */ | ||
35 | #define HUE_REG 0x16 /* Hue control */ | ||
36 | #define ADC2_REG 0x1F /* ADC Register 2 */ | ||
37 | #define PLLR1_REG 0x20 /* PLL Register 1 */ | ||
38 | #define STATUS_REG 0x2C /* STATUS Register */ | ||
39 | |||
40 | /* Mode Register A register bits */ | ||
41 | #define MRA_OUTPUT_MODE_MASK (3 << 6) | ||
42 | #define MRA_ITUR_BT601 (1 << 6) | ||
43 | #define MRA_ITUR_BT656 (0 << 6) | ||
44 | #define MRA_INPUT_MODE_MASK (7 << 3) | ||
45 | #define MRA_PAL_BT601 (4 << 3) | ||
46 | #define MRA_NTSC_BT601 (0 << 3) | ||
47 | #define MRA_REGISTER_MODE (1 << 0) | ||
48 | |||
49 | /* Mode Register C register bits */ | ||
50 | #define MRC_AUTOSELECT (1 << 7) | ||
51 | |||
52 | /* Luminance Control register bits */ | ||
53 | #define LUMC_ONOFF_SHIFT 7 | ||
54 | #define LUMC_ONOFF_MASK (1 << 7) | ||
55 | |||
56 | /* Contrast level control register bits */ | ||
57 | #define CLC_CONTRAST_ONOFF (1 << 7) | ||
58 | #define CLC_CONTRAST_MASK 0x0F | ||
59 | |||
60 | /* Sync separation level register bits */ | ||
61 | #define SSEPL_LUMINANCE_ONOFF (1 << 7) | ||
62 | #define SSEPL_LUMINANCE_MASK 0x7F | ||
63 | |||
64 | /* Chrominance Control A register bits */ | ||
65 | #define CHRCA_MODE_SHIFT 6 | ||
66 | #define CHRCA_MODE_MASK (1 << 6) | ||
67 | |||
68 | /* ACC Loop filter & Chrominance control register bits */ | ||
69 | #define ACCC_CHROMA_CR_SHIFT 3 | ||
70 | #define ACCC_CHROMA_CR_MASK (7 << 3) | ||
71 | #define ACCC_CHROMA_CB_SHIFT 0 | ||
72 | #define ACCC_CHROMA_CB_MASK (7 << 0) | ||
73 | |||
74 | /* ACC Reference level control register bits */ | ||
75 | #define ACCRC_CHROMA_MASK 0xfc | ||
76 | #define ACCRC_CHROMA_SHIFT 2 | ||
77 | |||
78 | /* ADC Register 2 register bits */ | ||
79 | #define ADC2_CLAMP_VOLTAGE_MASK (7 << 1) | ||
80 | #define ADC2_CLAMP_VOLTAGE(n) ((n & 7) << 1) | ||
81 | |||
82 | /* PLL Register 1 register bits */ | ||
83 | #define PLLR1_FIXED_CLOCK (1 << 7) | ||
84 | |||
85 | /* STATUS Register register bits */ | ||
86 | #define STATUS_HLOCK_DETECT (1 << 3) | ||
87 | #define STATUS_NTSCPAL (1 << 2) | ||
88 | |||
89 | struct ml86v7667_priv { | ||
90 | struct v4l2_subdev sd; | ||
91 | struct v4l2_ctrl_handler hdl; | ||
92 | v4l2_std_id std; | ||
93 | }; | ||
94 | |||
95 | static inline struct ml86v7667_priv *to_ml86v7667(struct v4l2_subdev *subdev) | ||
96 | { | ||
97 | return container_of(subdev, struct ml86v7667_priv, sd); | ||
98 | } | ||
99 | |||
100 | static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl) | ||
101 | { | ||
102 | return &container_of(ctrl->handler, struct ml86v7667_priv, hdl)->sd; | ||
103 | } | ||
104 | |||
105 | static int ml86v7667_mask_set(struct i2c_client *client, const u8 reg, | ||
106 | const u8 mask, const u8 data) | ||
107 | { | ||
108 | int val = i2c_smbus_read_byte_data(client, reg); | ||
109 | if (val < 0) | ||
110 | return val; | ||
111 | |||
112 | val = (val & ~mask) | (data & mask); | ||
113 | return i2c_smbus_write_byte_data(client, reg, val); | ||
114 | } | ||
115 | |||
116 | static int ml86v7667_s_ctrl(struct v4l2_ctrl *ctrl) | ||
117 | { | ||
118 | struct v4l2_subdev *sd = to_sd(ctrl); | ||
119 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
120 | int ret = 0; | ||
121 | |||
122 | switch (ctrl->id) { | ||
123 | case V4L2_CID_BRIGHTNESS: | ||
124 | ret = ml86v7667_mask_set(client, SSEPL_REG, | ||
125 | SSEPL_LUMINANCE_MASK, ctrl->val); | ||
126 | break; | ||
127 | case V4L2_CID_CONTRAST: | ||
128 | ret = ml86v7667_mask_set(client, CLC_REG, | ||
129 | CLC_CONTRAST_MASK, ctrl->val); | ||
130 | break; | ||
131 | case V4L2_CID_CHROMA_GAIN: | ||
132 | ret = ml86v7667_mask_set(client, ACCRC_REG, ACCRC_CHROMA_MASK, | ||
133 | ctrl->val << ACCRC_CHROMA_SHIFT); | ||
134 | break; | ||
135 | case V4L2_CID_HUE: | ||
136 | ret = ml86v7667_mask_set(client, HUE_REG, ~0, ctrl->val); | ||
137 | break; | ||
138 | case V4L2_CID_RED_BALANCE: | ||
139 | ret = ml86v7667_mask_set(client, ACCC_REG, | ||
140 | ACCC_CHROMA_CR_MASK, | ||
141 | ctrl->val << ACCC_CHROMA_CR_SHIFT); | ||
142 | break; | ||
143 | case V4L2_CID_BLUE_BALANCE: | ||
144 | ret = ml86v7667_mask_set(client, ACCC_REG, | ||
145 | ACCC_CHROMA_CB_MASK, | ||
146 | ctrl->val << ACCC_CHROMA_CB_SHIFT); | ||
147 | break; | ||
148 | case V4L2_CID_SHARPNESS: | ||
149 | ret = ml86v7667_mask_set(client, LUMC_REG, | ||
150 | LUMC_ONOFF_MASK, | ||
151 | ctrl->val << LUMC_ONOFF_SHIFT); | ||
152 | break; | ||
153 | case V4L2_CID_COLOR_KILLER: | ||
154 | ret = ml86v7667_mask_set(client, CHRCA_REG, | ||
155 | CHRCA_MODE_MASK, | ||
156 | ctrl->val << CHRCA_MODE_SHIFT); | ||
157 | break; | ||
158 | } | ||
159 | |||
160 | return 0; | ||
161 | } | ||
162 | |||
163 | static int ml86v7667_querystd(struct v4l2_subdev *sd, v4l2_std_id *std) | ||
164 | { | ||
165 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
166 | int status; | ||
167 | |||
168 | status = i2c_smbus_read_byte_data(client, STATUS_REG); | ||
169 | if (status < 0) | ||
170 | return status; | ||
171 | |||
172 | if (!(status & STATUS_HLOCK_DETECT)) | ||
173 | return V4L2_STD_UNKNOWN; | ||
174 | |||
175 | *std = status & STATUS_NTSCPAL ? V4L2_STD_625_50 : V4L2_STD_525_60; | ||
176 | |||
177 | return 0; | ||
178 | } | ||
179 | |||
180 | static int ml86v7667_g_input_status(struct v4l2_subdev *sd, u32 *status) | ||
181 | { | ||
182 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
183 | int status_reg; | ||
184 | |||
185 | status_reg = i2c_smbus_read_byte_data(client, STATUS_REG); | ||
186 | if (status_reg < 0) | ||
187 | return status_reg; | ||
188 | |||
189 | *status = status_reg & STATUS_HLOCK_DETECT ? 0 : V4L2_IN_ST_NO_SIGNAL; | ||
190 | |||
191 | return 0; | ||
192 | } | ||
193 | |||
194 | static int ml86v7667_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned int index, | ||
195 | enum v4l2_mbus_pixelcode *code) | ||
196 | { | ||
197 | if (index > 0) | ||
198 | return -EINVAL; | ||
199 | |||
200 | *code = V4L2_MBUS_FMT_YUYV8_2X8; | ||
201 | |||
202 | return 0; | ||
203 | } | ||
204 | |||
205 | static int ml86v7667_mbus_fmt(struct v4l2_subdev *sd, | ||
206 | struct v4l2_mbus_framefmt *fmt) | ||
207 | { | ||
208 | struct ml86v7667_priv *priv = to_ml86v7667(sd); | ||
209 | |||
210 | fmt->code = V4L2_MBUS_FMT_YUYV8_2X8; | ||
211 | fmt->colorspace = V4L2_COLORSPACE_SMPTE170M; | ||
212 | fmt->field = V4L2_FIELD_INTERLACED; | ||
213 | fmt->width = 720; | ||
214 | fmt->height = priv->std & V4L2_STD_525_60 ? 480 : 576; | ||
215 | |||
216 | return 0; | ||
217 | } | ||
218 | |||
219 | static int ml86v7667_g_mbus_config(struct v4l2_subdev *sd, | ||
220 | struct v4l2_mbus_config *cfg) | ||
221 | { | ||
222 | cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING | | ||
223 | V4L2_MBUS_DATA_ACTIVE_HIGH; | ||
224 | cfg->type = V4L2_MBUS_BT656; | ||
225 | |||
226 | return 0; | ||
227 | } | ||
228 | |||
229 | static int ml86v7667_s_std(struct v4l2_subdev *sd, v4l2_std_id std) | ||
230 | { | ||
231 | struct ml86v7667_priv *priv = to_ml86v7667(sd); | ||
232 | struct i2c_client *client = v4l2_get_subdevdata(&priv->sd); | ||
233 | int ret; | ||
234 | u8 mode; | ||
235 | |||
236 | /* PAL/NTSC ITU-R BT.601 input mode */ | ||
237 | mode = std & V4L2_STD_525_60 ? MRA_NTSC_BT601 : MRA_PAL_BT601; | ||
238 | ret = ml86v7667_mask_set(client, MRA_REG, MRA_INPUT_MODE_MASK, mode); | ||
239 | if (ret < 0) | ||
240 | return ret; | ||
241 | |||
242 | priv->std = std; | ||
243 | |||
244 | return 0; | ||
245 | } | ||
246 | |||
247 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
248 | static int ml86v7667_g_register(struct v4l2_subdev *sd, | ||
249 | struct v4l2_dbg_register *reg) | ||
250 | { | ||
251 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
252 | int ret; | ||
253 | |||
254 | ret = i2c_smbus_read_byte_data(client, (u8)reg->reg); | ||
255 | if (ret < 0) | ||
256 | return ret; | ||
257 | |||
258 | reg->val = ret; | ||
259 | reg->size = sizeof(u8); | ||
260 | |||
261 | return 0; | ||
262 | } | ||
263 | |||
264 | static int ml86v7667_s_register(struct v4l2_subdev *sd, | ||
265 | const struct v4l2_dbg_register *reg) | ||
266 | { | ||
267 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
268 | |||
269 | return i2c_smbus_write_byte_data(client, (u8)reg->reg, (u8)reg->val); | ||
270 | } | ||
271 | #endif | ||
272 | |||
273 | static const struct v4l2_ctrl_ops ml86v7667_ctrl_ops = { | ||
274 | .s_ctrl = ml86v7667_s_ctrl, | ||
275 | }; | ||
276 | |||
277 | static struct v4l2_subdev_video_ops ml86v7667_subdev_video_ops = { | ||
278 | .querystd = ml86v7667_querystd, | ||
279 | .g_input_status = ml86v7667_g_input_status, | ||
280 | .enum_mbus_fmt = ml86v7667_enum_mbus_fmt, | ||
281 | .try_mbus_fmt = ml86v7667_mbus_fmt, | ||
282 | .g_mbus_fmt = ml86v7667_mbus_fmt, | ||
283 | .s_mbus_fmt = ml86v7667_mbus_fmt, | ||
284 | .g_mbus_config = ml86v7667_g_mbus_config, | ||
285 | }; | ||
286 | |||
287 | static struct v4l2_subdev_core_ops ml86v7667_subdev_core_ops = { | ||
288 | .s_std = ml86v7667_s_std, | ||
289 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
290 | .g_register = ml86v7667_g_register, | ||
291 | .s_register = ml86v7667_s_register, | ||
292 | #endif | ||
293 | }; | ||
294 | |||
295 | static struct v4l2_subdev_ops ml86v7667_subdev_ops = { | ||
296 | .core = &ml86v7667_subdev_core_ops, | ||
297 | .video = &ml86v7667_subdev_video_ops, | ||
298 | }; | ||
299 | |||
300 | static int ml86v7667_init(struct ml86v7667_priv *priv) | ||
301 | { | ||
302 | struct i2c_client *client = v4l2_get_subdevdata(&priv->sd); | ||
303 | int val; | ||
304 | int ret; | ||
305 | |||
306 | /* BT.656-4 output mode, register mode */ | ||
307 | ret = ml86v7667_mask_set(client, MRA_REG, | ||
308 | MRA_OUTPUT_MODE_MASK | MRA_REGISTER_MODE, | ||
309 | MRA_ITUR_BT656 | MRA_REGISTER_MODE); | ||
310 | |||
311 | /* PLL circuit fixed clock, 32MHz */ | ||
312 | ret |= ml86v7667_mask_set(client, PLLR1_REG, PLLR1_FIXED_CLOCK, | ||
313 | PLLR1_FIXED_CLOCK); | ||
314 | |||
315 | /* ADC2 clamping voltage maximum */ | ||
316 | ret |= ml86v7667_mask_set(client, ADC2_REG, ADC2_CLAMP_VOLTAGE_MASK, | ||
317 | ADC2_CLAMP_VOLTAGE(7)); | ||
318 | |||
319 | /* enable luminance function */ | ||
320 | ret |= ml86v7667_mask_set(client, SSEPL_REG, SSEPL_LUMINANCE_ONOFF, | ||
321 | SSEPL_LUMINANCE_ONOFF); | ||
322 | |||
323 | /* enable contrast function */ | ||
324 | ret |= ml86v7667_mask_set(client, CLC_REG, CLC_CONTRAST_ONOFF, 0); | ||
325 | |||
326 | /* | ||
327 | * PAL/NTSC autodetection is enabled after reset, | ||
328 | * set the autodetected std in manual std mode and | ||
329 | * disable autodetection | ||
330 | */ | ||
331 | val = i2c_smbus_read_byte_data(client, STATUS_REG); | ||
332 | if (val < 0) | ||
333 | return val; | ||
334 | |||
335 | priv->std = val & STATUS_NTSCPAL ? V4L2_STD_625_50 : V4L2_STD_525_60; | ||
336 | ret |= ml86v7667_mask_set(client, MRC_REG, MRC_AUTOSELECT, 0); | ||
337 | |||
338 | val = priv->std & V4L2_STD_525_60 ? MRA_NTSC_BT601 : MRA_PAL_BT601; | ||
339 | ret |= ml86v7667_mask_set(client, MRA_REG, MRA_INPUT_MODE_MASK, val); | ||
340 | |||
341 | return ret; | ||
342 | } | ||
343 | |||
344 | static int ml86v7667_probe(struct i2c_client *client, | ||
345 | const struct i2c_device_id *did) | ||
346 | { | ||
347 | struct ml86v7667_priv *priv; | ||
348 | int ret; | ||
349 | |||
350 | if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | ||
351 | return -EIO; | ||
352 | |||
353 | priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL); | ||
354 | if (!priv) | ||
355 | return -ENOMEM; | ||
356 | |||
357 | v4l2_i2c_subdev_init(&priv->sd, client, &ml86v7667_subdev_ops); | ||
358 | |||
359 | v4l2_ctrl_handler_init(&priv->hdl, 8); | ||
360 | v4l2_ctrl_new_std(&priv->hdl, &ml86v7667_ctrl_ops, | ||
361 | V4L2_CID_BRIGHTNESS, -64, 63, 1, 0); | ||
362 | v4l2_ctrl_new_std(&priv->hdl, &ml86v7667_ctrl_ops, | ||
363 | V4L2_CID_CONTRAST, -8, 7, 1, 0); | ||
364 | v4l2_ctrl_new_std(&priv->hdl, &ml86v7667_ctrl_ops, | ||
365 | V4L2_CID_CHROMA_GAIN, -32, 31, 1, 0); | ||
366 | v4l2_ctrl_new_std(&priv->hdl, &ml86v7667_ctrl_ops, | ||
367 | V4L2_CID_HUE, -128, 127, 1, 0); | ||
368 | v4l2_ctrl_new_std(&priv->hdl, &ml86v7667_ctrl_ops, | ||
369 | V4L2_CID_RED_BALANCE, -4, 3, 1, 0); | ||
370 | v4l2_ctrl_new_std(&priv->hdl, &ml86v7667_ctrl_ops, | ||
371 | V4L2_CID_BLUE_BALANCE, -4, 3, 1, 0); | ||
372 | v4l2_ctrl_new_std(&priv->hdl, &ml86v7667_ctrl_ops, | ||
373 | V4L2_CID_SHARPNESS, 0, 1, 1, 0); | ||
374 | v4l2_ctrl_new_std(&priv->hdl, &ml86v7667_ctrl_ops, | ||
375 | V4L2_CID_COLOR_KILLER, 0, 1, 1, 0); | ||
376 | priv->sd.ctrl_handler = &priv->hdl; | ||
377 | |||
378 | ret = priv->hdl.error; | ||
379 | if (ret) | ||
380 | goto cleanup; | ||
381 | |||
382 | v4l2_ctrl_handler_setup(&priv->hdl); | ||
383 | |||
384 | ret = ml86v7667_init(priv); | ||
385 | if (ret) | ||
386 | goto cleanup; | ||
387 | |||
388 | v4l_info(client, "chip found @ 0x%02x (%s)\n", | ||
389 | client->addr, client->adapter->name); | ||
390 | return 0; | ||
391 | |||
392 | cleanup: | ||
393 | v4l2_ctrl_handler_free(&priv->hdl); | ||
394 | v4l2_device_unregister_subdev(&priv->sd); | ||
395 | v4l_err(client, "failed to probe @ 0x%02x (%s)\n", | ||
396 | client->addr, client->adapter->name); | ||
397 | return ret; | ||
398 | } | ||
399 | |||
400 | static int ml86v7667_remove(struct i2c_client *client) | ||
401 | { | ||
402 | struct v4l2_subdev *sd = i2c_get_clientdata(client); | ||
403 | struct ml86v7667_priv *priv = to_ml86v7667(sd); | ||
404 | |||
405 | v4l2_ctrl_handler_free(&priv->hdl); | ||
406 | v4l2_device_unregister_subdev(&priv->sd); | ||
407 | |||
408 | return 0; | ||
409 | } | ||
410 | |||
411 | static const struct i2c_device_id ml86v7667_id[] = { | ||
412 | {DRV_NAME, 0}, | ||
413 | {}, | ||
414 | }; | ||
415 | MODULE_DEVICE_TABLE(i2c, ml86v7667_id); | ||
416 | |||
417 | static struct i2c_driver ml86v7667_i2c_driver = { | ||
418 | .driver = { | ||
419 | .name = DRV_NAME, | ||
420 | .owner = THIS_MODULE, | ||
421 | }, | ||
422 | .probe = ml86v7667_probe, | ||
423 | .remove = ml86v7667_remove, | ||
424 | .id_table = ml86v7667_id, | ||
425 | }; | ||
426 | |||
427 | module_i2c_driver(ml86v7667_i2c_driver); | ||
428 | |||
429 | MODULE_DESCRIPTION("OKI Semiconductor ML86V7667 video decoder driver"); | ||
430 | MODULE_AUTHOR("Vladimir Barinov"); | ||
431 | MODULE_LICENSE("GPL"); | ||