diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/drm_edid.c | 19 | ||||
| -rw-r--r-- | drivers/gpu/drm/drm_ioc32.c | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/drm_pci.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_i2c.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/atombios.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/atombios_crtc.c | 7 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_asic.c | 31 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_combios.c | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_connectors.c | 58 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_device.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_encoders.c | 112 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_fence.c | 51 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_mode.h | 2 |
14 files changed, 235 insertions, 75 deletions
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 0a9357c66ff8..09292193dafe 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c | |||
| @@ -184,9 +184,9 @@ drm_edid_block_valid(u8 *raw_edid) | |||
| 184 | 184 | ||
| 185 | bad: | 185 | bad: |
| 186 | if (raw_edid) { | 186 | if (raw_edid) { |
| 187 | DRM_ERROR("Raw EDID:\n"); | 187 | printk(KERN_ERR "Raw EDID:\n"); |
| 188 | print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH); | 188 | print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH); |
| 189 | printk("\n"); | 189 | printk(KERN_ERR "\n"); |
| 190 | } | 190 | } |
| 191 | return 0; | 191 | return 0; |
| 192 | } | 192 | } |
| @@ -258,6 +258,17 @@ drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf, | |||
| 258 | return ret == 2 ? 0 : -1; | 258 | return ret == 2 ? 0 : -1; |
| 259 | } | 259 | } |
| 260 | 260 | ||
| 261 | static bool drm_edid_is_zero(u8 *in_edid, int length) | ||
| 262 | { | ||
| 263 | int i; | ||
| 264 | u32 *raw_edid = (u32 *)in_edid; | ||
| 265 | |||
| 266 | for (i = 0; i < length / 4; i++) | ||
| 267 | if (*(raw_edid + i) != 0) | ||
| 268 | return false; | ||
| 269 | return true; | ||
| 270 | } | ||
| 271 | |||
| 261 | static u8 * | 272 | static u8 * |
| 262 | drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter) | 273 | drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter) |
| 263 | { | 274 | { |
| @@ -273,6 +284,10 @@ drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter) | |||
| 273 | goto out; | 284 | goto out; |
| 274 | if (drm_edid_block_valid(block)) | 285 | if (drm_edid_block_valid(block)) |
| 275 | break; | 286 | break; |
| 287 | if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) { | ||
| 288 | connector->null_edid_counter++; | ||
| 289 | goto carp; | ||
| 290 | } | ||
| 276 | } | 291 | } |
| 277 | if (i == 4) | 292 | if (i == 4) |
| 278 | goto carp; | 293 | goto carp; |
diff --git a/drivers/gpu/drm/drm_ioc32.c b/drivers/gpu/drm/drm_ioc32.c index d61d185cf040..4a058c7af6c0 100644 --- a/drivers/gpu/drm/drm_ioc32.c +++ b/drivers/gpu/drm/drm_ioc32.c | |||
| @@ -28,6 +28,7 @@ | |||
| 28 | * IN THE SOFTWARE. | 28 | * IN THE SOFTWARE. |
| 29 | */ | 29 | */ |
| 30 | #include <linux/compat.h> | 30 | #include <linux/compat.h> |
| 31 | #include <linux/ratelimit.h> | ||
| 31 | 32 | ||
| 32 | #include "drmP.h" | 33 | #include "drmP.h" |
| 33 | #include "drm_core.h" | 34 | #include "drm_core.h" |
| @@ -253,10 +254,10 @@ static int compat_drm_addmap(struct file *file, unsigned int cmd, | |||
| 253 | return -EFAULT; | 254 | return -EFAULT; |
| 254 | 255 | ||
| 255 | m32.handle = (unsigned long)handle; | 256 | m32.handle = (unsigned long)handle; |
| 256 | if (m32.handle != (unsigned long)handle && printk_ratelimit()) | 257 | if (m32.handle != (unsigned long)handle) |
| 257 | printk(KERN_ERR "compat_drm_addmap truncated handle" | 258 | printk_ratelimited(KERN_ERR "compat_drm_addmap truncated handle" |
| 258 | " %p for type %d offset %x\n", | 259 | " %p for type %d offset %x\n", |
| 259 | handle, m32.type, m32.offset); | 260 | handle, m32.type, m32.offset); |
| 260 | 261 | ||
| 261 | if (copy_to_user(argp, &m32, sizeof(m32))) | 262 | if (copy_to_user(argp, &m32, sizeof(m32))) |
| 262 | return -EFAULT; | 263 | return -EFAULT; |
diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c index e1aee4f6a7c6..b6a19cb07caf 100644 --- a/drivers/gpu/drm/drm_pci.c +++ b/drivers/gpu/drm/drm_pci.c | |||
| @@ -251,7 +251,7 @@ err: | |||
| 251 | } | 251 | } |
| 252 | 252 | ||
| 253 | 253 | ||
| 254 | int drm_pci_irq_by_busid(struct drm_device *dev, struct drm_irq_busid *p) | 254 | static int drm_pci_irq_by_busid(struct drm_device *dev, struct drm_irq_busid *p) |
| 255 | { | 255 | { |
| 256 | if ((p->busnum >> 8) != drm_get_pci_domain(dev) || | 256 | if ((p->busnum >> 8) != drm_get_pci_domain(dev) || |
| 257 | (p->busnum & 0xff) != dev->pdev->bus->number || | 257 | (p->busnum & 0xff) != dev->pdev->bus->number || |
| @@ -292,6 +292,7 @@ static struct drm_bus drm_pci_bus = { | |||
| 292 | .get_name = drm_pci_get_name, | 292 | .get_name = drm_pci_get_name, |
| 293 | .set_busid = drm_pci_set_busid, | 293 | .set_busid = drm_pci_set_busid, |
| 294 | .set_unique = drm_pci_set_unique, | 294 | .set_unique = drm_pci_set_unique, |
| 295 | .irq_by_busid = drm_pci_irq_by_busid, | ||
| 295 | .agp_init = drm_pci_agp_init, | 296 | .agp_init = drm_pci_agp_init, |
| 296 | }; | 297 | }; |
| 297 | 298 | ||
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c index d3b903bce7c5..d98cee60b602 100644 --- a/drivers/gpu/drm/i915/intel_i2c.c +++ b/drivers/gpu/drm/i915/intel_i2c.c | |||
| @@ -401,8 +401,7 @@ int intel_setup_gmbus(struct drm_device *dev) | |||
| 401 | bus->reg0 = i | GMBUS_RATE_100KHZ; | 401 | bus->reg0 = i | GMBUS_RATE_100KHZ; |
| 402 | 402 | ||
| 403 | /* XXX force bit banging until GMBUS is fully debugged */ | 403 | /* XXX force bit banging until GMBUS is fully debugged */ |
| 404 | if (IS_GEN2(dev)) | 404 | bus->force_bit = intel_gpio_create(dev_priv, i); |
| 405 | bus->force_bit = intel_gpio_create(dev_priv, i); | ||
| 406 | } | 405 | } |
| 407 | 406 | ||
| 408 | intel_i2c_reset(dev_priv->dev); | 407 | intel_i2c_reset(dev_priv->dev); |
diff --git a/drivers/gpu/drm/radeon/atombios.h b/drivers/gpu/drm/radeon/atombios.h index 49611e2365d9..1b50ad8919d5 100644 --- a/drivers/gpu/drm/radeon/atombios.h +++ b/drivers/gpu/drm/radeon/atombios.h | |||
| @@ -1200,6 +1200,7 @@ typedef struct _EXTERNAL_ENCODER_CONTROL_PARAMETERS_V3 | |||
| 1200 | #define EXTERNAL_ENCODER_ACTION_V3_ENCODER_BLANKING_OFF 0x10 | 1200 | #define EXTERNAL_ENCODER_ACTION_V3_ENCODER_BLANKING_OFF 0x10 |
| 1201 | #define EXTERNAL_ENCODER_ACTION_V3_ENCODER_BLANKING 0x11 | 1201 | #define EXTERNAL_ENCODER_ACTION_V3_ENCODER_BLANKING 0x11 |
| 1202 | #define EXTERNAL_ENCODER_ACTION_V3_DACLOAD_DETECTION 0x12 | 1202 | #define EXTERNAL_ENCODER_ACTION_V3_DACLOAD_DETECTION 0x12 |
| 1203 | #define EXTERNAL_ENCODER_ACTION_V3_DDC_SETUP 0x14 | ||
| 1203 | 1204 | ||
| 1204 | // ucConfig | 1205 | // ucConfig |
| 1205 | #define EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_MASK 0x03 | 1206 | #define EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_MASK 0x03 |
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 84a69e7fa11e..9541995e4b21 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
| @@ -671,6 +671,13 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, | |||
| 671 | DISPPLL_CONFIG_DUAL_LINK; | 671 | DISPPLL_CONFIG_DUAL_LINK; |
| 672 | } | 672 | } |
| 673 | } | 673 | } |
| 674 | if (radeon_encoder_is_dp_bridge(encoder)) { | ||
| 675 | struct drm_encoder *ext_encoder = radeon_atom_get_external_encoder(encoder); | ||
| 676 | struct radeon_encoder *ext_radeon_encoder = to_radeon_encoder(ext_encoder); | ||
| 677 | args.v3.sInput.ucExtTransmitterID = ext_radeon_encoder->encoder_id; | ||
| 678 | } else | ||
| 679 | args.v3.sInput.ucExtTransmitterID = 0; | ||
| 680 | |||
| 674 | atom_execute_table(rdev->mode_info.atom_context, | 681 | atom_execute_table(rdev->mode_info.atom_context, |
| 675 | index, (uint32_t *)&args); | 682 | index, (uint32_t *)&args); |
| 676 | adjusted_clock = le32_to_cpu(args.v3.sOutput.ulDispPllFreq) * 10; | 683 | adjusted_clock = le32_to_cpu(args.v3.sOutput.ulDispPllFreq) * 10; |
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 86157b172c88..7e3d96e7ac04 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
| @@ -88,7 +88,8 @@ u32 evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) | |||
| 88 | /* get temperature in millidegrees */ | 88 | /* get temperature in millidegrees */ |
| 89 | int evergreen_get_temp(struct radeon_device *rdev) | 89 | int evergreen_get_temp(struct radeon_device *rdev) |
| 90 | { | 90 | { |
| 91 | u32 temp, toffset, actual_temp = 0; | 91 | u32 temp, toffset; |
| 92 | int actual_temp = 0; | ||
| 92 | 93 | ||
| 93 | if (rdev->family == CHIP_JUNIPER) { | 94 | if (rdev->family == CHIP_JUNIPER) { |
| 94 | toffset = (RREG32(CG_THERMAL_CTRL) & TOFFSET_MASK) >> | 95 | toffset = (RREG32(CG_THERMAL_CTRL) & TOFFSET_MASK) >> |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index 9bd162fc9b0c..b2449629537d 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
| @@ -938,6 +938,13 @@ static struct radeon_asic cayman_asic = { | |||
| 938 | int radeon_asic_init(struct radeon_device *rdev) | 938 | int radeon_asic_init(struct radeon_device *rdev) |
| 939 | { | 939 | { |
| 940 | radeon_register_accessor_init(rdev); | 940 | radeon_register_accessor_init(rdev); |
| 941 | |||
| 942 | /* set the number of crtcs */ | ||
| 943 | if (rdev->flags & RADEON_SINGLE_CRTC) | ||
| 944 | rdev->num_crtc = 1; | ||
| 945 | else | ||
| 946 | rdev->num_crtc = 2; | ||
| 947 | |||
| 941 | switch (rdev->family) { | 948 | switch (rdev->family) { |
| 942 | case CHIP_R100: | 949 | case CHIP_R100: |
| 943 | case CHIP_RV100: | 950 | case CHIP_RV100: |
| @@ -1017,6 +1024,11 @@ int radeon_asic_init(struct radeon_device *rdev) | |||
| 1017 | case CHIP_JUNIPER: | 1024 | case CHIP_JUNIPER: |
| 1018 | case CHIP_CYPRESS: | 1025 | case CHIP_CYPRESS: |
| 1019 | case CHIP_HEMLOCK: | 1026 | case CHIP_HEMLOCK: |
| 1027 | /* set num crtcs */ | ||
| 1028 | if (rdev->family == CHIP_CEDAR) | ||
| 1029 | rdev->num_crtc = 4; | ||
| 1030 | else | ||
| 1031 | rdev->num_crtc = 6; | ||
| 1020 | rdev->asic = &evergreen_asic; | 1032 | rdev->asic = &evergreen_asic; |
| 1021 | break; | 1033 | break; |
| 1022 | case CHIP_PALM: | 1034 | case CHIP_PALM: |
| @@ -1027,10 +1039,17 @@ int radeon_asic_init(struct radeon_device *rdev) | |||
| 1027 | case CHIP_BARTS: | 1039 | case CHIP_BARTS: |
| 1028 | case CHIP_TURKS: | 1040 | case CHIP_TURKS: |
| 1029 | case CHIP_CAICOS: | 1041 | case CHIP_CAICOS: |
| 1042 | /* set num crtcs */ | ||
| 1043 | if (rdev->family == CHIP_CAICOS) | ||
| 1044 | rdev->num_crtc = 4; | ||
| 1045 | else | ||
| 1046 | rdev->num_crtc = 6; | ||
| 1030 | rdev->asic = &btc_asic; | 1047 | rdev->asic = &btc_asic; |
| 1031 | break; | 1048 | break; |
| 1032 | case CHIP_CAYMAN: | 1049 | case CHIP_CAYMAN: |
| 1033 | rdev->asic = &cayman_asic; | 1050 | rdev->asic = &cayman_asic; |
| 1051 | /* set num crtcs */ | ||
| 1052 | rdev->num_crtc = 6; | ||
| 1034 | break; | 1053 | break; |
| 1035 | default: | 1054 | default: |
| 1036 | /* FIXME: not supported yet */ | 1055 | /* FIXME: not supported yet */ |
| @@ -1042,18 +1061,6 @@ int radeon_asic_init(struct radeon_device *rdev) | |||
| 1042 | rdev->asic->set_memory_clock = NULL; | 1061 | rdev->asic->set_memory_clock = NULL; |
| 1043 | } | 1062 | } |
| 1044 | 1063 | ||
| 1045 | /* set the number of crtcs */ | ||
| 1046 | if (rdev->flags & RADEON_SINGLE_CRTC) | ||
| 1047 | rdev->num_crtc = 1; | ||
| 1048 | else { | ||
| 1049 | if (ASIC_IS_DCE41(rdev)) | ||
| 1050 | rdev->num_crtc = 2; | ||
| 1051 | else if (ASIC_IS_DCE4(rdev)) | ||
| 1052 | rdev->num_crtc = 6; | ||
| 1053 | else | ||
| 1054 | rdev->num_crtc = 2; | ||
| 1055 | } | ||
| 1056 | |||
| 1057 | return 0; | 1064 | return 0; |
| 1058 | } | 1065 | } |
| 1059 | 1066 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c index 797c8bcbb6a4..e4594676a07c 100644 --- a/drivers/gpu/drm/radeon/radeon_combios.c +++ b/drivers/gpu/drm/radeon/radeon_combios.c | |||
| @@ -1553,9 +1553,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
| 1553 | (rdev->pdev->subsystem_device == 0x4a48)) { | 1553 | (rdev->pdev->subsystem_device == 0x4a48)) { |
| 1554 | /* Mac X800 */ | 1554 | /* Mac X800 */ |
| 1555 | rdev->mode_info.connector_table = CT_MAC_X800; | 1555 | rdev->mode_info.connector_table = CT_MAC_X800; |
| 1556 | } else if (of_machine_is_compatible("PowerMac7,2") || | 1556 | } else if ((of_machine_is_compatible("PowerMac7,2") || |
| 1557 | of_machine_is_compatible("PowerMac7,3")) { | 1557 | of_machine_is_compatible("PowerMac7,3")) && |
| 1558 | /* Mac G5 9600 */ | 1558 | (rdev->pdev->device == 0x4150) && |
| 1559 | (rdev->pdev->subsystem_vendor == 0x1002) && | ||
| 1560 | (rdev->pdev->subsystem_device == 0x4150)) { | ||
| 1561 | /* Mac G5 tower 9600 */ | ||
| 1559 | rdev->mode_info.connector_table = CT_MAC_G5_9600; | 1562 | rdev->mode_info.connector_table = CT_MAC_G5_9600; |
| 1560 | } else | 1563 | } else |
| 1561 | #endif /* CONFIG_PPC_PMAC */ | 1564 | #endif /* CONFIG_PPC_PMAC */ |
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index 9c2929c7e79f..cbfca3a24fdf 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c | |||
| @@ -44,6 +44,8 @@ extern void | |||
| 44 | radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder, | 44 | radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder, |
| 45 | struct drm_connector *drm_connector); | 45 | struct drm_connector *drm_connector); |
| 46 | 46 | ||
| 47 | bool radeon_connector_encoder_is_dp_bridge(struct drm_connector *connector); | ||
| 48 | |||
| 47 | void radeon_connector_hotplug(struct drm_connector *connector) | 49 | void radeon_connector_hotplug(struct drm_connector *connector) |
| 48 | { | 50 | { |
| 49 | struct drm_device *dev = connector->dev; | 51 | struct drm_device *dev = connector->dev; |
| @@ -836,6 +838,13 @@ radeon_dvi_detect(struct drm_connector *connector, bool force) | |||
| 836 | if (!radeon_connector->edid) { | 838 | if (!radeon_connector->edid) { |
| 837 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", | 839 | DRM_ERROR("%s: probed a monitor but no|invalid EDID\n", |
| 838 | drm_get_connector_name(connector)); | 840 | drm_get_connector_name(connector)); |
| 841 | /* rs690 seems to have a problem with connectors not existing and always | ||
| 842 | * return a block of 0's. If we see this just stop polling on this output */ | ||
| 843 | if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) && radeon_connector->base.null_edid_counter) { | ||
| 844 | ret = connector_status_disconnected; | ||
| 845 | DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector)); | ||
| 846 | radeon_connector->ddc_bus = NULL; | ||
| 847 | } | ||
| 839 | } else { | 848 | } else { |
| 840 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | 849 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); |
| 841 | 850 | ||
| @@ -1063,10 +1072,11 @@ static int radeon_dp_get_modes(struct drm_connector *connector) | |||
| 1063 | { | 1072 | { |
| 1064 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | 1073 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
| 1065 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | 1074 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
| 1075 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); | ||
| 1066 | int ret; | 1076 | int ret; |
| 1067 | 1077 | ||
| 1068 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { | 1078 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
| 1069 | struct drm_encoder *encoder; | 1079 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { |
| 1070 | struct drm_display_mode *mode; | 1080 | struct drm_display_mode *mode; |
| 1071 | 1081 | ||
| 1072 | if (!radeon_dig_connector->edp_on) | 1082 | if (!radeon_dig_connector->edp_on) |
| @@ -1078,7 +1088,6 @@ static int radeon_dp_get_modes(struct drm_connector *connector) | |||
| 1078 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | 1088 | ATOM_TRANSMITTER_ACTION_POWER_OFF); |
| 1079 | 1089 | ||
| 1080 | if (ret > 0) { | 1090 | if (ret > 0) { |
| 1081 | encoder = radeon_best_single_encoder(connector); | ||
| 1082 | if (encoder) { | 1091 | if (encoder) { |
| 1083 | radeon_fixup_lvds_native_mode(encoder, connector); | 1092 | radeon_fixup_lvds_native_mode(encoder, connector); |
| 1084 | /* add scaled modes */ | 1093 | /* add scaled modes */ |
| @@ -1102,8 +1111,14 @@ static int radeon_dp_get_modes(struct drm_connector *connector) | |||
| 1102 | /* add scaled modes */ | 1111 | /* add scaled modes */ |
| 1103 | radeon_add_common_modes(encoder, connector); | 1112 | radeon_add_common_modes(encoder, connector); |
| 1104 | } | 1113 | } |
| 1105 | } else | 1114 | } else { |
| 1115 | /* need to setup ddc on the bridge */ | ||
| 1116 | if (radeon_connector_encoder_is_dp_bridge(connector)) { | ||
| 1117 | if (encoder) | ||
| 1118 | radeon_atom_ext_encoder_setup_ddc(encoder); | ||
| 1119 | } | ||
| 1106 | ret = radeon_ddc_get_modes(radeon_connector); | 1120 | ret = radeon_ddc_get_modes(radeon_connector); |
| 1121 | } | ||
| 1107 | 1122 | ||
| 1108 | return ret; | 1123 | return ret; |
| 1109 | } | 1124 | } |
| @@ -1187,14 +1202,15 @@ radeon_dp_detect(struct drm_connector *connector, bool force) | |||
| 1187 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | 1202 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
| 1188 | enum drm_connector_status ret = connector_status_disconnected; | 1203 | enum drm_connector_status ret = connector_status_disconnected; |
| 1189 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | 1204 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
| 1205 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); | ||
| 1190 | 1206 | ||
| 1191 | if (radeon_connector->edid) { | 1207 | if (radeon_connector->edid) { |
| 1192 | kfree(radeon_connector->edid); | 1208 | kfree(radeon_connector->edid); |
| 1193 | radeon_connector->edid = NULL; | 1209 | radeon_connector->edid = NULL; |
| 1194 | } | 1210 | } |
| 1195 | 1211 | ||
| 1196 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { | 1212 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
| 1197 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); | 1213 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { |
| 1198 | if (encoder) { | 1214 | if (encoder) { |
| 1199 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 1215 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
| 1200 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | 1216 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
| @@ -1214,6 +1230,11 @@ radeon_dp_detect(struct drm_connector *connector, bool force) | |||
| 1214 | atombios_set_edp_panel_power(connector, | 1230 | atombios_set_edp_panel_power(connector, |
| 1215 | ATOM_TRANSMITTER_ACTION_POWER_OFF); | 1231 | ATOM_TRANSMITTER_ACTION_POWER_OFF); |
| 1216 | } else { | 1232 | } else { |
| 1233 | /* need to setup ddc on the bridge */ | ||
| 1234 | if (radeon_connector_encoder_is_dp_bridge(connector)) { | ||
| 1235 | if (encoder) | ||
| 1236 | radeon_atom_ext_encoder_setup_ddc(encoder); | ||
| 1237 | } | ||
| 1217 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); | 1238 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); |
| 1218 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { | 1239 | if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) { |
| 1219 | ret = connector_status_connected; | 1240 | ret = connector_status_connected; |
| @@ -1228,6 +1249,16 @@ radeon_dp_detect(struct drm_connector *connector, bool force) | |||
| 1228 | ret = connector_status_connected; | 1249 | ret = connector_status_connected; |
| 1229 | } | 1250 | } |
| 1230 | } | 1251 | } |
| 1252 | |||
| 1253 | if ((ret == connector_status_disconnected) && | ||
| 1254 | radeon_connector->dac_load_detect) { | ||
| 1255 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); | ||
| 1256 | struct drm_encoder_helper_funcs *encoder_funcs; | ||
| 1257 | if (encoder) { | ||
| 1258 | encoder_funcs = encoder->helper_private; | ||
| 1259 | ret = encoder_funcs->detect(encoder, connector); | ||
| 1260 | } | ||
| 1261 | } | ||
| 1231 | } | 1262 | } |
| 1232 | 1263 | ||
| 1233 | radeon_connector_update_scratch_regs(connector, ret); | 1264 | radeon_connector_update_scratch_regs(connector, ret); |
| @@ -1242,7 +1273,8 @@ static int radeon_dp_mode_valid(struct drm_connector *connector, | |||
| 1242 | 1273 | ||
| 1243 | /* XXX check mode bandwidth */ | 1274 | /* XXX check mode bandwidth */ |
| 1244 | 1275 | ||
| 1245 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { | 1276 | if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) || |
| 1277 | (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) { | ||
| 1246 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); | 1278 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); |
| 1247 | 1279 | ||
| 1248 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | 1280 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) |
| @@ -1252,7 +1284,7 @@ static int radeon_dp_mode_valid(struct drm_connector *connector, | |||
| 1252 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 1284 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
| 1253 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | 1285 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
| 1254 | 1286 | ||
| 1255 | /* AVIVO hardware supports downscaling modes larger than the panel | 1287 | /* AVIVO hardware supports downscaling modes larger than the panel |
| 1256 | * to the panel size, but I'm not sure this is desirable. | 1288 | * to the panel size, but I'm not sure this is desirable. |
| 1257 | */ | 1289 | */ |
| 1258 | if ((mode->hdisplay > native_mode->hdisplay) || | 1290 | if ((mode->hdisplay > native_mode->hdisplay) || |
| @@ -1401,6 +1433,10 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
| 1401 | default: | 1433 | default: |
| 1402 | connector->interlace_allowed = true; | 1434 | connector->interlace_allowed = true; |
| 1403 | connector->doublescan_allowed = true; | 1435 | connector->doublescan_allowed = true; |
| 1436 | radeon_connector->dac_load_detect = true; | ||
| 1437 | drm_connector_attach_property(&radeon_connector->base, | ||
| 1438 | rdev->mode_info.load_detect_property, | ||
| 1439 | 1); | ||
| 1404 | break; | 1440 | break; |
| 1405 | case DRM_MODE_CONNECTOR_DVII: | 1441 | case DRM_MODE_CONNECTOR_DVII: |
| 1406 | case DRM_MODE_CONNECTOR_DVID: | 1442 | case DRM_MODE_CONNECTOR_DVID: |
| @@ -1422,6 +1458,12 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
| 1422 | connector->doublescan_allowed = true; | 1458 | connector->doublescan_allowed = true; |
| 1423 | else | 1459 | else |
| 1424 | connector->doublescan_allowed = false; | 1460 | connector->doublescan_allowed = false; |
| 1461 | if (connector_type == DRM_MODE_CONNECTOR_DVII) { | ||
| 1462 | radeon_connector->dac_load_detect = true; | ||
| 1463 | drm_connector_attach_property(&radeon_connector->base, | ||
| 1464 | rdev->mode_info.load_detect_property, | ||
| 1465 | 1); | ||
| 1466 | } | ||
| 1425 | break; | 1467 | break; |
| 1426 | case DRM_MODE_CONNECTOR_LVDS: | 1468 | case DRM_MODE_CONNECTOR_LVDS: |
| 1427 | case DRM_MODE_CONNECTOR_eDP: | 1469 | case DRM_MODE_CONNECTOR_eDP: |
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index e680501c78ea..7cfaa7e2f3b5 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
| @@ -215,6 +215,8 @@ int radeon_wb_init(struct radeon_device *rdev) | |||
| 215 | return r; | 215 | return r; |
| 216 | } | 216 | } |
| 217 | 217 | ||
| 218 | /* clear wb memory */ | ||
| 219 | memset((char *)rdev->wb.wb, 0, RADEON_GPU_PAGE_SIZE); | ||
| 218 | /* disable event_write fences */ | 220 | /* disable event_write fences */ |
| 219 | rdev->wb.use_event = false; | 221 | rdev->wb.use_event = false; |
| 220 | /* disabled via module param */ | 222 | /* disabled via module param */ |
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c index 03f124d626c2..f55b64cb59d1 100644 --- a/drivers/gpu/drm/radeon/radeon_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_encoders.c | |||
| @@ -367,7 +367,8 @@ static bool radeon_atom_mode_fixup(struct drm_encoder *encoder, | |||
| 367 | } | 367 | } |
| 368 | 368 | ||
| 369 | if (ASIC_IS_DCE3(rdev) && | 369 | if (ASIC_IS_DCE3(rdev) && |
| 370 | (radeon_encoder->active_device & (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT))) { | 370 | ((radeon_encoder->active_device & (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT)) || |
| 371 | radeon_encoder_is_dp_bridge(encoder))) { | ||
| 371 | struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); | 372 | struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); |
| 372 | radeon_dp_set_link_config(connector, mode); | 373 | radeon_dp_set_link_config(connector, mode); |
| 373 | } | 374 | } |
| @@ -660,21 +661,16 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) | |||
| 660 | if (radeon_encoder_is_dp_bridge(encoder)) | 661 | if (radeon_encoder_is_dp_bridge(encoder)) |
| 661 | return ATOM_ENCODER_MODE_DP; | 662 | return ATOM_ENCODER_MODE_DP; |
| 662 | 663 | ||
| 664 | /* DVO is always DVO */ | ||
| 665 | if (radeon_encoder->encoder_id == ATOM_ENCODER_MODE_DVO) | ||
| 666 | return ATOM_ENCODER_MODE_DVO; | ||
| 667 | |||
| 663 | connector = radeon_get_connector_for_encoder(encoder); | 668 | connector = radeon_get_connector_for_encoder(encoder); |
| 664 | if (!connector) { | 669 | /* if we don't have an active device yet, just use one of |
| 665 | switch (radeon_encoder->encoder_id) { | 670 | * the connectors tied to the encoder. |
| 666 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: | 671 | */ |
| 667 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: | 672 | if (!connector) |
| 668 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: | 673 | connector = radeon_get_connector_for_encoder_init(encoder); |
| 669 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: | ||
| 670 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: | ||
| 671 | return ATOM_ENCODER_MODE_DVI; | ||
| 672 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: | ||
| 673 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2: | ||
| 674 | default: | ||
| 675 | return ATOM_ENCODER_MODE_CRT; | ||
| 676 | } | ||
| 677 | } | ||
| 678 | radeon_connector = to_radeon_connector(connector); | 674 | radeon_connector = to_radeon_connector(connector); |
| 679 | 675 | ||
| 680 | switch (connector->connector_type) { | 676 | switch (connector->connector_type) { |
| @@ -1526,26 +1522,29 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode) | |||
| 1526 | } | 1522 | } |
| 1527 | 1523 | ||
| 1528 | if (ext_encoder) { | 1524 | if (ext_encoder) { |
| 1529 | int action; | ||
| 1530 | |||
| 1531 | switch (mode) { | 1525 | switch (mode) { |
| 1532 | case DRM_MODE_DPMS_ON: | 1526 | case DRM_MODE_DPMS_ON: |
| 1533 | default: | 1527 | default: |
| 1534 | if (ASIC_IS_DCE41(rdev)) | 1528 | if (ASIC_IS_DCE41(rdev)) { |
| 1535 | action = EXTERNAL_ENCODER_ACTION_V3_ENABLE_OUTPUT; | 1529 | atombios_external_encoder_setup(encoder, ext_encoder, |
| 1536 | else | 1530 | EXTERNAL_ENCODER_ACTION_V3_ENABLE_OUTPUT); |
| 1537 | action = ATOM_ENABLE; | 1531 | atombios_external_encoder_setup(encoder, ext_encoder, |
| 1532 | EXTERNAL_ENCODER_ACTION_V3_ENCODER_BLANKING_OFF); | ||
| 1533 | } else | ||
| 1534 | atombios_external_encoder_setup(encoder, ext_encoder, ATOM_ENABLE); | ||
| 1538 | break; | 1535 | break; |
| 1539 | case DRM_MODE_DPMS_STANDBY: | 1536 | case DRM_MODE_DPMS_STANDBY: |
| 1540 | case DRM_MODE_DPMS_SUSPEND: | 1537 | case DRM_MODE_DPMS_SUSPEND: |
| 1541 | case DRM_MODE_DPMS_OFF: | 1538 | case DRM_MODE_DPMS_OFF: |
| 1542 | if (ASIC_IS_DCE41(rdev)) | 1539 | if (ASIC_IS_DCE41(rdev)) { |
| 1543 | action = EXTERNAL_ENCODER_ACTION_V3_DISABLE_OUTPUT; | 1540 | atombios_external_encoder_setup(encoder, ext_encoder, |
| 1544 | else | 1541 | EXTERNAL_ENCODER_ACTION_V3_ENCODER_BLANKING); |
| 1545 | action = ATOM_DISABLE; | 1542 | atombios_external_encoder_setup(encoder, ext_encoder, |
| 1543 | EXTERNAL_ENCODER_ACTION_V3_DISABLE_OUTPUT); | ||
| 1544 | } else | ||
| 1545 | atombios_external_encoder_setup(encoder, ext_encoder, ATOM_DISABLE); | ||
| 1546 | break; | 1546 | break; |
| 1547 | } | 1547 | } |
| 1548 | atombios_external_encoder_setup(encoder, ext_encoder, action); | ||
| 1549 | } | 1548 | } |
| 1550 | 1549 | ||
| 1551 | radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); | 1550 | radeon_atombios_encoder_dpms_scratch_regs(encoder, (mode == DRM_MODE_DPMS_ON) ? true : false); |
| @@ -2004,6 +2003,65 @@ radeon_atom_dac_detect(struct drm_encoder *encoder, struct drm_connector *connec | |||
| 2004 | return connector_status_disconnected; | 2003 | return connector_status_disconnected; |
| 2005 | } | 2004 | } |
| 2006 | 2005 | ||
| 2006 | static enum drm_connector_status | ||
| 2007 | radeon_atom_dig_detect(struct drm_encoder *encoder, struct drm_connector *connector) | ||
| 2008 | { | ||
| 2009 | struct drm_device *dev = encoder->dev; | ||
| 2010 | struct radeon_device *rdev = dev->dev_private; | ||
| 2011 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | ||
| 2012 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | ||
| 2013 | struct drm_encoder *ext_encoder = radeon_atom_get_external_encoder(encoder); | ||
| 2014 | u32 bios_0_scratch; | ||
| 2015 | |||
| 2016 | if (!ASIC_IS_DCE4(rdev)) | ||
| 2017 | return connector_status_unknown; | ||
| 2018 | |||
| 2019 | if (!ext_encoder) | ||
| 2020 | return connector_status_unknown; | ||
| 2021 | |||
| 2022 | if ((radeon_connector->devices & ATOM_DEVICE_CRT_SUPPORT) == 0) | ||
| 2023 | return connector_status_unknown; | ||
| 2024 | |||
| 2025 | /* load detect on the dp bridge */ | ||
| 2026 | atombios_external_encoder_setup(encoder, ext_encoder, | ||
| 2027 | EXTERNAL_ENCODER_ACTION_V3_DACLOAD_DETECTION); | ||
| 2028 | |||
| 2029 | bios_0_scratch = RREG32(R600_BIOS_0_SCRATCH); | ||
| 2030 | |||
| 2031 | DRM_DEBUG_KMS("Bios 0 scratch %x %08x\n", bios_0_scratch, radeon_encoder->devices); | ||
| 2032 | if (radeon_connector->devices & ATOM_DEVICE_CRT1_SUPPORT) { | ||
| 2033 | if (bios_0_scratch & ATOM_S0_CRT1_MASK) | ||
| 2034 | return connector_status_connected; | ||
| 2035 | } | ||
| 2036 | if (radeon_connector->devices & ATOM_DEVICE_CRT2_SUPPORT) { | ||
| 2037 | if (bios_0_scratch & ATOM_S0_CRT2_MASK) | ||
| 2038 | return connector_status_connected; | ||
| 2039 | } | ||
| 2040 | if (radeon_connector->devices & ATOM_DEVICE_CV_SUPPORT) { | ||
| 2041 | if (bios_0_scratch & (ATOM_S0_CV_MASK|ATOM_S0_CV_MASK_A)) | ||
| 2042 | return connector_status_connected; | ||
| 2043 | } | ||
| 2044 | if (radeon_connector->devices & ATOM_DEVICE_TV1_SUPPORT) { | ||
| 2045 | if (bios_0_scratch & (ATOM_S0_TV1_COMPOSITE | ATOM_S0_TV1_COMPOSITE_A)) | ||
| 2046 | return connector_status_connected; /* CTV */ | ||
| 2047 | else if (bios_0_scratch & (ATOM_S0_TV1_SVIDEO | ATOM_S0_TV1_SVIDEO_A)) | ||
| 2048 | return connector_status_connected; /* STV */ | ||
| 2049 | } | ||
| 2050 | return connector_status_disconnected; | ||
| 2051 | } | ||
| 2052 | |||
| 2053 | void | ||
| 2054 | radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder) | ||
| 2055 | { | ||
| 2056 | struct drm_encoder *ext_encoder = radeon_atom_get_external_encoder(encoder); | ||
| 2057 | |||
| 2058 | if (ext_encoder) | ||
| 2059 | /* ddc_setup on the dp bridge */ | ||
| 2060 | atombios_external_encoder_setup(encoder, ext_encoder, | ||
| 2061 | EXTERNAL_ENCODER_ACTION_V3_DDC_SETUP); | ||
| 2062 | |||
| 2063 | } | ||
| 2064 | |||
| 2007 | static void radeon_atom_encoder_prepare(struct drm_encoder *encoder) | 2065 | static void radeon_atom_encoder_prepare(struct drm_encoder *encoder) |
| 2008 | { | 2066 | { |
| 2009 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 2067 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
| @@ -2167,7 +2225,7 @@ static const struct drm_encoder_helper_funcs radeon_atom_dig_helper_funcs = { | |||
| 2167 | .mode_set = radeon_atom_encoder_mode_set, | 2225 | .mode_set = radeon_atom_encoder_mode_set, |
| 2168 | .commit = radeon_atom_encoder_commit, | 2226 | .commit = radeon_atom_encoder_commit, |
| 2169 | .disable = radeon_atom_encoder_disable, | 2227 | .disable = radeon_atom_encoder_disable, |
| 2170 | /* no detect for TMDS/LVDS yet */ | 2228 | .detect = radeon_atom_dig_detect, |
| 2171 | }; | 2229 | }; |
| 2172 | 2230 | ||
| 2173 | static const struct drm_encoder_helper_funcs radeon_atom_dac_helper_funcs = { | 2231 | static const struct drm_encoder_helper_funcs radeon_atom_dac_helper_funcs = { |
diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c index 1f8229436570..021d2b6b556f 100644 --- a/drivers/gpu/drm/radeon/radeon_fence.c +++ b/drivers/gpu/drm/radeon/radeon_fence.c | |||
| @@ -40,6 +40,35 @@ | |||
| 40 | #include "radeon.h" | 40 | #include "radeon.h" |
| 41 | #include "radeon_trace.h" | 41 | #include "radeon_trace.h" |
| 42 | 42 | ||
| 43 | static void radeon_fence_write(struct radeon_device *rdev, u32 seq) | ||
| 44 | { | ||
| 45 | if (rdev->wb.enabled) { | ||
| 46 | u32 scratch_index; | ||
| 47 | if (rdev->wb.use_event) | ||
| 48 | scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base; | ||
| 49 | else | ||
| 50 | scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base; | ||
| 51 | rdev->wb.wb[scratch_index/4] = cpu_to_le32(seq);; | ||
| 52 | } else | ||
| 53 | WREG32(rdev->fence_drv.scratch_reg, seq); | ||
| 54 | } | ||
| 55 | |||
| 56 | static u32 radeon_fence_read(struct radeon_device *rdev) | ||
| 57 | { | ||
| 58 | u32 seq; | ||
| 59 | |||
| 60 | if (rdev->wb.enabled) { | ||
| 61 | u32 scratch_index; | ||
| 62 | if (rdev->wb.use_event) | ||
| 63 | scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base; | ||
| 64 | else | ||
| 65 | scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base; | ||
| 66 | seq = le32_to_cpu(rdev->wb.wb[scratch_index/4]); | ||
| 67 | } else | ||
| 68 | seq = RREG32(rdev->fence_drv.scratch_reg); | ||
| 69 | return seq; | ||
| 70 | } | ||
| 71 | |||
| 43 | int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence) | 72 | int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence) |
| 44 | { | 73 | { |
| 45 | unsigned long irq_flags; | 74 | unsigned long irq_flags; |
| @@ -50,12 +79,12 @@ int radeon_fence_emit(struct radeon_device *rdev, struct radeon_fence *fence) | |||
| 50 | return 0; | 79 | return 0; |
| 51 | } | 80 | } |
| 52 | fence->seq = atomic_add_return(1, &rdev->fence_drv.seq); | 81 | fence->seq = atomic_add_return(1, &rdev->fence_drv.seq); |
| 53 | if (!rdev->cp.ready) { | 82 | if (!rdev->cp.ready) |
| 54 | /* FIXME: cp is not running assume everythings is done right | 83 | /* FIXME: cp is not running assume everythings is done right |
| 55 | * away | 84 | * away |
| 56 | */ | 85 | */ |
| 57 | WREG32(rdev->fence_drv.scratch_reg, fence->seq); | 86 | radeon_fence_write(rdev, fence->seq); |
| 58 | } else | 87 | else |
| 59 | radeon_fence_ring_emit(rdev, fence); | 88 | radeon_fence_ring_emit(rdev, fence); |
| 60 | 89 | ||
| 61 | trace_radeon_fence_emit(rdev->ddev, fence->seq); | 90 | trace_radeon_fence_emit(rdev->ddev, fence->seq); |
| @@ -73,15 +102,7 @@ static bool radeon_fence_poll_locked(struct radeon_device *rdev) | |||
| 73 | bool wake = false; | 102 | bool wake = false; |
| 74 | unsigned long cjiffies; | 103 | unsigned long cjiffies; |
| 75 | 104 | ||
| 76 | if (rdev->wb.enabled) { | 105 | seq = radeon_fence_read(rdev); |
| 77 | u32 scratch_index; | ||
| 78 | if (rdev->wb.use_event) | ||
| 79 | scratch_index = R600_WB_EVENT_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base; | ||
| 80 | else | ||
| 81 | scratch_index = RADEON_WB_SCRATCH_OFFSET + rdev->fence_drv.scratch_reg - rdev->scratch.reg_base; | ||
| 82 | seq = le32_to_cpu(rdev->wb.wb[scratch_index/4]); | ||
| 83 | } else | ||
| 84 | seq = RREG32(rdev->fence_drv.scratch_reg); | ||
| 85 | if (seq != rdev->fence_drv.last_seq) { | 106 | if (seq != rdev->fence_drv.last_seq) { |
| 86 | rdev->fence_drv.last_seq = seq; | 107 | rdev->fence_drv.last_seq = seq; |
| 87 | rdev->fence_drv.last_jiffies = jiffies; | 108 | rdev->fence_drv.last_jiffies = jiffies; |
| @@ -251,7 +272,7 @@ retry: | |||
| 251 | r = radeon_gpu_reset(rdev); | 272 | r = radeon_gpu_reset(rdev); |
| 252 | if (r) | 273 | if (r) |
| 253 | return r; | 274 | return r; |
| 254 | WREG32(rdev->fence_drv.scratch_reg, fence->seq); | 275 | radeon_fence_write(rdev, fence->seq); |
| 255 | rdev->gpu_lockup = false; | 276 | rdev->gpu_lockup = false; |
| 256 | } | 277 | } |
| 257 | timeout = RADEON_FENCE_JIFFIES_TIMEOUT; | 278 | timeout = RADEON_FENCE_JIFFIES_TIMEOUT; |
| @@ -351,7 +372,7 @@ int radeon_fence_driver_init(struct radeon_device *rdev) | |||
| 351 | write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); | 372 | write_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); |
| 352 | return r; | 373 | return r; |
| 353 | } | 374 | } |
| 354 | WREG32(rdev->fence_drv.scratch_reg, 0); | 375 | radeon_fence_write(rdev, 0); |
| 355 | atomic_set(&rdev->fence_drv.seq, 0); | 376 | atomic_set(&rdev->fence_drv.seq, 0); |
| 356 | INIT_LIST_HEAD(&rdev->fence_drv.created); | 377 | INIT_LIST_HEAD(&rdev->fence_drv.created); |
| 357 | INIT_LIST_HEAD(&rdev->fence_drv.emited); | 378 | INIT_LIST_HEAD(&rdev->fence_drv.emited); |
| @@ -391,7 +412,7 @@ static int radeon_debugfs_fence_info(struct seq_file *m, void *data) | |||
| 391 | struct radeon_fence *fence; | 412 | struct radeon_fence *fence; |
| 392 | 413 | ||
| 393 | seq_printf(m, "Last signaled fence 0x%08X\n", | 414 | seq_printf(m, "Last signaled fence 0x%08X\n", |
| 394 | RREG32(rdev->fence_drv.scratch_reg)); | 415 | radeon_fence_read(rdev)); |
| 395 | if (!list_empty(&rdev->fence_drv.emited)) { | 416 | if (!list_empty(&rdev->fence_drv.emited)) { |
| 396 | fence = list_entry(rdev->fence_drv.emited.prev, | 417 | fence = list_entry(rdev->fence_drv.emited.prev, |
| 397 | struct radeon_fence, list); | 418 | struct radeon_fence, list); |
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h index 977a341266b6..6df4e3cec0c2 100644 --- a/drivers/gpu/drm/radeon/radeon_mode.h +++ b/drivers/gpu/drm/radeon/radeon_mode.h | |||
| @@ -483,6 +483,8 @@ extern void radeon_atom_encoder_init(struct radeon_device *rdev); | |||
| 483 | extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder, | 483 | extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder, |
| 484 | int action, uint8_t lane_num, | 484 | int action, uint8_t lane_num, |
| 485 | uint8_t lane_set); | 485 | uint8_t lane_set); |
| 486 | extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder); | ||
| 487 | extern struct drm_encoder *radeon_atom_get_external_encoder(struct drm_encoder *encoder); | ||
| 486 | extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, | 488 | extern int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, |
| 487 | u8 write_byte, u8 *read_byte); | 489 | u8 write_byte, u8 *read_byte); |
| 488 | 490 | ||
