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-rw-r--r--drivers/char/hw_random/omap-rng.c26
-rw-r--r--drivers/crypto/Kconfig14
-rw-r--r--drivers/crypto/padlock-aes.c320
3 files changed, 46 insertions, 314 deletions
diff --git a/drivers/char/hw_random/omap-rng.c b/drivers/char/hw_random/omap-rng.c
index 7e319951fa41..51738bdd834e 100644
--- a/drivers/char/hw_random/omap-rng.c
+++ b/drivers/char/hw_random/omap-rng.c
@@ -1,7 +1,5 @@
1/* 1/*
2 * drivers/char/hw_random/omap-rng.c 2 * omap-rng.c - RNG driver for TI OMAP CPU family
3 *
4 * RNG driver for TI OMAP CPU family
5 * 3 *
6 * Author: Deepak Saxena <dsaxena@plexity.net> 4 * Author: Deepak Saxena <dsaxena@plexity.net>
7 * 5 *
@@ -15,11 +13,6 @@
15 * This file is licensed under the terms of the GNU General Public 13 * This file is licensed under the terms of the GNU General Public
16 * License version 2. This program is licensed "as is" without any 14 * License version 2. This program is licensed "as is" without any
17 * warranty of any kind, whether express or implied. 15 * warranty of any kind, whether express or implied.
18 *
19 * TODO:
20 *
21 * - Make status updated be interrupt driven so we don't poll
22 *
23 */ 16 */
24 17
25#include <linux/module.h> 18#include <linux/module.h>
@@ -55,17 +48,16 @@ static void __iomem *rng_base;
55static struct clk *rng_ick; 48static struct clk *rng_ick;
56static struct platform_device *rng_dev; 49static struct platform_device *rng_dev;
57 50
58static u32 omap_rng_read_reg(int reg) 51static inline u32 omap_rng_read_reg(int reg)
59{ 52{
60 return __raw_readl(rng_base + reg); 53 return __raw_readl(rng_base + reg);
61} 54}
62 55
63static void omap_rng_write_reg(int reg, u32 val) 56static inline void omap_rng_write_reg(int reg, u32 val)
64{ 57{
65 __raw_writel(val, rng_base + reg); 58 __raw_writel(val, rng_base + reg);
66} 59}
67 60
68/* REVISIT: Does the status bit really work on 16xx? */
69static int omap_rng_data_present(struct hwrng *rng, int wait) 61static int omap_rng_data_present(struct hwrng *rng, int wait)
70{ 62{
71 int data, i; 63 int data, i;
@@ -74,6 +66,11 @@ static int omap_rng_data_present(struct hwrng *rng, int wait)
74 data = omap_rng_read_reg(RNG_STAT_REG) ? 0 : 1; 66 data = omap_rng_read_reg(RNG_STAT_REG) ? 0 : 1;
75 if (data || !wait) 67 if (data || !wait)
76 break; 68 break;
69 /* RNG produces data fast enough (2+ MBit/sec, even
70 * during "rngtest" loads, that these delays don't
71 * seem to trigger. We *could* use the RNG IRQ, but
72 * that'd be higher overhead ... so why bother?
73 */
77 udelay(10); 74 udelay(10);
78 } 75 }
79 return data; 76 return data;
@@ -101,7 +98,8 @@ static int __init omap_rng_probe(struct platform_device *pdev)
101 * A bit ugly, and it will never actually happen but there can 98 * A bit ugly, and it will never actually happen but there can
102 * be only one RNG and this catches any bork 99 * be only one RNG and this catches any bork
103 */ 100 */
104 BUG_ON(rng_dev); 101 if (rng_dev)
102 return -EBUSY;
105 103
106 if (cpu_is_omap24xx()) { 104 if (cpu_is_omap24xx()) {
107 rng_ick = clk_get(NULL, "rng_ick"); 105 rng_ick = clk_get(NULL, "rng_ick");
@@ -124,7 +122,7 @@ static int __init omap_rng_probe(struct platform_device *pdev)
124 return -EBUSY; 122 return -EBUSY;
125 123
126 dev_set_drvdata(&pdev->dev, mem); 124 dev_set_drvdata(&pdev->dev, mem);
127 rng_base = (u32 __iomem *)io_p2v(res->start); 125 rng_base = (u32 __force __iomem *)io_p2v(res->start);
128 126
129 ret = hwrng_register(&omap_rng_ops); 127 ret = hwrng_register(&omap_rng_ops);
130 if (ret) { 128 if (ret) {
@@ -182,6 +180,8 @@ static int omap_rng_resume(struct platform_device *pdev)
182 180
183#endif 181#endif
184 182
183/* work with hotplug and coldplug */
184MODULE_ALIAS("platform:omap_rng");
185 185
186static struct platform_driver omap_rng_driver = { 186static struct platform_driver omap_rng_driver = {
187 .driver = { 187 .driver = {
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 6d2f0c8d419a..43b71b69daa5 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -27,6 +27,7 @@ config CRYPTO_DEV_PADLOCK_AES
27 tristate "PadLock driver for AES algorithm" 27 tristate "PadLock driver for AES algorithm"
28 depends on CRYPTO_DEV_PADLOCK 28 depends on CRYPTO_DEV_PADLOCK
29 select CRYPTO_BLKCIPHER 29 select CRYPTO_BLKCIPHER
30 select CRYPTO_AES
30 help 31 help
31 Use VIA PadLock for AES algorithm. 32 Use VIA PadLock for AES algorithm.
32 33
@@ -101,6 +102,19 @@ config CRYPTO_SHA256_S390
101 This version of SHA implements a 256 bit hash with 128 bits of 102 This version of SHA implements a 256 bit hash with 128 bits of
102 security against collision attacks. 103 security against collision attacks.
103 104
105config CRYPTO_SHA512_S390
106 tristate "SHA384 and SHA512 digest algorithm"
107 depends on S390
108 select CRYPTO_ALGAPI
109 help
110 This is the s390 hardware accelerated implementation of the
111 SHA512 secure hash standard.
112
113 This version of SHA implements a 512 bit hash with 256 bits of
114 security against collision attacks. The code also includes SHA-384,
115 a 384 bit hash with 192 bits of security against collision attacks.
116
117
104config CRYPTO_DES_S390 118config CRYPTO_DES_S390
105 tristate "DES and Triple DES cipher algorithms" 119 tristate "DES and Triple DES cipher algorithms"
106 depends on S390 120 depends on S390
diff --git a/drivers/crypto/padlock-aes.c b/drivers/crypto/padlock-aes.c
index 2f3ad3f7dfea..bb30eb9b93ef 100644
--- a/drivers/crypto/padlock-aes.c
+++ b/drivers/crypto/padlock-aes.c
@@ -5,42 +5,6 @@
5 * 5 *
6 * Copyright (c) 2004 Michal Ludvig <michal@logix.cz> 6 * Copyright (c) 2004 Michal Ludvig <michal@logix.cz>
7 * 7 *
8 * Key expansion routine taken from crypto/aes_generic.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * ---------------------------------------------------------------------------
16 * Copyright (c) 2002, Dr Brian Gladman <brg@gladman.me.uk>, Worcester, UK.
17 * All rights reserved.
18 *
19 * LICENSE TERMS
20 *
21 * The free distribution and use of this software in both source and binary
22 * form is allowed (with or without changes) provided that:
23 *
24 * 1. distributions of this source code include the above copyright
25 * notice, this list of conditions and the following disclaimer;
26 *
27 * 2. distributions in binary form include the above copyright
28 * notice, this list of conditions and the following disclaimer
29 * in the documentation and/or other associated materials;
30 *
31 * 3. the copyright holder's name is not used to endorse products
32 * built using this software without specific written permission.
33 *
34 * ALTERNATIVELY, provided that this notice is retained in full, this product
35 * may be distributed under the terms of the GNU General Public License (GPL),
36 * in which case the provisions of the GPL apply INSTEAD OF those given above.
37 *
38 * DISCLAIMER
39 *
40 * This software is provided 'as is' with no explicit or implied warranties
41 * in respect of its properties, including, but not limited to, correctness
42 * and/or fitness for purpose.
43 * ---------------------------------------------------------------------------
44 */ 8 */
45 9
46#include <crypto/algapi.h> 10#include <crypto/algapi.h>
@@ -54,9 +18,6 @@
54#include <asm/byteorder.h> 18#include <asm/byteorder.h>
55#include "padlock.h" 19#include "padlock.h"
56 20
57#define AES_EXTENDED_KEY_SIZE 64 /* in uint32_t units */
58#define AES_EXTENDED_KEY_SIZE_B (AES_EXTENDED_KEY_SIZE * sizeof(uint32_t))
59
60/* Control word. */ 21/* Control word. */
61struct cword { 22struct cword {
62 unsigned int __attribute__ ((__packed__)) 23 unsigned int __attribute__ ((__packed__))
@@ -70,218 +31,23 @@ struct cword {
70 31
71/* Whenever making any changes to the following 32/* Whenever making any changes to the following
72 * structure *make sure* you keep E, d_data 33 * structure *make sure* you keep E, d_data
73 * and cword aligned on 16 Bytes boundaries!!! */ 34 * and cword aligned on 16 Bytes boundaries and
35 * the Hardware can access 16 * 16 bytes of E and d_data
36 * (only the first 15 * 16 bytes matter but the HW reads
37 * more).
38 */
74struct aes_ctx { 39struct aes_ctx {
40 u32 E[AES_MAX_KEYLENGTH_U32]
41 __attribute__ ((__aligned__(PADLOCK_ALIGNMENT)));
42 u32 d_data[AES_MAX_KEYLENGTH_U32]
43 __attribute__ ((__aligned__(PADLOCK_ALIGNMENT)));
75 struct { 44 struct {
76 struct cword encrypt; 45 struct cword encrypt;
77 struct cword decrypt; 46 struct cword decrypt;
78 } cword; 47 } cword;
79 u32 *D; 48 u32 *D;
80 int key_length;
81 u32 E[AES_EXTENDED_KEY_SIZE]
82 __attribute__ ((__aligned__(PADLOCK_ALIGNMENT)));
83 u32 d_data[AES_EXTENDED_KEY_SIZE]
84 __attribute__ ((__aligned__(PADLOCK_ALIGNMENT)));
85}; 49};
86 50
87/* ====== Key management routines ====== */
88
89static inline uint32_t
90generic_rotr32 (const uint32_t x, const unsigned bits)
91{
92 const unsigned n = bits % 32;
93 return (x >> n) | (x << (32 - n));
94}
95
96static inline uint32_t
97generic_rotl32 (const uint32_t x, const unsigned bits)
98{
99 const unsigned n = bits % 32;
100 return (x << n) | (x >> (32 - n));
101}
102
103#define rotl generic_rotl32
104#define rotr generic_rotr32
105
106/*
107 * #define byte(x, nr) ((unsigned char)((x) >> (nr*8)))
108 */
109static inline uint8_t
110byte(const uint32_t x, const unsigned n)
111{
112 return x >> (n << 3);
113}
114
115#define E_KEY ctx->E
116#define D_KEY ctx->D
117
118static uint8_t pow_tab[256];
119static uint8_t log_tab[256];
120static uint8_t sbx_tab[256];
121static uint8_t isb_tab[256];
122static uint32_t rco_tab[10];
123static uint32_t ft_tab[4][256];
124static uint32_t it_tab[4][256];
125
126static uint32_t fl_tab[4][256];
127static uint32_t il_tab[4][256];
128
129static inline uint8_t
130f_mult (uint8_t a, uint8_t b)
131{
132 uint8_t aa = log_tab[a], cc = aa + log_tab[b];
133
134 return pow_tab[cc + (cc < aa ? 1 : 0)];
135}
136
137#define ff_mult(a,b) (a && b ? f_mult(a, b) : 0)
138
139#define f_rn(bo, bi, n, k) \
140 bo[n] = ft_tab[0][byte(bi[n],0)] ^ \
141 ft_tab[1][byte(bi[(n + 1) & 3],1)] ^ \
142 ft_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
143 ft_tab[3][byte(bi[(n + 3) & 3],3)] ^ *(k + n)
144
145#define i_rn(bo, bi, n, k) \
146 bo[n] = it_tab[0][byte(bi[n],0)] ^ \
147 it_tab[1][byte(bi[(n + 3) & 3],1)] ^ \
148 it_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
149 it_tab[3][byte(bi[(n + 1) & 3],3)] ^ *(k + n)
150
151#define ls_box(x) \
152 ( fl_tab[0][byte(x, 0)] ^ \
153 fl_tab[1][byte(x, 1)] ^ \
154 fl_tab[2][byte(x, 2)] ^ \
155 fl_tab[3][byte(x, 3)] )
156
157#define f_rl(bo, bi, n, k) \
158 bo[n] = fl_tab[0][byte(bi[n],0)] ^ \
159 fl_tab[1][byte(bi[(n + 1) & 3],1)] ^ \
160 fl_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
161 fl_tab[3][byte(bi[(n + 3) & 3],3)] ^ *(k + n)
162
163#define i_rl(bo, bi, n, k) \
164 bo[n] = il_tab[0][byte(bi[n],0)] ^ \
165 il_tab[1][byte(bi[(n + 3) & 3],1)] ^ \
166 il_tab[2][byte(bi[(n + 2) & 3],2)] ^ \
167 il_tab[3][byte(bi[(n + 1) & 3],3)] ^ *(k + n)
168
169static void
170gen_tabs (void)
171{
172 uint32_t i, t;
173 uint8_t p, q;
174
175 /* log and power tables for GF(2**8) finite field with
176 0x011b as modular polynomial - the simplest prmitive
177 root is 0x03, used here to generate the tables */
178
179 for (i = 0, p = 1; i < 256; ++i) {
180 pow_tab[i] = (uint8_t) p;
181 log_tab[p] = (uint8_t) i;
182
183 p ^= (p << 1) ^ (p & 0x80 ? 0x01b : 0);
184 }
185
186 log_tab[1] = 0;
187
188 for (i = 0, p = 1; i < 10; ++i) {
189 rco_tab[i] = p;
190
191 p = (p << 1) ^ (p & 0x80 ? 0x01b : 0);
192 }
193
194 for (i = 0; i < 256; ++i) {
195 p = (i ? pow_tab[255 - log_tab[i]] : 0);
196 q = ((p >> 7) | (p << 1)) ^ ((p >> 6) | (p << 2));
197 p ^= 0x63 ^ q ^ ((q >> 6) | (q << 2));
198 sbx_tab[i] = p;
199 isb_tab[p] = (uint8_t) i;
200 }
201
202 for (i = 0; i < 256; ++i) {
203 p = sbx_tab[i];
204
205 t = p;
206 fl_tab[0][i] = t;
207 fl_tab[1][i] = rotl (t, 8);
208 fl_tab[2][i] = rotl (t, 16);
209 fl_tab[3][i] = rotl (t, 24);
210
211 t = ((uint32_t) ff_mult (2, p)) |
212 ((uint32_t) p << 8) |
213 ((uint32_t) p << 16) | ((uint32_t) ff_mult (3, p) << 24);
214
215 ft_tab[0][i] = t;
216 ft_tab[1][i] = rotl (t, 8);
217 ft_tab[2][i] = rotl (t, 16);
218 ft_tab[3][i] = rotl (t, 24);
219
220 p = isb_tab[i];
221
222 t = p;
223 il_tab[0][i] = t;
224 il_tab[1][i] = rotl (t, 8);
225 il_tab[2][i] = rotl (t, 16);
226 il_tab[3][i] = rotl (t, 24);
227
228 t = ((uint32_t) ff_mult (14, p)) |
229 ((uint32_t) ff_mult (9, p) << 8) |
230 ((uint32_t) ff_mult (13, p) << 16) |
231 ((uint32_t) ff_mult (11, p) << 24);
232
233 it_tab[0][i] = t;
234 it_tab[1][i] = rotl (t, 8);
235 it_tab[2][i] = rotl (t, 16);
236 it_tab[3][i] = rotl (t, 24);
237 }
238}
239
240#define star_x(x) (((x) & 0x7f7f7f7f) << 1) ^ ((((x) & 0x80808080) >> 7) * 0x1b)
241
242#define imix_col(y,x) \
243 u = star_x(x); \
244 v = star_x(u); \
245 w = star_x(v); \
246 t = w ^ (x); \
247 (y) = u ^ v ^ w; \
248 (y) ^= rotr(u ^ t, 8) ^ \
249 rotr(v ^ t, 16) ^ \
250 rotr(t,24)
251
252/* initialise the key schedule from the user supplied key */
253
254#define loop4(i) \
255{ t = rotr(t, 8); t = ls_box(t) ^ rco_tab[i]; \
256 t ^= E_KEY[4 * i]; E_KEY[4 * i + 4] = t; \
257 t ^= E_KEY[4 * i + 1]; E_KEY[4 * i + 5] = t; \
258 t ^= E_KEY[4 * i + 2]; E_KEY[4 * i + 6] = t; \
259 t ^= E_KEY[4 * i + 3]; E_KEY[4 * i + 7] = t; \
260}
261
262#define loop6(i) \
263{ t = rotr(t, 8); t = ls_box(t) ^ rco_tab[i]; \
264 t ^= E_KEY[6 * i]; E_KEY[6 * i + 6] = t; \
265 t ^= E_KEY[6 * i + 1]; E_KEY[6 * i + 7] = t; \
266 t ^= E_KEY[6 * i + 2]; E_KEY[6 * i + 8] = t; \
267 t ^= E_KEY[6 * i + 3]; E_KEY[6 * i + 9] = t; \
268 t ^= E_KEY[6 * i + 4]; E_KEY[6 * i + 10] = t; \
269 t ^= E_KEY[6 * i + 5]; E_KEY[6 * i + 11] = t; \
270}
271
272#define loop8(i) \
273{ t = rotr(t, 8); ; t = ls_box(t) ^ rco_tab[i]; \
274 t ^= E_KEY[8 * i]; E_KEY[8 * i + 8] = t; \
275 t ^= E_KEY[8 * i + 1]; E_KEY[8 * i + 9] = t; \
276 t ^= E_KEY[8 * i + 2]; E_KEY[8 * i + 10] = t; \
277 t ^= E_KEY[8 * i + 3]; E_KEY[8 * i + 11] = t; \
278 t = E_KEY[8 * i + 4] ^ ls_box(t); \
279 E_KEY[8 * i + 12] = t; \
280 t ^= E_KEY[8 * i + 5]; E_KEY[8 * i + 13] = t; \
281 t ^= E_KEY[8 * i + 6]; E_KEY[8 * i + 14] = t; \
282 t ^= E_KEY[8 * i + 7]; E_KEY[8 * i + 15] = t; \
283}
284
285/* Tells whether the ACE is capable to generate 51/* Tells whether the ACE is capable to generate
286 the extended key for a given key_len. */ 52 the extended key for a given key_len. */
287static inline int 53static inline int
@@ -321,17 +87,13 @@ static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
321 struct aes_ctx *ctx = aes_ctx(tfm); 87 struct aes_ctx *ctx = aes_ctx(tfm);
322 const __le32 *key = (const __le32 *)in_key; 88 const __le32 *key = (const __le32 *)in_key;
323 u32 *flags = &tfm->crt_flags; 89 u32 *flags = &tfm->crt_flags;
324 uint32_t i, t, u, v, w; 90 struct crypto_aes_ctx gen_aes;
325 uint32_t P[AES_EXTENDED_KEY_SIZE];
326 uint32_t rounds;
327 91
328 if (key_len % 8) { 92 if (key_len % 8) {
329 *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN; 93 *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
330 return -EINVAL; 94 return -EINVAL;
331 } 95 }
332 96
333 ctx->key_length = key_len;
334
335 /* 97 /*
336 * If the hardware is capable of generating the extended key 98 * If the hardware is capable of generating the extended key
337 * itself we must supply the plain key for both encryption 99 * itself we must supply the plain key for both encryption
@@ -339,10 +101,10 @@ static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
339 */ 101 */
340 ctx->D = ctx->E; 102 ctx->D = ctx->E;
341 103
342 E_KEY[0] = le32_to_cpu(key[0]); 104 ctx->E[0] = le32_to_cpu(key[0]);
343 E_KEY[1] = le32_to_cpu(key[1]); 105 ctx->E[1] = le32_to_cpu(key[1]);
344 E_KEY[2] = le32_to_cpu(key[2]); 106 ctx->E[2] = le32_to_cpu(key[2]);
345 E_KEY[3] = le32_to_cpu(key[3]); 107 ctx->E[3] = le32_to_cpu(key[3]);
346 108
347 /* Prepare control words. */ 109 /* Prepare control words. */
348 memset(&ctx->cword, 0, sizeof(ctx->cword)); 110 memset(&ctx->cword, 0, sizeof(ctx->cword));
@@ -361,56 +123,13 @@ static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
361 ctx->cword.encrypt.keygen = 1; 123 ctx->cword.encrypt.keygen = 1;
362 ctx->cword.decrypt.keygen = 1; 124 ctx->cword.decrypt.keygen = 1;
363 125
364 switch (key_len) { 126 if (crypto_aes_expand_key(&gen_aes, in_key, key_len)) {
365 case 16: 127 *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
366 t = E_KEY[3]; 128 return -EINVAL;
367 for (i = 0; i < 10; ++i)
368 loop4 (i);
369 break;
370
371 case 24:
372 E_KEY[4] = le32_to_cpu(key[4]);
373 t = E_KEY[5] = le32_to_cpu(key[5]);
374 for (i = 0; i < 8; ++i)
375 loop6 (i);
376 break;
377
378 case 32:
379 E_KEY[4] = le32_to_cpu(key[4]);
380 E_KEY[5] = le32_to_cpu(key[5]);
381 E_KEY[6] = le32_to_cpu(key[6]);
382 t = E_KEY[7] = le32_to_cpu(key[7]);
383 for (i = 0; i < 7; ++i)
384 loop8 (i);
385 break;
386 }
387
388 D_KEY[0] = E_KEY[0];
389 D_KEY[1] = E_KEY[1];
390 D_KEY[2] = E_KEY[2];
391 D_KEY[3] = E_KEY[3];
392
393 for (i = 4; i < key_len + 24; ++i) {
394 imix_col (D_KEY[i], E_KEY[i]);
395 }
396
397 /* PadLock needs a different format of the decryption key. */
398 rounds = 10 + (key_len - 16) / 4;
399
400 for (i = 0; i < rounds; i++) {
401 P[((i + 1) * 4) + 0] = D_KEY[((rounds - i - 1) * 4) + 0];
402 P[((i + 1) * 4) + 1] = D_KEY[((rounds - i - 1) * 4) + 1];
403 P[((i + 1) * 4) + 2] = D_KEY[((rounds - i - 1) * 4) + 2];
404 P[((i + 1) * 4) + 3] = D_KEY[((rounds - i - 1) * 4) + 3];
405 } 129 }
406 130
407 P[0] = E_KEY[(rounds * 4) + 0]; 131 memcpy(ctx->E, gen_aes.key_enc, AES_MAX_KEYLENGTH);
408 P[1] = E_KEY[(rounds * 4) + 1]; 132 memcpy(ctx->D, gen_aes.key_dec, AES_MAX_KEYLENGTH);
409 P[2] = E_KEY[(rounds * 4) + 2];
410 P[3] = E_KEY[(rounds * 4) + 3];
411
412 memcpy(D_KEY, P, AES_EXTENDED_KEY_SIZE_B);
413
414 return 0; 133 return 0;
415} 134}
416 135
@@ -675,7 +394,6 @@ static int __init padlock_init(void)
675 return -ENODEV; 394 return -ENODEV;
676 } 395 }
677 396
678 gen_tabs();
679 if ((ret = crypto_register_alg(&aes_alg))) 397 if ((ret = crypto_register_alg(&aes_alg)))
680 goto aes_err; 398 goto aes_err;
681 399