diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvif/class.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/fifo/Kbuild | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c | 7 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm204.c | 57 |
7 files changed, 68 insertions, 5 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvif/class.h b/drivers/gpu/drm/nouveau/include/nvif/class.h index 67f1d9bd3403..0fdbcffaa54d 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/class.h +++ b/drivers/gpu/drm/nouveau/include/nvif/class.h | |||
| @@ -32,6 +32,7 @@ | |||
| 32 | #define G82_CHANNEL_GPFIFO 0x0000826f | 32 | #define G82_CHANNEL_GPFIFO 0x0000826f |
| 33 | #define FERMI_CHANNEL_GPFIFO 0x0000906f | 33 | #define FERMI_CHANNEL_GPFIFO 0x0000906f |
| 34 | #define KEPLER_CHANNEL_GPFIFO_A 0x0000a06f | 34 | #define KEPLER_CHANNEL_GPFIFO_A 0x0000a06f |
| 35 | #define MAXWELL_CHANNEL_GPFIFO_A 0x0000b06f | ||
| 35 | 36 | ||
| 36 | #define NV50_DISP 0x00005070 | 37 | #define NV50_DISP 0x00005070 |
| 37 | #define G82_DISP 0x00008270 | 38 | #define G82_DISP 0x00008270 |
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h index 05321ce7ab15..97cdeab8e44c 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h | |||
| @@ -116,6 +116,7 @@ extern struct nvkm_oclass *gf100_fifo_oclass; | |||
| 116 | extern struct nvkm_oclass *gk104_fifo_oclass; | 116 | extern struct nvkm_oclass *gk104_fifo_oclass; |
| 117 | extern struct nvkm_oclass *gk20a_fifo_oclass; | 117 | extern struct nvkm_oclass *gk20a_fifo_oclass; |
| 118 | extern struct nvkm_oclass *gk208_fifo_oclass; | 118 | extern struct nvkm_oclass *gk208_fifo_oclass; |
| 119 | extern struct nvkm_oclass *gm204_fifo_oclass; | ||
| 119 | 120 | ||
| 120 | int nvkm_fifo_uevent_ctor(struct nvkm_object *, void *, u32, | 121 | int nvkm_fifo_uevent_ctor(struct nvkm_object *, void *, u32, |
| 121 | struct nvkm_notify *); | 122 | struct nvkm_notify *); |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c index 108d048da764..7f4248271915 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c | |||
| @@ -127,9 +127,9 @@ gm100_identify(struct nvkm_device *device) | |||
| 127 | device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; | 127 | device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass; |
| 128 | #endif | 128 | #endif |
| 129 | device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; | 129 | device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; |
| 130 | #if 0 | 130 | device->oclass[NVDEV_ENGINE_FIFO ] = gm204_fifo_oclass; |
| 131 | device->oclass[NVDEV_ENGINE_FIFO ] = gk208_fifo_oclass; | ||
| 132 | device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; | 131 | device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass; |
| 132 | #if 0 | ||
| 133 | device->oclass[NVDEV_ENGINE_GR ] = gm107_gr_oclass; | 133 | device->oclass[NVDEV_ENGINE_GR ] = gm107_gr_oclass; |
| 134 | #endif | 134 | #endif |
| 135 | device->oclass[NVDEV_ENGINE_DISP ] = gm204_disp_oclass; | 135 | device->oclass[NVDEV_ENGINE_DISP ] = gm204_disp_oclass; |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/Kbuild b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/Kbuild index c5a2d8718c5b..42891cb71ea3 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/Kbuild +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/Kbuild | |||
| @@ -9,3 +9,4 @@ nvkm-y += nvkm/engine/fifo/gf100.o | |||
| 9 | nvkm-y += nvkm/engine/fifo/gk104.o | 9 | nvkm-y += nvkm/engine/fifo/gk104.o |
| 10 | nvkm-y += nvkm/engine/fifo/gk20a.o | 10 | nvkm-y += nvkm/engine/fifo/gk20a.o |
| 11 | nvkm-y += nvkm/engine/fifo/gk208.o | 11 | nvkm-y += nvkm/engine/fifo/gk208.o |
| 12 | nvkm-y += nvkm/engine/fifo/gm204.o | ||
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c index 9585539e59f2..e10f9644140f 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.c | |||
| @@ -323,8 +323,8 @@ gk104_fifo_chan_fini(struct nvkm_object *object, bool suspend) | |||
| 323 | return nvkm_fifo_channel_fini(&chan->base, suspend); | 323 | return nvkm_fifo_channel_fini(&chan->base, suspend); |
| 324 | } | 324 | } |
| 325 | 325 | ||
| 326 | static struct nvkm_ofuncs | 326 | struct nvkm_ofuncs |
| 327 | gk104_fifo_ofuncs = { | 327 | gk104_fifo_chan_ofuncs = { |
| 328 | .ctor = gk104_fifo_chan_ctor, | 328 | .ctor = gk104_fifo_chan_ctor, |
| 329 | .dtor = _nvkm_fifo_channel_dtor, | 329 | .dtor = _nvkm_fifo_channel_dtor, |
| 330 | .init = gk104_fifo_chan_init, | 330 | .init = gk104_fifo_chan_init, |
| @@ -337,7 +337,7 @@ gk104_fifo_ofuncs = { | |||
| 337 | 337 | ||
| 338 | static struct nvkm_oclass | 338 | static struct nvkm_oclass |
| 339 | gk104_fifo_sclass[] = { | 339 | gk104_fifo_sclass[] = { |
| 340 | { KEPLER_CHANNEL_GPFIFO_A, &gk104_fifo_ofuncs }, | 340 | { KEPLER_CHANNEL_GPFIFO_A, &gk104_fifo_chan_ofuncs }, |
| 341 | {} | 341 | {} |
| 342 | }; | 342 | }; |
| 343 | 343 | ||
| @@ -774,6 +774,7 @@ gk104_fifo_intr_fault(struct gk104_fifo_priv *priv, int unit) | |||
| 774 | while (object) { | 774 | while (object) { |
| 775 | switch (nv_mclass(object)) { | 775 | switch (nv_mclass(object)) { |
| 776 | case KEPLER_CHANNEL_GPFIFO_A: | 776 | case KEPLER_CHANNEL_GPFIFO_A: |
| 777 | case MAXWELL_CHANNEL_GPFIFO_A: | ||
| 777 | gk104_fifo_recover(priv, engine, (void *)object); | 778 | gk104_fifo_recover(priv, engine, (void *)object); |
| 778 | break; | 779 | break; |
| 779 | } | 780 | } |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h index 3046e00ed6ba..318d30d6ee1a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gk104.h | |||
| @@ -13,4 +13,6 @@ struct gk104_fifo_impl { | |||
| 13 | struct nvkm_oclass base; | 13 | struct nvkm_oclass base; |
| 14 | u32 channels; | 14 | u32 channels; |
| 15 | }; | 15 | }; |
| 16 | |||
| 17 | extern struct nvkm_ofuncs gk104_fifo_chan_ofuncs; | ||
| 16 | #endif | 18 | #endif |
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm204.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm204.c new file mode 100644 index 000000000000..749d525dd8e3 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gm204.c | |||
| @@ -0,0 +1,57 @@ | |||
| 1 | /* | ||
| 2 | * Copyright 2015 Red Hat Inc. | ||
| 3 | * | ||
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
| 5 | * copy of this software and associated documentation files (the "Software"), | ||
| 6 | * to deal in the Software without restriction, including without limitation | ||
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
| 8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
| 9 | * Software is furnished to do so, subject to the following conditions: | ||
| 10 | * | ||
| 11 | * The above copyright notice and this permission notice shall be included in | ||
| 12 | * all copies or substantial portions of the Software. | ||
| 13 | * | ||
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
| 20 | * OTHER DEALINGS IN THE SOFTWARE. | ||
| 21 | * | ||
| 22 | * Authors: Ben Skeggs | ||
| 23 | */ | ||
| 24 | #include "gk104.h" | ||
| 25 | |||
| 26 | #include <nvif/class.h> | ||
| 27 | |||
| 28 | static struct nvkm_oclass | ||
| 29 | gm204_fifo_sclass[] = { | ||
| 30 | { MAXWELL_CHANNEL_GPFIFO_A, &gk104_fifo_chan_ofuncs }, | ||
| 31 | {} | ||
| 32 | }; | ||
| 33 | |||
| 34 | static int | ||
| 35 | gm204_fifo_ctor(struct nvkm_object *parent, struct nvkm_object *engine, | ||
| 36 | struct nvkm_oclass *oclass, void *data, u32 size, | ||
| 37 | struct nvkm_object **pobject) | ||
| 38 | { | ||
| 39 | int ret = gk104_fifo_ctor(parent, engine, oclass, data, size, pobject); | ||
| 40 | if (ret == 0) { | ||
| 41 | struct gk104_fifo_priv *priv = (void *)*pobject; | ||
| 42 | nv_engine(priv)->sclass = gm204_fifo_sclass; | ||
| 43 | } | ||
| 44 | return ret; | ||
| 45 | } | ||
| 46 | |||
| 47 | struct nvkm_oclass * | ||
| 48 | gm204_fifo_oclass = &(struct gk104_fifo_impl) { | ||
| 49 | .base.handle = NV_ENGINE(FIFO, 0x24), | ||
| 50 | .base.ofuncs = &(struct nvkm_ofuncs) { | ||
| 51 | .ctor = gm204_fifo_ctor, | ||
| 52 | .dtor = gk104_fifo_dtor, | ||
| 53 | .init = gk104_fifo_init, | ||
| 54 | .fini = _nvkm_fifo_fini, | ||
| 55 | }, | ||
| 56 | .channels = 4096, | ||
| 57 | }.base; | ||
