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-rw-r--r--drivers/clk/mxs/clk-imx23.c9
-rw-r--r--drivers/clk/mxs/clk-imx28.c13
-rw-r--r--drivers/dma/Kconfig1
-rw-r--r--drivers/dma/mxs-dma.c188
-rw-r--r--drivers/gpio/gpio-mxs.c156
-rw-r--r--drivers/i2c/busses/i2c-mxs.c13
-rw-r--r--drivers/mmc/host/mxs-mmc.c197
7 files changed, 358 insertions, 219 deletions
diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c
index dcae11285716..f7be225f544c 100644
--- a/drivers/clk/mxs/clk-imx23.c
+++ b/drivers/clk/mxs/clk-imx23.c
@@ -81,19 +81,20 @@ static struct clk_lookup uart_lookups[] __initdata = {
81}; 81};
82 82
83static struct clk_lookup hbus_lookups[] __initdata = { 83static struct clk_lookup hbus_lookups[] __initdata = {
84 { .dev_id = "mxs-dma-apbh", }, 84 { .dev_id = "imx23-dma-apbh", },
85 { .dev_id = "80004000.dma-apbh", }, 85 { .dev_id = "80004000.dma-apbh", },
86}; 86};
87 87
88static struct clk_lookup xbus_lookups[] __initdata = { 88static struct clk_lookup xbus_lookups[] __initdata = {
89 { .dev_id = "duart", .con_id = "apb_pclk"}, 89 { .dev_id = "duart", .con_id = "apb_pclk"},
90 { .dev_id = "mxs-dma-apbx", }, 90 { .dev_id = "80070000.serial", .con_id = "apb_pclk"},
91 { .dev_id = "imx23-dma-apbx", },
91 { .dev_id = "80024000.dma-apbx", }, 92 { .dev_id = "80024000.dma-apbx", },
92}; 93};
93 94
94static struct clk_lookup ssp_lookups[] __initdata = { 95static struct clk_lookup ssp_lookups[] __initdata = {
95 { .dev_id = "mxs-mmc.0", }, 96 { .dev_id = "imx23-mmc.0", },
96 { .dev_id = "mxs-mmc.1", }, 97 { .dev_id = "imx23-mmc.1", },
97 { .dev_id = "80010000.ssp", }, 98 { .dev_id = "80010000.ssp", },
98 { .dev_id = "80034000.ssp", }, 99 { .dev_id = "80034000.ssp", },
99}; 100};
diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
index b2a3257d4f66..2826a2606a29 100644
--- a/drivers/clk/mxs/clk-imx28.c
+++ b/drivers/clk/mxs/clk-imx28.c
@@ -136,33 +136,34 @@ static struct clk_lookup uart_lookups[] __initdata = {
136}; 136};
137 137
138static struct clk_lookup hbus_lookups[] __initdata = { 138static struct clk_lookup hbus_lookups[] __initdata = {
139 { .dev_id = "mxs-dma-apbh", }, 139 { .dev_id = "imx28-dma-apbh", },
140 { .dev_id = "80004000.dma-apbh", }, 140 { .dev_id = "80004000.dma-apbh", },
141}; 141};
142 142
143static struct clk_lookup xbus_lookups[] __initdata = { 143static struct clk_lookup xbus_lookups[] __initdata = {
144 { .dev_id = "duart", .con_id = "apb_pclk"}, 144 { .dev_id = "duart", .con_id = "apb_pclk"},
145 { .dev_id = "mxs-dma-apbx", }, 145 { .dev_id = "80074000.serial", .con_id = "apb_pclk"},
146 { .dev_id = "imx28-dma-apbx", },
146 { .dev_id = "80024000.dma-apbx", }, 147 { .dev_id = "80024000.dma-apbx", },
147}; 148};
148 149
149static struct clk_lookup ssp0_lookups[] __initdata = { 150static struct clk_lookup ssp0_lookups[] __initdata = {
150 { .dev_id = "mxs-mmc.0", }, 151 { .dev_id = "imx28-mmc.0", },
151 { .dev_id = "80010000.ssp", }, 152 { .dev_id = "80010000.ssp", },
152}; 153};
153 154
154static struct clk_lookup ssp1_lookups[] __initdata = { 155static struct clk_lookup ssp1_lookups[] __initdata = {
155 { .dev_id = "mxs-mmc.1", }, 156 { .dev_id = "imx28-mmc.1", },
156 { .dev_id = "80012000.ssp", }, 157 { .dev_id = "80012000.ssp", },
157}; 158};
158 159
159static struct clk_lookup ssp2_lookups[] __initdata = { 160static struct clk_lookup ssp2_lookups[] __initdata = {
160 { .dev_id = "mxs-mmc.2", }, 161 { .dev_id = "imx28-mmc.2", },
161 { .dev_id = "80014000.ssp", }, 162 { .dev_id = "80014000.ssp", },
162}; 163};
163 164
164static struct clk_lookup ssp3_lookups[] __initdata = { 165static struct clk_lookup ssp3_lookups[] __initdata = {
165 { .dev_id = "mxs-mmc.3", }, 166 { .dev_id = "imx28-mmc.3", },
166 { .dev_id = "80016000.ssp", }, 167 { .dev_id = "80016000.ssp", },
167}; 168};
168 169
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index ef378b5b17e4..aadeb5be9dba 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -238,6 +238,7 @@ config IMX_DMA
238config MXS_DMA 238config MXS_DMA
239 bool "MXS DMA support" 239 bool "MXS DMA support"
240 depends on SOC_IMX23 || SOC_IMX28 240 depends on SOC_IMX23 || SOC_IMX28
241 select STMP_DEVICE
241 select DMA_ENGINE 242 select DMA_ENGINE
242 help 243 help
243 Support the MXS DMA engine. This engine including APBH-DMA 244 Support the MXS DMA engine. This engine including APBH-DMA
diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c
index 3db3a48d3f01..c96ab15319f2 100644
--- a/drivers/dma/mxs-dma.c
+++ b/drivers/dma/mxs-dma.c
@@ -22,11 +22,14 @@
22#include <linux/platform_device.h> 22#include <linux/platform_device.h>
23#include <linux/dmaengine.h> 23#include <linux/dmaengine.h>
24#include <linux/delay.h> 24#include <linux/delay.h>
25#include <linux/module.h>
25#include <linux/fsl/mxs-dma.h> 26#include <linux/fsl/mxs-dma.h>
27#include <linux/stmp_device.h>
28#include <linux/of.h>
29#include <linux/of_device.h>
26 30
27#include <asm/irq.h> 31#include <asm/irq.h>
28#include <mach/mxs.h> 32#include <mach/mxs.h>
29#include <mach/common.h>
30 33
31#include "dmaengine.h" 34#include "dmaengine.h"
32 35
@@ -36,12 +39,8 @@
36 * dma can program the controller registers of peripheral devices. 39 * dma can program the controller registers of peripheral devices.
37 */ 40 */
38 41
39#define MXS_DMA_APBH 0 42#define dma_is_apbh(mxs_dma) ((mxs_dma)->type == MXS_DMA_APBH)
40#define MXS_DMA_APBX 1 43#define apbh_is_old(mxs_dma) ((mxs_dma)->dev_id == IMX23_DMA)
41#define dma_is_apbh() (mxs_dma->dev_id == MXS_DMA_APBH)
42
43#define APBH_VERSION_LATEST 3
44#define apbh_is_old() (mxs_dma->version < APBH_VERSION_LATEST)
45 44
46#define HW_APBHX_CTRL0 0x000 45#define HW_APBHX_CTRL0 0x000
47#define BM_APBH_CTRL0_APB_BURST8_EN (1 << 29) 46#define BM_APBH_CTRL0_APB_BURST8_EN (1 << 29)
@@ -51,13 +50,14 @@
51#define HW_APBHX_CTRL2 0x020 50#define HW_APBHX_CTRL2 0x020
52#define HW_APBHX_CHANNEL_CTRL 0x030 51#define HW_APBHX_CHANNEL_CTRL 0x030
53#define BP_APBHX_CHANNEL_CTRL_RESET_CHANNEL 16 52#define BP_APBHX_CHANNEL_CTRL_RESET_CHANNEL 16
54#define HW_APBH_VERSION (cpu_is_mx23() ? 0x3f0 : 0x800) 53/*
55#define HW_APBX_VERSION 0x800 54 * The offset of NXTCMDAR register is different per both dma type and version,
56#define BP_APBHX_VERSION_MAJOR 24 55 * while stride for each channel is all the same 0x70.
57#define HW_APBHX_CHn_NXTCMDAR(n) \ 56 */
58 (((dma_is_apbh() && apbh_is_old()) ? 0x050 : 0x110) + (n) * 0x70) 57#define HW_APBHX_CHn_NXTCMDAR(d, n) \
59#define HW_APBHX_CHn_SEMA(n) \ 58 (((dma_is_apbh(d) && apbh_is_old(d)) ? 0x050 : 0x110) + (n) * 0x70)
60 (((dma_is_apbh() && apbh_is_old()) ? 0x080 : 0x140) + (n) * 0x70) 59#define HW_APBHX_CHn_SEMA(d, n) \
60 (((dma_is_apbh(d) && apbh_is_old(d)) ? 0x080 : 0x140) + (n) * 0x70)
61 61
62/* 62/*
63 * ccw bits definitions 63 * ccw bits definitions
@@ -121,9 +121,19 @@ struct mxs_dma_chan {
121#define MXS_DMA_CHANNELS 16 121#define MXS_DMA_CHANNELS 16
122#define MXS_DMA_CHANNELS_MASK 0xffff 122#define MXS_DMA_CHANNELS_MASK 0xffff
123 123
124enum mxs_dma_devtype {
125 MXS_DMA_APBH,
126 MXS_DMA_APBX,
127};
128
129enum mxs_dma_id {
130 IMX23_DMA,
131 IMX28_DMA,
132};
133
124struct mxs_dma_engine { 134struct mxs_dma_engine {
125 int dev_id; 135 enum mxs_dma_id dev_id;
126 unsigned int version; 136 enum mxs_dma_devtype type;
127 void __iomem *base; 137 void __iomem *base;
128 struct clk *clk; 138 struct clk *clk;
129 struct dma_device dma_device; 139 struct dma_device dma_device;
@@ -131,17 +141,86 @@ struct mxs_dma_engine {
131 struct mxs_dma_chan mxs_chans[MXS_DMA_CHANNELS]; 141 struct mxs_dma_chan mxs_chans[MXS_DMA_CHANNELS];
132}; 142};
133 143
144struct mxs_dma_type {
145 enum mxs_dma_id id;
146 enum mxs_dma_devtype type;
147};
148
149static struct mxs_dma_type mxs_dma_types[] = {
150 {
151 .id = IMX23_DMA,
152 .type = MXS_DMA_APBH,
153 }, {
154 .id = IMX23_DMA,
155 .type = MXS_DMA_APBX,
156 }, {
157 .id = IMX28_DMA,
158 .type = MXS_DMA_APBH,
159 }, {
160 .id = IMX28_DMA,
161 .type = MXS_DMA_APBX,
162 }
163};
164
165static struct platform_device_id mxs_dma_ids[] = {
166 {
167 .name = "imx23-dma-apbh",
168 .driver_data = (kernel_ulong_t) &mxs_dma_types[0],
169 }, {
170 .name = "imx23-dma-apbx",
171 .driver_data = (kernel_ulong_t) &mxs_dma_types[1],
172 }, {
173 .name = "imx28-dma-apbh",
174 .driver_data = (kernel_ulong_t) &mxs_dma_types[2],
175 }, {
176 .name = "imx28-dma-apbx",
177 .driver_data = (kernel_ulong_t) &mxs_dma_types[3],
178 }, {
179 /* end of list */
180 }
181};
182
183static const struct of_device_id mxs_dma_dt_ids[] = {
184 { .compatible = "fsl,imx23-dma-apbh", .data = &mxs_dma_ids[0], },
185 { .compatible = "fsl,imx23-dma-apbx", .data = &mxs_dma_ids[1], },
186 { .compatible = "fsl,imx28-dma-apbh", .data = &mxs_dma_ids[2], },
187 { .compatible = "fsl,imx28-dma-apbx", .data = &mxs_dma_ids[3], },
188 { /* sentinel */ }
189};
190MODULE_DEVICE_TABLE(of, mxs_dma_dt_ids);
191
192static struct mxs_dma_chan *to_mxs_dma_chan(struct dma_chan *chan)
193{
194 return container_of(chan, struct mxs_dma_chan, chan);
195}
196
197int mxs_dma_is_apbh(struct dma_chan *chan)
198{
199 struct mxs_dma_chan *mxs_chan = to_mxs_dma_chan(chan);
200 struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma;
201
202 return dma_is_apbh(mxs_dma);
203}
204
205int mxs_dma_is_apbx(struct dma_chan *chan)
206{
207 struct mxs_dma_chan *mxs_chan = to_mxs_dma_chan(chan);
208 struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma;
209
210 return !dma_is_apbh(mxs_dma);
211}
212
134static void mxs_dma_reset_chan(struct mxs_dma_chan *mxs_chan) 213static void mxs_dma_reset_chan(struct mxs_dma_chan *mxs_chan)
135{ 214{
136 struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma; 215 struct mxs_dma_engine *mxs_dma = mxs_chan->mxs_dma;
137 int chan_id = mxs_chan->chan.chan_id; 216 int chan_id = mxs_chan->chan.chan_id;
138 217
139 if (dma_is_apbh() && apbh_is_old()) 218 if (dma_is_apbh(mxs_dma) && apbh_is_old(mxs_dma))
140 writel(1 << (chan_id + BP_APBH_CTRL0_RESET_CHANNEL), 219 writel(1 << (chan_id + BP_APBH_CTRL0_RESET_CHANNEL),
141 mxs_dma->base + HW_APBHX_CTRL0 + MXS_SET_ADDR); 220 mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET);
142 else 221 else
143 writel(1 << (chan_id + BP_APBHX_CHANNEL_CTRL_RESET_CHANNEL), 222 writel(1 << (chan_id + BP_APBHX_CHANNEL_CTRL_RESET_CHANNEL),
144 mxs_dma->base + HW_APBHX_CHANNEL_CTRL + MXS_SET_ADDR); 223 mxs_dma->base + HW_APBHX_CHANNEL_CTRL + STMP_OFFSET_REG_SET);
145} 224}
146 225
147static void mxs_dma_enable_chan(struct mxs_dma_chan *mxs_chan) 226static void mxs_dma_enable_chan(struct mxs_dma_chan *mxs_chan)
@@ -151,10 +230,10 @@ static void mxs_dma_enable_chan(struct mxs_dma_chan *mxs_chan)
151 230
152 /* set cmd_addr up */ 231 /* set cmd_addr up */
153 writel(mxs_chan->ccw_phys, 232 writel(mxs_chan->ccw_phys,
154 mxs_dma->base + HW_APBHX_CHn_NXTCMDAR(chan_id)); 233 mxs_dma->base + HW_APBHX_CHn_NXTCMDAR(mxs_dma, chan_id));
155 234
156 /* write 1 to SEMA to kick off the channel */ 235 /* write 1 to SEMA to kick off the channel */
157 writel(1, mxs_dma->base + HW_APBHX_CHn_SEMA(chan_id)); 236 writel(1, mxs_dma->base + HW_APBHX_CHn_SEMA(mxs_dma, chan_id));
158} 237}
159 238
160static void mxs_dma_disable_chan(struct mxs_dma_chan *mxs_chan) 239static void mxs_dma_disable_chan(struct mxs_dma_chan *mxs_chan)
@@ -168,12 +247,12 @@ static void mxs_dma_pause_chan(struct mxs_dma_chan *mxs_chan)
168 int chan_id = mxs_chan->chan.chan_id; 247 int chan_id = mxs_chan->chan.chan_id;
169 248
170 /* freeze the channel */ 249 /* freeze the channel */
171 if (dma_is_apbh() && apbh_is_old()) 250 if (dma_is_apbh(mxs_dma) && apbh_is_old(mxs_dma))
172 writel(1 << chan_id, 251 writel(1 << chan_id,
173 mxs_dma->base + HW_APBHX_CTRL0 + MXS_SET_ADDR); 252 mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET);
174 else 253 else
175 writel(1 << chan_id, 254 writel(1 << chan_id,
176 mxs_dma->base + HW_APBHX_CHANNEL_CTRL + MXS_SET_ADDR); 255 mxs_dma->base + HW_APBHX_CHANNEL_CTRL + STMP_OFFSET_REG_SET);
177 256
178 mxs_chan->status = DMA_PAUSED; 257 mxs_chan->status = DMA_PAUSED;
179} 258}
@@ -184,21 +263,16 @@ static void mxs_dma_resume_chan(struct mxs_dma_chan *mxs_chan)
184 int chan_id = mxs_chan->chan.chan_id; 263 int chan_id = mxs_chan->chan.chan_id;
185 264
186 /* unfreeze the channel */ 265 /* unfreeze the channel */
187 if (dma_is_apbh() && apbh_is_old()) 266 if (dma_is_apbh(mxs_dma) && apbh_is_old(mxs_dma))
188 writel(1 << chan_id, 267 writel(1 << chan_id,
189 mxs_dma->base + HW_APBHX_CTRL0 + MXS_CLR_ADDR); 268 mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_CLR);
190 else 269 else
191 writel(1 << chan_id, 270 writel(1 << chan_id,
192 mxs_dma->base + HW_APBHX_CHANNEL_CTRL + MXS_CLR_ADDR); 271 mxs_dma->base + HW_APBHX_CHANNEL_CTRL + STMP_OFFSET_REG_CLR);
193 272
194 mxs_chan->status = DMA_IN_PROGRESS; 273 mxs_chan->status = DMA_IN_PROGRESS;
195} 274}
196 275
197static struct mxs_dma_chan *to_mxs_dma_chan(struct dma_chan *chan)
198{
199 return container_of(chan, struct mxs_dma_chan, chan);
200}
201
202static dma_cookie_t mxs_dma_tx_submit(struct dma_async_tx_descriptor *tx) 276static dma_cookie_t mxs_dma_tx_submit(struct dma_async_tx_descriptor *tx)
203{ 277{
204 return dma_cookie_assign(tx); 278 return dma_cookie_assign(tx);
@@ -220,11 +294,11 @@ static irqreturn_t mxs_dma_int_handler(int irq, void *dev_id)
220 /* completion status */ 294 /* completion status */
221 stat1 = readl(mxs_dma->base + HW_APBHX_CTRL1); 295 stat1 = readl(mxs_dma->base + HW_APBHX_CTRL1);
222 stat1 &= MXS_DMA_CHANNELS_MASK; 296 stat1 &= MXS_DMA_CHANNELS_MASK;
223 writel(stat1, mxs_dma->base + HW_APBHX_CTRL1 + MXS_CLR_ADDR); 297 writel(stat1, mxs_dma->base + HW_APBHX_CTRL1 + STMP_OFFSET_REG_CLR);
224 298
225 /* error status */ 299 /* error status */
226 stat2 = readl(mxs_dma->base + HW_APBHX_CTRL2); 300 stat2 = readl(mxs_dma->base + HW_APBHX_CTRL2);
227 writel(stat2, mxs_dma->base + HW_APBHX_CTRL2 + MXS_CLR_ADDR); 301 writel(stat2, mxs_dma->base + HW_APBHX_CTRL2 + STMP_OFFSET_REG_CLR);
228 302
229 /* 303 /*
230 * When both completion and error of termination bits set at the 304 * When both completion and error of termination bits set at the
@@ -567,27 +641,21 @@ static int __init mxs_dma_init(struct mxs_dma_engine *mxs_dma)
567 if (ret) 641 if (ret)
568 return ret; 642 return ret;
569 643
570 ret = mxs_reset_block(mxs_dma->base); 644 ret = stmp_reset_block(mxs_dma->base);
571 if (ret) 645 if (ret)
572 goto err_out; 646 goto err_out;
573 647
574 /* only major version matters */
575 mxs_dma->version = readl(mxs_dma->base +
576 ((mxs_dma->dev_id == MXS_DMA_APBX) ?
577 HW_APBX_VERSION : HW_APBH_VERSION)) >>
578 BP_APBHX_VERSION_MAJOR;
579
580 /* enable apbh burst */ 648 /* enable apbh burst */
581 if (dma_is_apbh()) { 649 if (dma_is_apbh(mxs_dma)) {
582 writel(BM_APBH_CTRL0_APB_BURST_EN, 650 writel(BM_APBH_CTRL0_APB_BURST_EN,
583 mxs_dma->base + HW_APBHX_CTRL0 + MXS_SET_ADDR); 651 mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET);
584 writel(BM_APBH_CTRL0_APB_BURST8_EN, 652 writel(BM_APBH_CTRL0_APB_BURST8_EN,
585 mxs_dma->base + HW_APBHX_CTRL0 + MXS_SET_ADDR); 653 mxs_dma->base + HW_APBHX_CTRL0 + STMP_OFFSET_REG_SET);
586 } 654 }
587 655
588 /* enable irq for all the channels */ 656 /* enable irq for all the channels */
589 writel(MXS_DMA_CHANNELS_MASK << MXS_DMA_CHANNELS, 657 writel(MXS_DMA_CHANNELS_MASK << MXS_DMA_CHANNELS,
590 mxs_dma->base + HW_APBHX_CTRL1 + MXS_SET_ADDR); 658 mxs_dma->base + HW_APBHX_CTRL1 + STMP_OFFSET_REG_SET);
591 659
592err_out: 660err_out:
593 clk_disable_unprepare(mxs_dma->clk); 661 clk_disable_unprepare(mxs_dma->clk);
@@ -596,8 +664,9 @@ err_out:
596 664
597static int __init mxs_dma_probe(struct platform_device *pdev) 665static int __init mxs_dma_probe(struct platform_device *pdev)
598{ 666{
599 const struct platform_device_id *id_entry = 667 const struct platform_device_id *id_entry;
600 platform_get_device_id(pdev); 668 const struct of_device_id *of_id;
669 const struct mxs_dma_type *dma_type;
601 struct mxs_dma_engine *mxs_dma; 670 struct mxs_dma_engine *mxs_dma;
602 struct resource *iores; 671 struct resource *iores;
603 int ret, i; 672 int ret, i;
@@ -606,7 +675,15 @@ static int __init mxs_dma_probe(struct platform_device *pdev)
606 if (!mxs_dma) 675 if (!mxs_dma)
607 return -ENOMEM; 676 return -ENOMEM;
608 677
609 mxs_dma->dev_id = id_entry->driver_data; 678 of_id = of_match_device(mxs_dma_dt_ids, &pdev->dev);
679 if (of_id)
680 id_entry = of_id->data;
681 else
682 id_entry = platform_get_device_id(pdev);
683
684 dma_type = (struct mxs_dma_type *)id_entry->driver_data;
685 mxs_dma->type = dma_type->type;
686 mxs_dma->dev_id = dma_type->id;
610 687
611 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); 688 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
612 689
@@ -689,23 +766,12 @@ err_request_region:
689 return ret; 766 return ret;
690} 767}
691 768
692static struct platform_device_id mxs_dma_type[] = {
693 {
694 .name = "mxs-dma-apbh",
695 .driver_data = MXS_DMA_APBH,
696 }, {
697 .name = "mxs-dma-apbx",
698 .driver_data = MXS_DMA_APBX,
699 }, {
700 /* end of list */
701 }
702};
703
704static struct platform_driver mxs_dma_driver = { 769static struct platform_driver mxs_dma_driver = {
705 .driver = { 770 .driver = {
706 .name = "mxs-dma", 771 .name = "mxs-dma",
772 .of_match_table = mxs_dma_dt_ids,
707 }, 773 },
708 .id_table = mxs_dma_type, 774 .id_table = mxs_dma_ids,
709}; 775};
710 776
711static int __init mxs_dma_module_init(void) 777static int __init mxs_dma_module_init(void)
diff --git a/drivers/gpio/gpio-mxs.c b/drivers/gpio/gpio-mxs.c
index b4136501abd8..39e495669961 100644
--- a/drivers/gpio/gpio-mxs.c
+++ b/drivers/gpio/gpio-mxs.c
@@ -25,23 +25,25 @@
25#include <linux/io.h> 25#include <linux/io.h>
26#include <linux/irq.h> 26#include <linux/irq.h>
27#include <linux/gpio.h> 27#include <linux/gpio.h>
28#include <linux/of.h>
29#include <linux/of_address.h>
30#include <linux/of_device.h>
28#include <linux/platform_device.h> 31#include <linux/platform_device.h>
29#include <linux/slab.h> 32#include <linux/slab.h>
30#include <linux/basic_mmio_gpio.h> 33#include <linux/basic_mmio_gpio.h>
31#include <linux/module.h> 34#include <linux/module.h>
32#include <mach/mxs.h>
33 35
34#define MXS_SET 0x4 36#define MXS_SET 0x4
35#define MXS_CLR 0x8 37#define MXS_CLR 0x8
36 38
37#define PINCTRL_DOUT(n) ((cpu_is_mx23() ? 0x0500 : 0x0700) + (n) * 0x10) 39#define PINCTRL_DOUT(p) ((is_imx23_gpio(p) ? 0x0500 : 0x0700) + (p->id) * 0x10)
38#define PINCTRL_DIN(n) ((cpu_is_mx23() ? 0x0600 : 0x0900) + (n) * 0x10) 40#define PINCTRL_DIN(p) ((is_imx23_gpio(p) ? 0x0600 : 0x0900) + (p->id) * 0x10)
39#define PINCTRL_DOE(n) ((cpu_is_mx23() ? 0x0700 : 0x0b00) + (n) * 0x10) 41#define PINCTRL_DOE(p) ((is_imx23_gpio(p) ? 0x0700 : 0x0b00) + (p->id) * 0x10)
40#define PINCTRL_PIN2IRQ(n) ((cpu_is_mx23() ? 0x0800 : 0x1000) + (n) * 0x10) 42#define PINCTRL_PIN2IRQ(p) ((is_imx23_gpio(p) ? 0x0800 : 0x1000) + (p->id) * 0x10)
41#define PINCTRL_IRQEN(n) ((cpu_is_mx23() ? 0x0900 : 0x1100) + (n) * 0x10) 43#define PINCTRL_IRQEN(p) ((is_imx23_gpio(p) ? 0x0900 : 0x1100) + (p->id) * 0x10)
42#define PINCTRL_IRQLEV(n) ((cpu_is_mx23() ? 0x0a00 : 0x1200) + (n) * 0x10) 44#define PINCTRL_IRQLEV(p) ((is_imx23_gpio(p) ? 0x0a00 : 0x1200) + (p->id) * 0x10)
43#define PINCTRL_IRQPOL(n) ((cpu_is_mx23() ? 0x0b00 : 0x1300) + (n) * 0x10) 45#define PINCTRL_IRQPOL(p) ((is_imx23_gpio(p) ? 0x0b00 : 0x1300) + (p->id) * 0x10)
44#define PINCTRL_IRQSTAT(n) ((cpu_is_mx23() ? 0x0c00 : 0x1400) + (n) * 0x10) 46#define PINCTRL_IRQSTAT(p) ((is_imx23_gpio(p) ? 0x0c00 : 0x1400) + (p->id) * 0x10)
45 47
46#define GPIO_INT_FALL_EDGE 0x0 48#define GPIO_INT_FALL_EDGE 0x0
47#define GPIO_INT_LOW_LEV 0x1 49#define GPIO_INT_LOW_LEV 0x1
@@ -52,14 +54,30 @@
52 54
53#define irq_to_gpio(irq) ((irq) - MXS_GPIO_IRQ_START) 55#define irq_to_gpio(irq) ((irq) - MXS_GPIO_IRQ_START)
54 56
57enum mxs_gpio_id {
58 IMX23_GPIO,
59 IMX28_GPIO,
60};
61
55struct mxs_gpio_port { 62struct mxs_gpio_port {
56 void __iomem *base; 63 void __iomem *base;
57 int id; 64 int id;
58 int irq; 65 int irq;
59 int virtual_irq_start; 66 int virtual_irq_start;
60 struct bgpio_chip bgc; 67 struct bgpio_chip bgc;
68 enum mxs_gpio_id devid;
61}; 69};
62 70
71static inline int is_imx23_gpio(struct mxs_gpio_port *port)
72{
73 return port->devid == IMX23_GPIO;
74}
75
76static inline int is_imx28_gpio(struct mxs_gpio_port *port)
77{
78 return port->devid == IMX28_GPIO;
79}
80
63/* Note: This driver assumes 32 GPIOs are handled in one register */ 81/* Note: This driver assumes 32 GPIOs are handled in one register */
64 82
65static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type) 83static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
@@ -89,21 +107,21 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type)
89 } 107 }
90 108
91 /* set level or edge */ 109 /* set level or edge */
92 pin_addr = port->base + PINCTRL_IRQLEV(port->id); 110 pin_addr = port->base + PINCTRL_IRQLEV(port);
93 if (edge & GPIO_INT_LEV_MASK) 111 if (edge & GPIO_INT_LEV_MASK)
94 writel(pin_mask, pin_addr + MXS_SET); 112 writel(pin_mask, pin_addr + MXS_SET);
95 else 113 else
96 writel(pin_mask, pin_addr + MXS_CLR); 114 writel(pin_mask, pin_addr + MXS_CLR);
97 115
98 /* set polarity */ 116 /* set polarity */
99 pin_addr = port->base + PINCTRL_IRQPOL(port->id); 117 pin_addr = port->base + PINCTRL_IRQPOL(port);
100 if (edge & GPIO_INT_POL_MASK) 118 if (edge & GPIO_INT_POL_MASK)
101 writel(pin_mask, pin_addr + MXS_SET); 119 writel(pin_mask, pin_addr + MXS_SET);
102 else 120 else
103 writel(pin_mask, pin_addr + MXS_CLR); 121 writel(pin_mask, pin_addr + MXS_CLR);
104 122
105 writel(1 << (gpio & 0x1f), 123 writel(1 << (gpio & 0x1f),
106 port->base + PINCTRL_IRQSTAT(port->id) + MXS_CLR); 124 port->base + PINCTRL_IRQSTAT(port) + MXS_CLR);
107 125
108 return 0; 126 return 0;
109} 127}
@@ -117,8 +135,8 @@ static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
117 135
118 desc->irq_data.chip->irq_ack(&desc->irq_data); 136 desc->irq_data.chip->irq_ack(&desc->irq_data);
119 137
120 irq_stat = readl(port->base + PINCTRL_IRQSTAT(port->id)) & 138 irq_stat = readl(port->base + PINCTRL_IRQSTAT(port)) &
121 readl(port->base + PINCTRL_IRQEN(port->id)); 139 readl(port->base + PINCTRL_IRQEN(port));
122 140
123 while (irq_stat != 0) { 141 while (irq_stat != 0) {
124 int irqoffset = fls(irq_stat) - 1; 142 int irqoffset = fls(irq_stat) - 1;
@@ -164,8 +182,8 @@ static void __init mxs_gpio_init_gc(struct mxs_gpio_port *port)
164 ct->chip.irq_unmask = irq_gc_mask_set_bit; 182 ct->chip.irq_unmask = irq_gc_mask_set_bit;
165 ct->chip.irq_set_type = mxs_gpio_set_irq_type; 183 ct->chip.irq_set_type = mxs_gpio_set_irq_type;
166 ct->chip.irq_set_wake = mxs_gpio_set_wake_irq; 184 ct->chip.irq_set_wake = mxs_gpio_set_wake_irq;
167 ct->regs.ack = PINCTRL_IRQSTAT(port->id) + MXS_CLR; 185 ct->regs.ack = PINCTRL_IRQSTAT(port) + MXS_CLR;
168 ct->regs.mask = PINCTRL_IRQEN(port->id); 186 ct->regs.mask = PINCTRL_IRQEN(port);
169 187
170 irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0); 188 irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0);
171} 189}
@@ -179,60 +197,83 @@ static int mxs_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
179 return port->virtual_irq_start + offset; 197 return port->virtual_irq_start + offset;
180} 198}
181 199
200static struct platform_device_id mxs_gpio_ids[] = {
201 {
202 .name = "imx23-gpio",
203 .driver_data = IMX23_GPIO,
204 }, {
205 .name = "imx28-gpio",
206 .driver_data = IMX28_GPIO,
207 }, {
208 /* sentinel */
209 }
210};
211MODULE_DEVICE_TABLE(platform, mxs_gpio_ids);
212
213static const struct of_device_id mxs_gpio_dt_ids[] = {
214 { .compatible = "fsl,imx23-gpio", .data = (void *) IMX23_GPIO, },
215 { .compatible = "fsl,imx28-gpio", .data = (void *) IMX28_GPIO, },
216 { /* sentinel */ }
217};
218MODULE_DEVICE_TABLE(of, mxs_gpio_dt_ids);
219
182static int __devinit mxs_gpio_probe(struct platform_device *pdev) 220static int __devinit mxs_gpio_probe(struct platform_device *pdev)
183{ 221{
222 const struct of_device_id *of_id =
223 of_match_device(mxs_gpio_dt_ids, &pdev->dev);
224 struct device_node *np = pdev->dev.of_node;
225 struct device_node *parent;
184 static void __iomem *base; 226 static void __iomem *base;
185 struct mxs_gpio_port *port; 227 struct mxs_gpio_port *port;
186 struct resource *iores = NULL; 228 struct resource *iores = NULL;
187 int err; 229 int err;
188 230
189 port = kzalloc(sizeof(struct mxs_gpio_port), GFP_KERNEL); 231 port = devm_kzalloc(&pdev->dev, sizeof(*port), GFP_KERNEL);
190 if (!port) 232 if (!port)
191 return -ENOMEM; 233 return -ENOMEM;
192 234
193 port->id = pdev->id; 235 if (np) {
236 port->id = of_alias_get_id(np, "gpio");
237 if (port->id < 0)
238 return port->id;
239 port->devid = (enum mxs_gpio_id) of_id->data;
240 } else {
241 port->id = pdev->id;
242 port->devid = pdev->id_entry->driver_data;
243 }
194 port->virtual_irq_start = MXS_GPIO_IRQ_START + port->id * 32; 244 port->virtual_irq_start = MXS_GPIO_IRQ_START + port->id * 32;
195 245
246 port->irq = platform_get_irq(pdev, 0);
247 if (port->irq < 0)
248 return port->irq;
249
196 /* 250 /*
197 * map memory region only once, as all the gpio ports 251 * map memory region only once, as all the gpio ports
198 * share the same one 252 * share the same one
199 */ 253 */
200 if (!base) { 254 if (!base) {
201 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); 255 if (np) {
202 if (!iores) { 256 parent = of_get_parent(np);
203 err = -ENODEV; 257 base = of_iomap(parent, 0);
204 goto out_kfree; 258 of_node_put(parent);
205 } 259 } else {
206 260 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
207 if (!request_mem_region(iores->start, resource_size(iores), 261 base = devm_request_and_ioremap(&pdev->dev, iores);
208 pdev->name)) {
209 err = -EBUSY;
210 goto out_kfree;
211 }
212
213 base = ioremap(iores->start, resource_size(iores));
214 if (!base) {
215 err = -ENOMEM;
216 goto out_release_mem;
217 } 262 }
263 if (!base)
264 return -EADDRNOTAVAIL;
218 } 265 }
219 port->base = base; 266 port->base = base;
220 267
221 port->irq = platform_get_irq(pdev, 0);
222 if (port->irq < 0) {
223 err = -EINVAL;
224 goto out_iounmap;
225 }
226
227 /* 268 /*
228 * select the pin interrupt functionality but initially 269 * select the pin interrupt functionality but initially
229 * disable the interrupts 270 * disable the interrupts
230 */ 271 */
231 writel(~0U, port->base + PINCTRL_PIN2IRQ(port->id)); 272 writel(~0U, port->base + PINCTRL_PIN2IRQ(port));
232 writel(0, port->base + PINCTRL_IRQEN(port->id)); 273 writel(0, port->base + PINCTRL_IRQEN(port));
233 274
234 /* clear address has to be used to clear IRQSTAT bits */ 275 /* clear address has to be used to clear IRQSTAT bits */
235 writel(~0U, port->base + PINCTRL_IRQSTAT(port->id) + MXS_CLR); 276 writel(~0U, port->base + PINCTRL_IRQSTAT(port) + MXS_CLR);
236 277
237 /* gpio-mxs can be a generic irq chip */ 278 /* gpio-mxs can be a generic irq chip */
238 mxs_gpio_init_gc(port); 279 mxs_gpio_init_gc(port);
@@ -242,41 +283,32 @@ static int __devinit mxs_gpio_probe(struct platform_device *pdev)
242 irq_set_handler_data(port->irq, port); 283 irq_set_handler_data(port->irq, port);
243 284
244 err = bgpio_init(&port->bgc, &pdev->dev, 4, 285 err = bgpio_init(&port->bgc, &pdev->dev, 4,
245 port->base + PINCTRL_DIN(port->id), 286 port->base + PINCTRL_DIN(port),
246 port->base + PINCTRL_DOUT(port->id), NULL, 287 port->base + PINCTRL_DOUT(port), NULL,
247 port->base + PINCTRL_DOE(port->id), NULL, 0); 288 port->base + PINCTRL_DOE(port), NULL, 0);
248 if (err) 289 if (err)
249 goto out_iounmap; 290 return err;
250 291
251 port->bgc.gc.to_irq = mxs_gpio_to_irq; 292 port->bgc.gc.to_irq = mxs_gpio_to_irq;
252 port->bgc.gc.base = port->id * 32; 293 port->bgc.gc.base = port->id * 32;
253 294
254 err = gpiochip_add(&port->bgc.gc); 295 err = gpiochip_add(&port->bgc.gc);
255 if (err) 296 if (err) {
256 goto out_bgpio_remove; 297 bgpio_remove(&port->bgc);
298 return err;
299 }
257 300
258 return 0; 301 return 0;
259
260out_bgpio_remove:
261 bgpio_remove(&port->bgc);
262out_iounmap:
263 if (iores)
264 iounmap(port->base);
265out_release_mem:
266 if (iores)
267 release_mem_region(iores->start, resource_size(iores));
268out_kfree:
269 kfree(port);
270 dev_info(&pdev->dev, "%s failed with errno %d\n", __func__, err);
271 return err;
272} 302}
273 303
274static struct platform_driver mxs_gpio_driver = { 304static struct platform_driver mxs_gpio_driver = {
275 .driver = { 305 .driver = {
276 .name = "gpio-mxs", 306 .name = "gpio-mxs",
277 .owner = THIS_MODULE, 307 .owner = THIS_MODULE,
308 .of_match_table = mxs_gpio_dt_ids,
278 }, 309 },
279 .probe = mxs_gpio_probe, 310 .probe = mxs_gpio_probe,
311 .id_table = mxs_gpio_ids,
280}; 312};
281 313
282static int __init mxs_gpio_init(void) 314static int __init mxs_gpio_init(void)
diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c
index 58a338846f06..04eb441b6ce1 100644
--- a/drivers/i2c/busses/i2c-mxs.c
+++ b/drivers/i2c/busses/i2c-mxs.c
@@ -28,6 +28,9 @@
28#include <linux/io.h> 28#include <linux/io.h>
29#include <linux/pinctrl/consumer.h> 29#include <linux/pinctrl/consumer.h>
30#include <linux/stmp_device.h> 30#include <linux/stmp_device.h>
31#include <linux/of.h>
32#include <linux/of_device.h>
33#include <linux/of_i2c.h>
31 34
32#define DRIVER_NAME "mxs-i2c" 35#define DRIVER_NAME "mxs-i2c"
33 36
@@ -366,6 +369,7 @@ static int __devinit mxs_i2c_probe(struct platform_device *pdev)
366 adap->algo = &mxs_i2c_algo; 369 adap->algo = &mxs_i2c_algo;
367 adap->dev.parent = dev; 370 adap->dev.parent = dev;
368 adap->nr = pdev->id; 371 adap->nr = pdev->id;
372 adap->dev.of_node = pdev->dev.of_node;
369 i2c_set_adapdata(adap, i2c); 373 i2c_set_adapdata(adap, i2c);
370 err = i2c_add_numbered_adapter(adap); 374 err = i2c_add_numbered_adapter(adap);
371 if (err) { 375 if (err) {
@@ -375,6 +379,8 @@ static int __devinit mxs_i2c_probe(struct platform_device *pdev)
375 return err; 379 return err;
376 } 380 }
377 381
382 of_i2c_register_devices(adap);
383
378 return 0; 384 return 0;
379} 385}
380 386
@@ -394,10 +400,17 @@ static int __devexit mxs_i2c_remove(struct platform_device *pdev)
394 return 0; 400 return 0;
395} 401}
396 402
403static const struct of_device_id mxs_i2c_dt_ids[] = {
404 { .compatible = "fsl,imx28-i2c", },
405 { /* sentinel */ }
406};
407MODULE_DEVICE_TABLE(of, mxs_i2c_dt_ids);
408
397static struct platform_driver mxs_i2c_driver = { 409static struct platform_driver mxs_i2c_driver = {
398 .driver = { 410 .driver = {
399 .name = DRIVER_NAME, 411 .name = DRIVER_NAME,
400 .owner = THIS_MODULE, 412 .owner = THIS_MODULE,
413 .of_match_table = mxs_i2c_dt_ids,
401 }, 414 },
402 .remove = __devexit_p(mxs_i2c_remove), 415 .remove = __devexit_p(mxs_i2c_remove),
403}; 416};
diff --git a/drivers/mmc/host/mxs-mmc.c b/drivers/mmc/host/mxs-mmc.c
index bb03ddda481d..34a90266ab11 100644
--- a/drivers/mmc/host/mxs-mmc.c
+++ b/drivers/mmc/host/mxs-mmc.c
@@ -23,6 +23,9 @@
23#include <linux/kernel.h> 23#include <linux/kernel.h>
24#include <linux/init.h> 24#include <linux/init.h>
25#include <linux/ioport.h> 25#include <linux/ioport.h>
26#include <linux/of.h>
27#include <linux/of_device.h>
28#include <linux/of_gpio.h>
26#include <linux/platform_device.h> 29#include <linux/platform_device.h>
27#include <linux/delay.h> 30#include <linux/delay.h>
28#include <linux/interrupt.h> 31#include <linux/interrupt.h>
@@ -40,18 +43,15 @@
40#include <linux/module.h> 43#include <linux/module.h>
41#include <linux/fsl/mxs-dma.h> 44#include <linux/fsl/mxs-dma.h>
42#include <linux/pinctrl/consumer.h> 45#include <linux/pinctrl/consumer.h>
43 46#include <linux/stmp_device.h>
44#include <mach/mxs.h> 47#include <linux/mmc/mxs-mmc.h>
45#include <mach/common.h>
46#include <mach/mmc.h>
47 48
48#define DRIVER_NAME "mxs-mmc" 49#define DRIVER_NAME "mxs-mmc"
49 50
50/* card detect polling timeout */ 51/* card detect polling timeout */
51#define MXS_MMC_DETECT_TIMEOUT (HZ/2) 52#define MXS_MMC_DETECT_TIMEOUT (HZ/2)
52 53
53#define SSP_VERSION_LATEST 4 54#define ssp_is_old(host) ((host)->devid == IMX23_MMC)
54#define ssp_is_old() (host->version < SSP_VERSION_LATEST)
55 55
56/* SSP registers */ 56/* SSP registers */
57#define HW_SSP_CTRL0 0x000 57#define HW_SSP_CTRL0 0x000
@@ -86,14 +86,14 @@
86#define BM_SSP_BLOCK_SIZE_BLOCK_COUNT (0xffffff << 4) 86#define BM_SSP_BLOCK_SIZE_BLOCK_COUNT (0xffffff << 4)
87#define BP_SSP_BLOCK_SIZE_BLOCK_SIZE (0) 87#define BP_SSP_BLOCK_SIZE_BLOCK_SIZE (0)
88#define BM_SSP_BLOCK_SIZE_BLOCK_SIZE (0xf) 88#define BM_SSP_BLOCK_SIZE_BLOCK_SIZE (0xf)
89#define HW_SSP_TIMING (ssp_is_old() ? 0x050 : 0x070) 89#define HW_SSP_TIMING(h) (ssp_is_old(h) ? 0x050 : 0x070)
90#define BP_SSP_TIMING_TIMEOUT (16) 90#define BP_SSP_TIMING_TIMEOUT (16)
91#define BM_SSP_TIMING_TIMEOUT (0xffff << 16) 91#define BM_SSP_TIMING_TIMEOUT (0xffff << 16)
92#define BP_SSP_TIMING_CLOCK_DIVIDE (8) 92#define BP_SSP_TIMING_CLOCK_DIVIDE (8)
93#define BM_SSP_TIMING_CLOCK_DIVIDE (0xff << 8) 93#define BM_SSP_TIMING_CLOCK_DIVIDE (0xff << 8)
94#define BP_SSP_TIMING_CLOCK_RATE (0) 94#define BP_SSP_TIMING_CLOCK_RATE (0)
95#define BM_SSP_TIMING_CLOCK_RATE (0xff) 95#define BM_SSP_TIMING_CLOCK_RATE (0xff)
96#define HW_SSP_CTRL1 (ssp_is_old() ? 0x060 : 0x080) 96#define HW_SSP_CTRL1(h) (ssp_is_old(h) ? 0x060 : 0x080)
97#define BM_SSP_CTRL1_SDIO_IRQ (1 << 31) 97#define BM_SSP_CTRL1_SDIO_IRQ (1 << 31)
98#define BM_SSP_CTRL1_SDIO_IRQ_EN (1 << 30) 98#define BM_SSP_CTRL1_SDIO_IRQ_EN (1 << 30)
99#define BM_SSP_CTRL1_RESP_ERR_IRQ (1 << 29) 99#define BM_SSP_CTRL1_RESP_ERR_IRQ (1 << 29)
@@ -116,15 +116,13 @@
116#define BM_SSP_CTRL1_WORD_LENGTH (0xf << 4) 116#define BM_SSP_CTRL1_WORD_LENGTH (0xf << 4)
117#define BP_SSP_CTRL1_SSP_MODE (0) 117#define BP_SSP_CTRL1_SSP_MODE (0)
118#define BM_SSP_CTRL1_SSP_MODE (0xf) 118#define BM_SSP_CTRL1_SSP_MODE (0xf)
119#define HW_SSP_SDRESP0 (ssp_is_old() ? 0x080 : 0x0a0) 119#define HW_SSP_SDRESP0(h) (ssp_is_old(h) ? 0x080 : 0x0a0)
120#define HW_SSP_SDRESP1 (ssp_is_old() ? 0x090 : 0x0b0) 120#define HW_SSP_SDRESP1(h) (ssp_is_old(h) ? 0x090 : 0x0b0)
121#define HW_SSP_SDRESP2 (ssp_is_old() ? 0x0a0 : 0x0c0) 121#define HW_SSP_SDRESP2(h) (ssp_is_old(h) ? 0x0a0 : 0x0c0)
122#define HW_SSP_SDRESP3 (ssp_is_old() ? 0x0b0 : 0x0d0) 122#define HW_SSP_SDRESP3(h) (ssp_is_old(h) ? 0x0b0 : 0x0d0)
123#define HW_SSP_STATUS (ssp_is_old() ? 0x0c0 : 0x100) 123#define HW_SSP_STATUS(h) (ssp_is_old(h) ? 0x0c0 : 0x100)
124#define BM_SSP_STATUS_CARD_DETECT (1 << 28) 124#define BM_SSP_STATUS_CARD_DETECT (1 << 28)
125#define BM_SSP_STATUS_SDIO_IRQ (1 << 17) 125#define BM_SSP_STATUS_SDIO_IRQ (1 << 17)
126#define HW_SSP_VERSION (cpu_is_mx23() ? 0x110 : 0x130)
127#define BP_SSP_VERSION_MAJOR (24)
128 126
129#define BF_SSP(value, field) (((value) << BP_SSP_##field) & BM_SSP_##field) 127#define BF_SSP(value, field) (((value) << BP_SSP_##field) & BM_SSP_##field)
130 128
@@ -139,6 +137,11 @@
139 137
140#define SSP_PIO_NUM 3 138#define SSP_PIO_NUM 3
141 139
140enum mxs_mmc_id {
141 IMX23_MMC,
142 IMX28_MMC,
143};
144
142struct mxs_mmc_host { 145struct mxs_mmc_host {
143 struct mmc_host *mmc; 146 struct mmc_host *mmc;
144 struct mmc_request *mrq; 147 struct mmc_request *mrq;
@@ -146,9 +149,7 @@ struct mxs_mmc_host {
146 struct mmc_data *data; 149 struct mmc_data *data;
147 150
148 void __iomem *base; 151 void __iomem *base;
149 int irq; 152 int dma_channel;
150 struct resource *res;
151 struct resource *dma_res;
152 struct clk *clk; 153 struct clk *clk;
153 unsigned int clk_rate; 154 unsigned int clk_rate;
154 155
@@ -158,32 +159,28 @@ struct mxs_mmc_host {
158 enum dma_transfer_direction slave_dirn; 159 enum dma_transfer_direction slave_dirn;
159 u32 ssp_pio_words[SSP_PIO_NUM]; 160 u32 ssp_pio_words[SSP_PIO_NUM];
160 161
161 unsigned int version; 162 enum mxs_mmc_id devid;
162 unsigned char bus_width; 163 unsigned char bus_width;
163 spinlock_t lock; 164 spinlock_t lock;
164 int sdio_irq_en; 165 int sdio_irq_en;
166 int wp_gpio;
165}; 167};
166 168
167static int mxs_mmc_get_ro(struct mmc_host *mmc) 169static int mxs_mmc_get_ro(struct mmc_host *mmc)
168{ 170{
169 struct mxs_mmc_host *host = mmc_priv(mmc); 171 struct mxs_mmc_host *host = mmc_priv(mmc);
170 struct mxs_mmc_platform_data *pdata =
171 mmc_dev(host->mmc)->platform_data;
172
173 if (!pdata)
174 return -EFAULT;
175 172
176 if (!gpio_is_valid(pdata->wp_gpio)) 173 if (!gpio_is_valid(host->wp_gpio))
177 return -EINVAL; 174 return -EINVAL;
178 175
179 return gpio_get_value(pdata->wp_gpio); 176 return gpio_get_value(host->wp_gpio);
180} 177}
181 178
182static int mxs_mmc_get_cd(struct mmc_host *mmc) 179static int mxs_mmc_get_cd(struct mmc_host *mmc)
183{ 180{
184 struct mxs_mmc_host *host = mmc_priv(mmc); 181 struct mxs_mmc_host *host = mmc_priv(mmc);
185 182
186 return !(readl(host->base + HW_SSP_STATUS) & 183 return !(readl(host->base + HW_SSP_STATUS(host)) &
187 BM_SSP_STATUS_CARD_DETECT); 184 BM_SSP_STATUS_CARD_DETECT);
188} 185}
189 186
@@ -191,7 +188,7 @@ static void mxs_mmc_reset(struct mxs_mmc_host *host)
191{ 188{
192 u32 ctrl0, ctrl1; 189 u32 ctrl0, ctrl1;
193 190
194 mxs_reset_block(host->base); 191 stmp_reset_block(host->base);
195 192
196 ctrl0 = BM_SSP_CTRL0_IGNORE_CRC; 193 ctrl0 = BM_SSP_CTRL0_IGNORE_CRC;
197 ctrl1 = BF_SSP(0x3, CTRL1_SSP_MODE) | 194 ctrl1 = BF_SSP(0x3, CTRL1_SSP_MODE) |
@@ -207,7 +204,7 @@ static void mxs_mmc_reset(struct mxs_mmc_host *host)
207 writel(BF_SSP(0xffff, TIMING_TIMEOUT) | 204 writel(BF_SSP(0xffff, TIMING_TIMEOUT) |
208 BF_SSP(2, TIMING_CLOCK_DIVIDE) | 205 BF_SSP(2, TIMING_CLOCK_DIVIDE) |
209 BF_SSP(0, TIMING_CLOCK_RATE), 206 BF_SSP(0, TIMING_CLOCK_RATE),
210 host->base + HW_SSP_TIMING); 207 host->base + HW_SSP_TIMING(host));
211 208
212 if (host->sdio_irq_en) { 209 if (host->sdio_irq_en) {
213 ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK; 210 ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
@@ -215,7 +212,7 @@ static void mxs_mmc_reset(struct mxs_mmc_host *host)
215 } 212 }
216 213
217 writel(ctrl0, host->base + HW_SSP_CTRL0); 214 writel(ctrl0, host->base + HW_SSP_CTRL0);
218 writel(ctrl1, host->base + HW_SSP_CTRL1); 215 writel(ctrl1, host->base + HW_SSP_CTRL1(host));
219} 216}
220 217
221static void mxs_mmc_start_cmd(struct mxs_mmc_host *host, 218static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,
@@ -229,12 +226,12 @@ static void mxs_mmc_request_done(struct mxs_mmc_host *host)
229 226
230 if (mmc_resp_type(cmd) & MMC_RSP_PRESENT) { 227 if (mmc_resp_type(cmd) & MMC_RSP_PRESENT) {
231 if (mmc_resp_type(cmd) & MMC_RSP_136) { 228 if (mmc_resp_type(cmd) & MMC_RSP_136) {
232 cmd->resp[3] = readl(host->base + HW_SSP_SDRESP0); 229 cmd->resp[3] = readl(host->base + HW_SSP_SDRESP0(host));
233 cmd->resp[2] = readl(host->base + HW_SSP_SDRESP1); 230 cmd->resp[2] = readl(host->base + HW_SSP_SDRESP1(host));
234 cmd->resp[1] = readl(host->base + HW_SSP_SDRESP2); 231 cmd->resp[1] = readl(host->base + HW_SSP_SDRESP2(host));
235 cmd->resp[0] = readl(host->base + HW_SSP_SDRESP3); 232 cmd->resp[0] = readl(host->base + HW_SSP_SDRESP3(host));
236 } else { 233 } else {
237 cmd->resp[0] = readl(host->base + HW_SSP_SDRESP0); 234 cmd->resp[0] = readl(host->base + HW_SSP_SDRESP0(host));
238 } 235 }
239 } 236 }
240 237
@@ -277,9 +274,9 @@ static irqreturn_t mxs_mmc_irq_handler(int irq, void *dev_id)
277 274
278 spin_lock(&host->lock); 275 spin_lock(&host->lock);
279 276
280 stat = readl(host->base + HW_SSP_CTRL1); 277 stat = readl(host->base + HW_SSP_CTRL1(host));
281 writel(stat & MXS_MMC_IRQ_BITS, 278 writel(stat & MXS_MMC_IRQ_BITS,
282 host->base + HW_SSP_CTRL1 + MXS_CLR_ADDR); 279 host->base + HW_SSP_CTRL1(host) + STMP_OFFSET_REG_CLR);
283 280
284 if ((stat & BM_SSP_CTRL1_SDIO_IRQ) && (stat & BM_SSP_CTRL1_SDIO_IRQ_EN)) 281 if ((stat & BM_SSP_CTRL1_SDIO_IRQ) && (stat & BM_SSP_CTRL1_SDIO_IRQ_EN))
285 mmc_signal_sdio_irq(host->mmc); 282 mmc_signal_sdio_irq(host->mmc);
@@ -485,7 +482,7 @@ static void mxs_mmc_adtc(struct mxs_mmc_host *host)
485 blocks = 1; 482 blocks = 1;
486 483
487 /* xfer count, block size and count need to be set differently */ 484 /* xfer count, block size and count need to be set differently */
488 if (ssp_is_old()) { 485 if (ssp_is_old(host)) {
489 ctrl0 |= BF_SSP(data_size, CTRL0_XFER_COUNT); 486 ctrl0 |= BF_SSP(data_size, CTRL0_XFER_COUNT);
490 cmd0 |= BF_SSP(log2_blksz, CMD0_BLOCK_SIZE) | 487 cmd0 |= BF_SSP(log2_blksz, CMD0_BLOCK_SIZE) |
491 BF_SSP(blocks - 1, CMD0_BLOCK_COUNT); 488 BF_SSP(blocks - 1, CMD0_BLOCK_COUNT);
@@ -509,10 +506,10 @@ static void mxs_mmc_adtc(struct mxs_mmc_host *host)
509 506
510 /* set the timeout count */ 507 /* set the timeout count */
511 timeout = mxs_ns_to_ssp_ticks(host->clk_rate, data->timeout_ns); 508 timeout = mxs_ns_to_ssp_ticks(host->clk_rate, data->timeout_ns);
512 val = readl(host->base + HW_SSP_TIMING); 509 val = readl(host->base + HW_SSP_TIMING(host));
513 val &= ~(BM_SSP_TIMING_TIMEOUT); 510 val &= ~(BM_SSP_TIMING_TIMEOUT);
514 val |= BF_SSP(timeout, TIMING_TIMEOUT); 511 val |= BF_SSP(timeout, TIMING_TIMEOUT);
515 writel(val, host->base + HW_SSP_TIMING); 512 writel(val, host->base + HW_SSP_TIMING(host));
516 513
517 /* pio */ 514 /* pio */
518 host->ssp_pio_words[0] = ctrl0; 515 host->ssp_pio_words[0] = ctrl0;
@@ -598,11 +595,11 @@ static void mxs_mmc_set_clk_rate(struct mxs_mmc_host *host, unsigned int rate)
598 595
599 ssp_sck = ssp_clk / clock_divide / (1 + clock_rate); 596 ssp_sck = ssp_clk / clock_divide / (1 + clock_rate);
600 597
601 val = readl(host->base + HW_SSP_TIMING); 598 val = readl(host->base + HW_SSP_TIMING(host));
602 val &= ~(BM_SSP_TIMING_CLOCK_DIVIDE | BM_SSP_TIMING_CLOCK_RATE); 599 val &= ~(BM_SSP_TIMING_CLOCK_DIVIDE | BM_SSP_TIMING_CLOCK_RATE);
603 val |= BF_SSP(clock_divide, TIMING_CLOCK_DIVIDE); 600 val |= BF_SSP(clock_divide, TIMING_CLOCK_DIVIDE);
604 val |= BF_SSP(clock_rate, TIMING_CLOCK_RATE); 601 val |= BF_SSP(clock_rate, TIMING_CLOCK_RATE);
605 writel(val, host->base + HW_SSP_TIMING); 602 writel(val, host->base + HW_SSP_TIMING(host));
606 603
607 host->clk_rate = ssp_sck; 604 host->clk_rate = ssp_sck;
608 605
@@ -637,18 +634,19 @@ static void mxs_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
637 634
638 if (enable) { 635 if (enable) {
639 writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK, 636 writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
640 host->base + HW_SSP_CTRL0 + MXS_SET_ADDR); 637 host->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
641 writel(BM_SSP_CTRL1_SDIO_IRQ_EN, 638 writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
642 host->base + HW_SSP_CTRL1 + MXS_SET_ADDR); 639 host->base + HW_SSP_CTRL1(host) + STMP_OFFSET_REG_SET);
643 640
644 if (readl(host->base + HW_SSP_STATUS) & BM_SSP_STATUS_SDIO_IRQ) 641 if (readl(host->base + HW_SSP_STATUS(host)) &
642 BM_SSP_STATUS_SDIO_IRQ)
645 mmc_signal_sdio_irq(host->mmc); 643 mmc_signal_sdio_irq(host->mmc);
646 644
647 } else { 645 } else {
648 writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK, 646 writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
649 host->base + HW_SSP_CTRL0 + MXS_CLR_ADDR); 647 host->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
650 writel(BM_SSP_CTRL1_SDIO_IRQ_EN, 648 writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
651 host->base + HW_SSP_CTRL1 + MXS_CLR_ADDR); 649 host->base + HW_SSP_CTRL1(host) + STMP_OFFSET_REG_CLR);
652 } 650 }
653 651
654 spin_unlock_irqrestore(&host->lock, flags); 652 spin_unlock_irqrestore(&host->lock, flags);
@@ -669,7 +667,7 @@ static bool mxs_mmc_dma_filter(struct dma_chan *chan, void *param)
669 if (!mxs_dma_is_apbh(chan)) 667 if (!mxs_dma_is_apbh(chan))
670 return false; 668 return false;
671 669
672 if (chan->chan_id != host->dma_res->start) 670 if (chan->chan_id != host->dma_channel)
673 return false; 671 return false;
674 672
675 chan->private = &host->dma_data; 673 chan->private = &host->dma_data;
@@ -677,11 +675,34 @@ static bool mxs_mmc_dma_filter(struct dma_chan *chan, void *param)
677 return true; 675 return true;
678} 676}
679 677
678static struct platform_device_id mxs_mmc_ids[] = {
679 {
680 .name = "imx23-mmc",
681 .driver_data = IMX23_MMC,
682 }, {
683 .name = "imx28-mmc",
684 .driver_data = IMX28_MMC,
685 }, {
686 /* sentinel */
687 }
688};
689MODULE_DEVICE_TABLE(platform, mxs_mmc_ids);
690
691static const struct of_device_id mxs_mmc_dt_ids[] = {
692 { .compatible = "fsl,imx23-mmc", .data = (void *) IMX23_MMC, },
693 { .compatible = "fsl,imx28-mmc", .data = (void *) IMX28_MMC, },
694 { /* sentinel */ }
695};
696MODULE_DEVICE_TABLE(of, mxs_mmc_dt_ids);
697
680static int mxs_mmc_probe(struct platform_device *pdev) 698static int mxs_mmc_probe(struct platform_device *pdev)
681{ 699{
700 const struct of_device_id *of_id =
701 of_match_device(mxs_mmc_dt_ids, &pdev->dev);
702 struct device_node *np = pdev->dev.of_node;
682 struct mxs_mmc_host *host; 703 struct mxs_mmc_host *host;
683 struct mmc_host *mmc; 704 struct mmc_host *mmc;
684 struct resource *iores, *dmares, *r; 705 struct resource *iores, *dmares;
685 struct mxs_mmc_platform_data *pdata; 706 struct mxs_mmc_platform_data *pdata;
686 struct pinctrl *pinctrl; 707 struct pinctrl *pinctrl;
687 int ret = 0, irq_err, irq_dma; 708 int ret = 0, irq_err, irq_dma;
@@ -691,46 +712,51 @@ static int mxs_mmc_probe(struct platform_device *pdev)
691 dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0); 712 dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0);
692 irq_err = platform_get_irq(pdev, 0); 713 irq_err = platform_get_irq(pdev, 0);
693 irq_dma = platform_get_irq(pdev, 1); 714 irq_dma = platform_get_irq(pdev, 1);
694 if (!iores || !dmares || irq_err < 0 || irq_dma < 0) 715 if (!iores || irq_err < 0 || irq_dma < 0)
695 return -EINVAL; 716 return -EINVAL;
696 717
697 r = request_mem_region(iores->start, resource_size(iores), pdev->name);
698 if (!r)
699 return -EBUSY;
700
701 mmc = mmc_alloc_host(sizeof(struct mxs_mmc_host), &pdev->dev); 718 mmc = mmc_alloc_host(sizeof(struct mxs_mmc_host), &pdev->dev);
702 if (!mmc) { 719 if (!mmc)
703 ret = -ENOMEM; 720 return -ENOMEM;
704 goto out_release_mem;
705 }
706 721
707 host = mmc_priv(mmc); 722 host = mmc_priv(mmc);
708 host->base = ioremap(r->start, resource_size(r)); 723 host->base = devm_request_and_ioremap(&pdev->dev, iores);
709 if (!host->base) { 724 if (!host->base) {
710 ret = -ENOMEM; 725 ret = -EADDRNOTAVAIL;
711 goto out_mmc_free; 726 goto out_mmc_free;
712 } 727 }
713 728
714 /* only major verion does matter */ 729 if (np) {
715 host->version = readl(host->base + HW_SSP_VERSION) >> 730 host->devid = (enum mxs_mmc_id) of_id->data;
716 BP_SSP_VERSION_MAJOR; 731 /*
732 * TODO: This is a temporary solution and should be changed
733 * to use generic DMA binding later when the helpers get in.
734 */
735 ret = of_property_read_u32(np, "fsl,ssp-dma-channel",
736 &host->dma_channel);
737 if (ret) {
738 dev_err(mmc_dev(host->mmc),
739 "failed to get dma channel\n");
740 goto out_mmc_free;
741 }
742 } else {
743 host->devid = pdev->id_entry->driver_data;
744 host->dma_channel = dmares->start;
745 }
717 746
718 host->mmc = mmc; 747 host->mmc = mmc;
719 host->res = r;
720 host->dma_res = dmares;
721 host->irq = irq_err;
722 host->sdio_irq_en = 0; 748 host->sdio_irq_en = 0;
723 749
724 pinctrl = devm_pinctrl_get_select_default(&pdev->dev); 750 pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
725 if (IS_ERR(pinctrl)) { 751 if (IS_ERR(pinctrl)) {
726 ret = PTR_ERR(pinctrl); 752 ret = PTR_ERR(pinctrl);
727 goto out_iounmap; 753 goto out_mmc_free;
728 } 754 }
729 755
730 host->clk = clk_get(&pdev->dev, NULL); 756 host->clk = clk_get(&pdev->dev, NULL);
731 if (IS_ERR(host->clk)) { 757 if (IS_ERR(host->clk)) {
732 ret = PTR_ERR(host->clk); 758 ret = PTR_ERR(host->clk);
733 goto out_iounmap; 759 goto out_mmc_free;
734 } 760 }
735 clk_prepare_enable(host->clk); 761 clk_prepare_enable(host->clk);
736 762
@@ -752,11 +778,20 @@ static int mxs_mmc_probe(struct platform_device *pdev)
752 MMC_CAP_SDIO_IRQ | MMC_CAP_NEEDS_POLL; 778 MMC_CAP_SDIO_IRQ | MMC_CAP_NEEDS_POLL;
753 779
754 pdata = mmc_dev(host->mmc)->platform_data; 780 pdata = mmc_dev(host->mmc)->platform_data;
755 if (pdata) { 781 if (!pdata) {
782 u32 bus_width = 0;
783 of_property_read_u32(np, "bus-width", &bus_width);
784 if (bus_width == 4)
785 mmc->caps |= MMC_CAP_4_BIT_DATA;
786 else if (bus_width == 8)
787 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA;
788 host->wp_gpio = of_get_named_gpio(np, "wp-gpios", 0);
789 } else {
756 if (pdata->flags & SLOTF_8_BIT_CAPABLE) 790 if (pdata->flags & SLOTF_8_BIT_CAPABLE)
757 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA; 791 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA;
758 if (pdata->flags & SLOTF_4_BIT_CAPABLE) 792 if (pdata->flags & SLOTF_4_BIT_CAPABLE)
759 mmc->caps |= MMC_CAP_4_BIT_DATA; 793 mmc->caps |= MMC_CAP_4_BIT_DATA;
794 host->wp_gpio = pdata->wp_gpio;
760 } 795 }
761 796
762 mmc->f_min = 400000; 797 mmc->f_min = 400000;
@@ -765,13 +800,14 @@ static int mxs_mmc_probe(struct platform_device *pdev)
765 800
766 mmc->max_segs = 52; 801 mmc->max_segs = 52;
767 mmc->max_blk_size = 1 << 0xf; 802 mmc->max_blk_size = 1 << 0xf;
768 mmc->max_blk_count = (ssp_is_old()) ? 0xff : 0xffffff; 803 mmc->max_blk_count = (ssp_is_old(host)) ? 0xff : 0xffffff;
769 mmc->max_req_size = (ssp_is_old()) ? 0xffff : 0xffffffff; 804 mmc->max_req_size = (ssp_is_old(host)) ? 0xffff : 0xffffffff;
770 mmc->max_seg_size = dma_get_max_seg_size(host->dmach->device->dev); 805 mmc->max_seg_size = dma_get_max_seg_size(host->dmach->device->dev);
771 806
772 platform_set_drvdata(pdev, mmc); 807 platform_set_drvdata(pdev, mmc);
773 808
774 ret = request_irq(host->irq, mxs_mmc_irq_handler, 0, DRIVER_NAME, host); 809 ret = devm_request_irq(&pdev->dev, irq_err, mxs_mmc_irq_handler, 0,
810 DRIVER_NAME, host);
775 if (ret) 811 if (ret)
776 goto out_free_dma; 812 goto out_free_dma;
777 813
@@ -779,26 +815,20 @@ static int mxs_mmc_probe(struct platform_device *pdev)
779 815
780 ret = mmc_add_host(mmc); 816 ret = mmc_add_host(mmc);
781 if (ret) 817 if (ret)
782 goto out_free_irq; 818 goto out_free_dma;
783 819
784 dev_info(mmc_dev(host->mmc), "initialized\n"); 820 dev_info(mmc_dev(host->mmc), "initialized\n");
785 821
786 return 0; 822 return 0;
787 823
788out_free_irq:
789 free_irq(host->irq, host);
790out_free_dma: 824out_free_dma:
791 if (host->dmach) 825 if (host->dmach)
792 dma_release_channel(host->dmach); 826 dma_release_channel(host->dmach);
793out_clk_put: 827out_clk_put:
794 clk_disable_unprepare(host->clk); 828 clk_disable_unprepare(host->clk);
795 clk_put(host->clk); 829 clk_put(host->clk);
796out_iounmap:
797 iounmap(host->base);
798out_mmc_free: 830out_mmc_free:
799 mmc_free_host(mmc); 831 mmc_free_host(mmc);
800out_release_mem:
801 release_mem_region(iores->start, resource_size(iores));
802 return ret; 832 return ret;
803} 833}
804 834
@@ -806,12 +836,9 @@ static int mxs_mmc_remove(struct platform_device *pdev)
806{ 836{
807 struct mmc_host *mmc = platform_get_drvdata(pdev); 837 struct mmc_host *mmc = platform_get_drvdata(pdev);
808 struct mxs_mmc_host *host = mmc_priv(mmc); 838 struct mxs_mmc_host *host = mmc_priv(mmc);
809 struct resource *res = host->res;
810 839
811 mmc_remove_host(mmc); 840 mmc_remove_host(mmc);
812 841
813 free_irq(host->irq, host);
814
815 platform_set_drvdata(pdev, NULL); 842 platform_set_drvdata(pdev, NULL);
816 843
817 if (host->dmach) 844 if (host->dmach)
@@ -820,12 +847,8 @@ static int mxs_mmc_remove(struct platform_device *pdev)
820 clk_disable_unprepare(host->clk); 847 clk_disable_unprepare(host->clk);
821 clk_put(host->clk); 848 clk_put(host->clk);
822 849
823 iounmap(host->base);
824
825 mmc_free_host(mmc); 850 mmc_free_host(mmc);
826 851
827 release_mem_region(res->start, resource_size(res));
828
829 return 0; 852 return 0;
830} 853}
831 854
@@ -865,11 +888,13 @@ static const struct dev_pm_ops mxs_mmc_pm_ops = {
865static struct platform_driver mxs_mmc_driver = { 888static struct platform_driver mxs_mmc_driver = {
866 .probe = mxs_mmc_probe, 889 .probe = mxs_mmc_probe,
867 .remove = mxs_mmc_remove, 890 .remove = mxs_mmc_remove,
891 .id_table = mxs_mmc_ids,
868 .driver = { 892 .driver = {
869 .name = DRIVER_NAME, 893 .name = DRIVER_NAME,
870 .owner = THIS_MODULE, 894 .owner = THIS_MODULE,
871#ifdef CONFIG_PM 895#ifdef CONFIG_PM
872 .pm = &mxs_mmc_pm_ops, 896 .pm = &mxs_mmc_pm_ops,
897 .of_match_table = mxs_mmc_dt_ids,
873#endif 898#endif
874 }, 899 },
875}; 900};
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-12 08:49:02 -0500