diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpio/Kconfig | 4 | ||||
-rw-r--r-- | drivers/gpio/devres.c | 14 | ||||
-rw-r--r-- | drivers/gpio/gpio-bt8xx.c | 2 | ||||
-rw-r--r-- | drivers/gpio/gpio-grgpio.c | 6 | ||||
-rw-r--r-- | drivers/gpio/gpio-ich.c | 8 | ||||
-rw-r--r-- | drivers/gpio/gpio-langwell.c | 164 | ||||
-rw-r--r-- | drivers/gpio/gpio-lynxpoint.c | 1 | ||||
-rw-r--r-- | drivers/gpio/gpio-ml-ioh.c | 1 | ||||
-rw-r--r-- | drivers/gpio/gpio-msm-v1.c | 12 | ||||
-rw-r--r-- | drivers/gpio/gpio-omap.c | 2 | ||||
-rw-r--r-- | drivers/gpio/gpio-rcar.c | 9 | ||||
-rw-r--r-- | drivers/gpio/gpio-rdc321x.c | 7 | ||||
-rw-r--r-- | drivers/gpio/gpio-sta2x11.c | 6 | ||||
-rw-r--r-- | drivers/gpio/gpio-stmpe.c | 7 | ||||
-rw-r--r-- | drivers/gpio/gpio-sx150x.c | 18 | ||||
-rw-r--r-- | drivers/gpio/gpio-tc3589x.c | 1 | ||||
-rw-r--r-- | drivers/gpio/gpio-timberdale.c | 2 | ||||
-rw-r--r-- | drivers/gpio/gpio-vx855.c | 2 | ||||
-rw-r--r-- | drivers/gpio/gpio-xilinx.c | 144 | ||||
-rw-r--r-- | drivers/gpio/gpiolib.c | 8 |
20 files changed, 198 insertions, 220 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 94624370caad..b2450ba14138 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig | |||
@@ -244,7 +244,7 @@ config GPIO_TS5500 | |||
244 | 244 | ||
245 | config GPIO_XILINX | 245 | config GPIO_XILINX |
246 | bool "Xilinx GPIO support" | 246 | bool "Xilinx GPIO support" |
247 | depends on PPC_OF || MICROBLAZE | 247 | depends on PPC_OF || MICROBLAZE || ARCH_ZYNQ |
248 | help | 248 | help |
249 | Say yes here to support the Xilinx FPGA GPIO device | 249 | Say yes here to support the Xilinx FPGA GPIO device |
250 | 250 | ||
@@ -340,7 +340,7 @@ config GPIO_MAX7300 | |||
340 | depends on I2C | 340 | depends on I2C |
341 | select GPIO_MAX730X | 341 | select GPIO_MAX730X |
342 | help | 342 | help |
343 | GPIO driver for Maxim MAX7301 I2C-based GPIO expander. | 343 | GPIO driver for Maxim MAX7300 I2C-based GPIO expander. |
344 | 344 | ||
345 | config GPIO_MAX732X | 345 | config GPIO_MAX732X |
346 | tristate "MAX7319, MAX7320-7327 I2C Port Expanders" | 346 | tristate "MAX7319, MAX7320-7327 I2C Port Expanders" |
diff --git a/drivers/gpio/devres.c b/drivers/gpio/devres.c index 1077754f8289..3e7812f0405e 100644 --- a/drivers/gpio/devres.c +++ b/drivers/gpio/devres.c | |||
@@ -34,10 +34,10 @@ static int devm_gpio_match(struct device *dev, void *res, void *data) | |||
34 | } | 34 | } |
35 | 35 | ||
36 | /** | 36 | /** |
37 | * devm_gpio_request - request a gpio for a managed device | 37 | * devm_gpio_request - request a GPIO for a managed device |
38 | * @dev: device to request the gpio for | 38 | * @dev: device to request the GPIO for |
39 | * @gpio: gpio to allocate | 39 | * @gpio: GPIO to allocate |
40 | * @label: the name of the requested gpio | 40 | * @label: the name of the requested GPIO |
41 | * | 41 | * |
42 | * Except for the extra @dev argument, this function takes the | 42 | * Except for the extra @dev argument, this function takes the |
43 | * same arguments and performs the same function as | 43 | * same arguments and performs the same function as |
@@ -101,9 +101,9 @@ int devm_gpio_request_one(struct device *dev, unsigned gpio, | |||
101 | EXPORT_SYMBOL(devm_gpio_request_one); | 101 | EXPORT_SYMBOL(devm_gpio_request_one); |
102 | 102 | ||
103 | /** | 103 | /** |
104 | * devm_gpio_free - free an interrupt | 104 | * devm_gpio_free - free a GPIO |
105 | * @dev: device to free gpio for | 105 | * @dev: device to free GPIO for |
106 | * @gpio: gpio to free | 106 | * @gpio: GPIO to free |
107 | * | 107 | * |
108 | * Except for the extra @dev argument, this function takes the | 108 | * Except for the extra @dev argument, this function takes the |
109 | * same arguments and performs the same function as gpio_free(). | 109 | * same arguments and performs the same function as gpio_free(). |
diff --git a/drivers/gpio/gpio-bt8xx.c b/drivers/gpio/gpio-bt8xx.c index 7d9d7cb35f28..8369e71ebe4f 100644 --- a/drivers/gpio/gpio-bt8xx.c +++ b/drivers/gpio/gpio-bt8xx.c | |||
@@ -286,7 +286,7 @@ static int bt8xxgpio_resume(struct pci_dev *pdev) | |||
286 | unsigned long flags; | 286 | unsigned long flags; |
287 | int err; | 287 | int err; |
288 | 288 | ||
289 | pci_set_power_state(pdev, 0); | 289 | pci_set_power_state(pdev, PCI_D0); |
290 | err = pci_enable_device(pdev); | 290 | err = pci_enable_device(pdev); |
291 | if (err) | 291 | if (err) |
292 | return err; | 292 | return err; |
diff --git a/drivers/gpio/gpio-grgpio.c b/drivers/gpio/gpio-grgpio.c index 8e08b8647655..84d2478ec294 100644 --- a/drivers/gpio/gpio-grgpio.c +++ b/drivers/gpio/gpio-grgpio.c | |||
@@ -235,8 +235,8 @@ static irqreturn_t grgpio_irq_handler(int irq, void *dev) | |||
235 | * This function will be called as a consequence of the call to | 235 | * This function will be called as a consequence of the call to |
236 | * irq_create_mapping in grgpio_to_irq | 236 | * irq_create_mapping in grgpio_to_irq |
237 | */ | 237 | */ |
238 | int grgpio_irq_map(struct irq_domain *d, unsigned int irq, | 238 | static int grgpio_irq_map(struct irq_domain *d, unsigned int irq, |
239 | irq_hw_number_t hwirq) | 239 | irq_hw_number_t hwirq) |
240 | { | 240 | { |
241 | struct grgpio_priv *priv = d->host_data; | 241 | struct grgpio_priv *priv = d->host_data; |
242 | struct grgpio_lirq *lirq; | 242 | struct grgpio_lirq *lirq; |
@@ -291,7 +291,7 @@ int grgpio_irq_map(struct irq_domain *d, unsigned int irq, | |||
291 | return ret; | 291 | return ret; |
292 | } | 292 | } |
293 | 293 | ||
294 | void grgpio_irq_unmap(struct irq_domain *d, unsigned int irq) | 294 | static void grgpio_irq_unmap(struct irq_domain *d, unsigned int irq) |
295 | { | 295 | { |
296 | struct grgpio_priv *priv = d->host_data; | 296 | struct grgpio_priv *priv = d->host_data; |
297 | int index; | 297 | int index; |
diff --git a/drivers/gpio/gpio-ich.c b/drivers/gpio/gpio-ich.c index e16d932fd444..2729e3d2d5bb 100644 --- a/drivers/gpio/gpio-ich.c +++ b/drivers/gpio/gpio-ich.c | |||
@@ -41,12 +41,14 @@ enum GPIO_REG { | |||
41 | GPIO_USE_SEL = 0, | 41 | GPIO_USE_SEL = 0, |
42 | GPIO_IO_SEL, | 42 | GPIO_IO_SEL, |
43 | GPIO_LVL, | 43 | GPIO_LVL, |
44 | GPO_BLINK | ||
44 | }; | 45 | }; |
45 | 46 | ||
46 | static const u8 ichx_regs[3][3] = { | 47 | static const u8 ichx_regs[4][3] = { |
47 | {0x00, 0x30, 0x40}, /* USE_SEL[1-3] offsets */ | 48 | {0x00, 0x30, 0x40}, /* USE_SEL[1-3] offsets */ |
48 | {0x04, 0x34, 0x44}, /* IO_SEL[1-3] offsets */ | 49 | {0x04, 0x34, 0x44}, /* IO_SEL[1-3] offsets */ |
49 | {0x0c, 0x38, 0x48}, /* LVL[1-3] offsets */ | 50 | {0x0c, 0x38, 0x48}, /* LVL[1-3] offsets */ |
51 | {0x18, 0x18, 0x18}, /* BLINK offset */ | ||
50 | }; | 52 | }; |
51 | 53 | ||
52 | static const u8 ichx_reglen[3] = { | 54 | static const u8 ichx_reglen[3] = { |
@@ -148,6 +150,10 @@ static int ichx_gpio_direction_input(struct gpio_chip *gpio, unsigned nr) | |||
148 | static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, | 150 | static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned nr, |
149 | int val) | 151 | int val) |
150 | { | 152 | { |
153 | /* Disable blink hardware which is available for GPIOs from 0 to 31. */ | ||
154 | if (nr < 32) | ||
155 | ichx_write_bit(GPO_BLINK, nr, 0, 0); | ||
156 | |||
151 | /* Set GPIO output value. */ | 157 | /* Set GPIO output value. */ |
152 | ichx_write_bit(GPIO_LVL, nr, val, 0); | 158 | ichx_write_bit(GPIO_LVL, nr, val, 0); |
153 | 159 | ||
diff --git a/drivers/gpio/gpio-langwell.c b/drivers/gpio/gpio-langwell.c index 62ef10a641c4..f4b72456faaf 100644 --- a/drivers/gpio/gpio-langwell.c +++ b/drivers/gpio/gpio-langwell.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Moorestown platform Langwell chip GPIO driver | 2 | * Moorestown platform Langwell chip GPIO driver |
3 | * | 3 | * |
4 | * Copyright (c) 2008 - 2009, Intel Corporation. | 4 | * Copyright (c) 2008, 2009, 2013, Intel Corporation. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
@@ -20,7 +20,6 @@ | |||
20 | /* Supports: | 20 | /* Supports: |
21 | * Moorestown platform Langwell chip. | 21 | * Moorestown platform Langwell chip. |
22 | * Medfield platform Penwell chip. | 22 | * Medfield platform Penwell chip. |
23 | * Whitney point. | ||
24 | */ | 23 | */ |
25 | 24 | ||
26 | #include <linux/module.h> | 25 | #include <linux/module.h> |
@@ -65,7 +64,7 @@ enum GPIO_REG { | |||
65 | 64 | ||
66 | struct lnw_gpio { | 65 | struct lnw_gpio { |
67 | struct gpio_chip chip; | 66 | struct gpio_chip chip; |
68 | void *reg_base; | 67 | void __iomem *reg_base; |
69 | spinlock_t lock; | 68 | spinlock_t lock; |
70 | struct pci_dev *pdev; | 69 | struct pci_dev *pdev; |
71 | struct irq_domain *domain; | 70 | struct irq_domain *domain; |
@@ -74,15 +73,13 @@ struct lnw_gpio { | |||
74 | #define to_lnw_priv(chip) container_of(chip, struct lnw_gpio, chip) | 73 | #define to_lnw_priv(chip) container_of(chip, struct lnw_gpio, chip) |
75 | 74 | ||
76 | static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, | 75 | static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, |
77 | enum GPIO_REG reg_type) | 76 | enum GPIO_REG reg_type) |
78 | { | 77 | { |
79 | struct lnw_gpio *lnw = to_lnw_priv(chip); | 78 | struct lnw_gpio *lnw = to_lnw_priv(chip); |
80 | unsigned nreg = chip->ngpio / 32; | 79 | unsigned nreg = chip->ngpio / 32; |
81 | u8 reg = offset / 32; | 80 | u8 reg = offset / 32; |
82 | void __iomem *ptr; | ||
83 | 81 | ||
84 | ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg * 4); | 82 | return lnw->reg_base + reg_type * nreg * 4 + reg * 4; |
85 | return ptr; | ||
86 | } | 83 | } |
87 | 84 | ||
88 | static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset, | 85 | static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset, |
@@ -91,10 +88,8 @@ static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset, | |||
91 | struct lnw_gpio *lnw = to_lnw_priv(chip); | 88 | struct lnw_gpio *lnw = to_lnw_priv(chip); |
92 | unsigned nreg = chip->ngpio / 32; | 89 | unsigned nreg = chip->ngpio / 32; |
93 | u8 reg = offset / 16; | 90 | u8 reg = offset / 16; |
94 | void __iomem *ptr; | ||
95 | 91 | ||
96 | ptr = (void __iomem *)(lnw->reg_base + reg_type * nreg * 4 + reg * 4); | 92 | return lnw->reg_base + reg_type * nreg * 4 + reg * 4; |
97 | return ptr; | ||
98 | } | 93 | } |
99 | 94 | ||
100 | static int lnw_gpio_request(struct gpio_chip *chip, unsigned offset) | 95 | static int lnw_gpio_request(struct gpio_chip *chip, unsigned offset) |
@@ -318,56 +313,40 @@ static const struct dev_pm_ops lnw_gpio_pm_ops = { | |||
318 | }; | 313 | }; |
319 | 314 | ||
320 | static int lnw_gpio_probe(struct pci_dev *pdev, | 315 | static int lnw_gpio_probe(struct pci_dev *pdev, |
321 | const struct pci_device_id *id) | 316 | const struct pci_device_id *id) |
322 | { | 317 | { |
323 | void *base; | 318 | void __iomem *base; |
324 | resource_size_t start, len; | ||
325 | struct lnw_gpio *lnw; | 319 | struct lnw_gpio *lnw; |
326 | u32 gpio_base; | 320 | u32 gpio_base; |
327 | u32 irq_base; | 321 | u32 irq_base; |
328 | int retval; | 322 | int retval; |
329 | int ngpio = id->driver_data; | 323 | int ngpio = id->driver_data; |
330 | 324 | ||
331 | retval = pci_enable_device(pdev); | 325 | retval = pcim_enable_device(pdev); |
332 | if (retval) | 326 | if (retval) |
333 | return retval; | 327 | return retval; |
334 | 328 | ||
335 | retval = pci_request_regions(pdev, "langwell_gpio"); | 329 | retval = pcim_iomap_regions(pdev, 1 << 0 | 1 << 1, pci_name(pdev)); |
336 | if (retval) { | 330 | if (retval) { |
337 | dev_err(&pdev->dev, "error requesting resources\n"); | 331 | dev_err(&pdev->dev, "I/O memory mapping error\n"); |
338 | goto err_pci_req_region; | 332 | return retval; |
339 | } | ||
340 | /* get the gpio_base from bar1 */ | ||
341 | start = pci_resource_start(pdev, 1); | ||
342 | len = pci_resource_len(pdev, 1); | ||
343 | base = ioremap_nocache(start, len); | ||
344 | if (!base) { | ||
345 | dev_err(&pdev->dev, "error mapping bar1\n"); | ||
346 | retval = -EFAULT; | ||
347 | goto err_ioremap; | ||
348 | } | 333 | } |
349 | irq_base = *(u32 *)base; | 334 | |
350 | gpio_base = *((u32 *)base + 1); | 335 | base = pcim_iomap_table(pdev)[1]; |
336 | |||
337 | irq_base = readl(base); | ||
338 | gpio_base = readl(sizeof(u32) + base); | ||
339 | |||
351 | /* release the IO mapping, since we already get the info from bar1 */ | 340 | /* release the IO mapping, since we already get the info from bar1 */ |
352 | iounmap(base); | 341 | pcim_iounmap_regions(pdev, 1 << 1); |
353 | /* get the register base from bar0 */ | ||
354 | start = pci_resource_start(pdev, 0); | ||
355 | len = pci_resource_len(pdev, 0); | ||
356 | base = devm_ioremap_nocache(&pdev->dev, start, len); | ||
357 | if (!base) { | ||
358 | dev_err(&pdev->dev, "error mapping bar0\n"); | ||
359 | retval = -EFAULT; | ||
360 | goto err_ioremap; | ||
361 | } | ||
362 | 342 | ||
363 | lnw = devm_kzalloc(&pdev->dev, sizeof(*lnw), GFP_KERNEL); | 343 | lnw = devm_kzalloc(&pdev->dev, sizeof(*lnw), GFP_KERNEL); |
364 | if (!lnw) { | 344 | if (!lnw) { |
365 | dev_err(&pdev->dev, "can't allocate langwell_gpio chip data\n"); | 345 | dev_err(&pdev->dev, "can't allocate chip data\n"); |
366 | retval = -ENOMEM; | 346 | return -ENOMEM; |
367 | goto err_ioremap; | ||
368 | } | 347 | } |
369 | 348 | ||
370 | lnw->reg_base = base; | 349 | lnw->reg_base = pcim_iomap_table(pdev)[0]; |
371 | lnw->chip.label = dev_name(&pdev->dev); | 350 | lnw->chip.label = dev_name(&pdev->dev); |
372 | lnw->chip.request = lnw_gpio_request; | 351 | lnw->chip.request = lnw_gpio_request; |
373 | lnw->chip.direction_input = lnw_gpio_direction_input; | 352 | lnw->chip.direction_input = lnw_gpio_direction_input; |
@@ -380,18 +359,18 @@ static int lnw_gpio_probe(struct pci_dev *pdev, | |||
380 | lnw->chip.can_sleep = 0; | 359 | lnw->chip.can_sleep = 0; |
381 | lnw->pdev = pdev; | 360 | lnw->pdev = pdev; |
382 | 361 | ||
362 | spin_lock_init(&lnw->lock); | ||
363 | |||
383 | lnw->domain = irq_domain_add_simple(pdev->dev.of_node, ngpio, irq_base, | 364 | lnw->domain = irq_domain_add_simple(pdev->dev.of_node, ngpio, irq_base, |
384 | &lnw_gpio_irq_ops, lnw); | 365 | &lnw_gpio_irq_ops, lnw); |
385 | if (!lnw->domain) { | 366 | if (!lnw->domain) |
386 | retval = -ENOMEM; | 367 | return -ENOMEM; |
387 | goto err_ioremap; | ||
388 | } | ||
389 | 368 | ||
390 | pci_set_drvdata(pdev, lnw); | 369 | pci_set_drvdata(pdev, lnw); |
391 | retval = gpiochip_add(&lnw->chip); | 370 | retval = gpiochip_add(&lnw->chip); |
392 | if (retval) { | 371 | if (retval) { |
393 | dev_err(&pdev->dev, "langwell gpiochip_add error %d\n", retval); | 372 | dev_err(&pdev->dev, "gpiochip_add error %d\n", retval); |
394 | goto err_ioremap; | 373 | return retval; |
395 | } | 374 | } |
396 | 375 | ||
397 | lnw_irq_init_hw(lnw); | 376 | lnw_irq_init_hw(lnw); |
@@ -399,18 +378,10 @@ static int lnw_gpio_probe(struct pci_dev *pdev, | |||
399 | irq_set_handler_data(pdev->irq, lnw); | 378 | irq_set_handler_data(pdev->irq, lnw); |
400 | irq_set_chained_handler(pdev->irq, lnw_irq_handler); | 379 | irq_set_chained_handler(pdev->irq, lnw_irq_handler); |
401 | 380 | ||
402 | spin_lock_init(&lnw->lock); | ||
403 | |||
404 | pm_runtime_put_noidle(&pdev->dev); | 381 | pm_runtime_put_noidle(&pdev->dev); |
405 | pm_runtime_allow(&pdev->dev); | 382 | pm_runtime_allow(&pdev->dev); |
406 | 383 | ||
407 | return 0; | 384 | return 0; |
408 | |||
409 | err_ioremap: | ||
410 | pci_release_regions(pdev); | ||
411 | err_pci_req_region: | ||
412 | pci_disable_device(pdev); | ||
413 | return retval; | ||
414 | } | 385 | } |
415 | 386 | ||
416 | static struct pci_driver lnw_gpio_driver = { | 387 | static struct pci_driver lnw_gpio_driver = { |
@@ -422,88 +393,9 @@ static struct pci_driver lnw_gpio_driver = { | |||
422 | }, | 393 | }, |
423 | }; | 394 | }; |
424 | 395 | ||
425 | |||
426 | static int wp_gpio_probe(struct platform_device *pdev) | ||
427 | { | ||
428 | struct lnw_gpio *lnw; | ||
429 | struct gpio_chip *gc; | ||
430 | struct resource *rc; | ||
431 | int retval = 0; | ||
432 | |||
433 | rc = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
434 | if (!rc) | ||
435 | return -EINVAL; | ||
436 | |||
437 | lnw = kzalloc(sizeof(struct lnw_gpio), GFP_KERNEL); | ||
438 | if (!lnw) { | ||
439 | dev_err(&pdev->dev, | ||
440 | "can't allocate whitneypoint_gpio chip data\n"); | ||
441 | return -ENOMEM; | ||
442 | } | ||
443 | lnw->reg_base = ioremap_nocache(rc->start, resource_size(rc)); | ||
444 | if (lnw->reg_base == NULL) { | ||
445 | retval = -EINVAL; | ||
446 | goto err_kmalloc; | ||
447 | } | ||
448 | spin_lock_init(&lnw->lock); | ||
449 | gc = &lnw->chip; | ||
450 | gc->label = dev_name(&pdev->dev); | ||
451 | gc->owner = THIS_MODULE; | ||
452 | gc->direction_input = lnw_gpio_direction_input; | ||
453 | gc->direction_output = lnw_gpio_direction_output; | ||
454 | gc->get = lnw_gpio_get; | ||
455 | gc->set = lnw_gpio_set; | ||
456 | gc->to_irq = NULL; | ||
457 | gc->base = 0; | ||
458 | gc->ngpio = 64; | ||
459 | gc->can_sleep = 0; | ||
460 | retval = gpiochip_add(gc); | ||
461 | if (retval) { | ||
462 | dev_err(&pdev->dev, "whitneypoint gpiochip_add error %d\n", | ||
463 | retval); | ||
464 | goto err_ioremap; | ||
465 | } | ||
466 | platform_set_drvdata(pdev, lnw); | ||
467 | return 0; | ||
468 | err_ioremap: | ||
469 | iounmap(lnw->reg_base); | ||
470 | err_kmalloc: | ||
471 | kfree(lnw); | ||
472 | return retval; | ||
473 | } | ||
474 | |||
475 | static int wp_gpio_remove(struct platform_device *pdev) | ||
476 | { | ||
477 | struct lnw_gpio *lnw = platform_get_drvdata(pdev); | ||
478 | int err; | ||
479 | err = gpiochip_remove(&lnw->chip); | ||
480 | if (err) | ||
481 | dev_err(&pdev->dev, "failed to remove gpio_chip.\n"); | ||
482 | iounmap(lnw->reg_base); | ||
483 | kfree(lnw); | ||
484 | platform_set_drvdata(pdev, NULL); | ||
485 | return 0; | ||
486 | } | ||
487 | |||
488 | static struct platform_driver wp_gpio_driver = { | ||
489 | .probe = wp_gpio_probe, | ||
490 | .remove = wp_gpio_remove, | ||
491 | .driver = { | ||
492 | .name = "wp_gpio", | ||
493 | .owner = THIS_MODULE, | ||
494 | }, | ||
495 | }; | ||
496 | |||
497 | static int __init lnw_gpio_init(void) | 396 | static int __init lnw_gpio_init(void) |
498 | { | 397 | { |
499 | int ret; | 398 | return pci_register_driver(&lnw_gpio_driver); |
500 | ret = pci_register_driver(&lnw_gpio_driver); | ||
501 | if (ret < 0) | ||
502 | return ret; | ||
503 | ret = platform_driver_register(&wp_gpio_driver); | ||
504 | if (ret < 0) | ||
505 | pci_unregister_driver(&lnw_gpio_driver); | ||
506 | return ret; | ||
507 | } | 399 | } |
508 | 400 | ||
509 | device_initcall(lnw_gpio_init); | 401 | device_initcall(lnw_gpio_init); |
diff --git a/drivers/gpio/gpio-lynxpoint.c b/drivers/gpio/gpio-lynxpoint.c index 86c17de87692..761c4705dfbb 100644 --- a/drivers/gpio/gpio-lynxpoint.c +++ b/drivers/gpio/gpio-lynxpoint.c | |||
@@ -447,7 +447,6 @@ static int lp_gpio_remove(struct platform_device *pdev) | |||
447 | err = gpiochip_remove(&lg->chip); | 447 | err = gpiochip_remove(&lg->chip); |
448 | if (err) | 448 | if (err) |
449 | dev_warn(&pdev->dev, "failed to remove gpio_chip.\n"); | 449 | dev_warn(&pdev->dev, "failed to remove gpio_chip.\n"); |
450 | platform_set_drvdata(pdev, NULL); | ||
451 | return 0; | 450 | return 0; |
452 | } | 451 | } |
453 | 452 | ||
diff --git a/drivers/gpio/gpio-ml-ioh.c b/drivers/gpio/gpio-ml-ioh.c index 0966f2637ad2..6da6d7667c6d 100644 --- a/drivers/gpio/gpio-ml-ioh.c +++ b/drivers/gpio/gpio-ml-ioh.c | |||
@@ -465,6 +465,7 @@ static int ioh_gpio_probe(struct pci_dev *pdev, | |||
465 | dev_warn(&pdev->dev, | 465 | dev_warn(&pdev->dev, |
466 | "ml_ioh_gpio: Failed to get IRQ base num\n"); | 466 | "ml_ioh_gpio: Failed to get IRQ base num\n"); |
467 | chip->irq_base = -1; | 467 | chip->irq_base = -1; |
468 | ret = irq_base; | ||
468 | goto err_irq_alloc_descs; | 469 | goto err_irq_alloc_descs; |
469 | } | 470 | } |
470 | chip->irq_base = irq_base; | 471 | chip->irq_base = irq_base; |
diff --git a/drivers/gpio/gpio-msm-v1.c b/drivers/gpio/gpio-msm-v1.c index fb2cc90d0134..e3ceaacde45c 100644 --- a/drivers/gpio/gpio-msm-v1.c +++ b/drivers/gpio/gpio-msm-v1.c | |||
@@ -652,14 +652,14 @@ static int gpio_msm_v1_probe(struct platform_device *pdev) | |||
652 | return irq2; | 652 | return irq2; |
653 | 653 | ||
654 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 654 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
655 | base1 = devm_request_and_ioremap(&pdev->dev, res); | 655 | base1 = devm_ioremap_resource(&pdev->dev, res); |
656 | if (!base1) | 656 | if (IS_ERR(base1)) |
657 | return -EADDRNOTAVAIL; | 657 | return PTR_ERR(base1); |
658 | 658 | ||
659 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | 659 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
660 | base2 = devm_request_and_ioremap(&pdev->dev, res); | 660 | base2 = devm_ioremap_resource(&pdev->dev, res); |
661 | if (!base2) | 661 | if (IS_ERR(base2)) |
662 | return -EADDRNOTAVAIL; | 662 | return PTR_ERR(base2); |
663 | 663 | ||
664 | for (i = FIRST_GPIO_IRQ; i < FIRST_GPIO_IRQ + NR_GPIO_IRQS; i++) { | 664 | for (i = FIRST_GPIO_IRQ; i < FIRST_GPIO_IRQ + NR_GPIO_IRQS; i++) { |
665 | if (i - FIRST_GPIO_IRQ >= | 665 | if (i - FIRST_GPIO_IRQ >= |
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 4a430360af5a..dfeb3a3a8f20 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c | |||
@@ -1482,7 +1482,7 @@ static void omap_gpio_restore_context(struct gpio_bank *bank) | |||
1482 | #else | 1482 | #else |
1483 | #define omap_gpio_runtime_suspend NULL | 1483 | #define omap_gpio_runtime_suspend NULL |
1484 | #define omap_gpio_runtime_resume NULL | 1484 | #define omap_gpio_runtime_resume NULL |
1485 | static void omap_gpio_init_context(struct gpio_bank *p) {} | 1485 | static inline void omap_gpio_init_context(struct gpio_bank *p) {} |
1486 | #endif | 1486 | #endif |
1487 | 1487 | ||
1488 | static const struct dev_pm_ops gpio_pm_ops = { | 1488 | static const struct dev_pm_ops gpio_pm_ops = { |
diff --git a/drivers/gpio/gpio-rcar.c b/drivers/gpio/gpio-rcar.c index 6ec82f76f019..e8198dd68615 100644 --- a/drivers/gpio/gpio-rcar.c +++ b/drivers/gpio/gpio-rcar.c | |||
@@ -232,7 +232,14 @@ static int gpio_rcar_direction_input(struct gpio_chip *chip, unsigned offset) | |||
232 | 232 | ||
233 | static int gpio_rcar_get(struct gpio_chip *chip, unsigned offset) | 233 | static int gpio_rcar_get(struct gpio_chip *chip, unsigned offset) |
234 | { | 234 | { |
235 | return (int)(gpio_rcar_read(gpio_to_priv(chip), INDT) & BIT(offset)); | 235 | u32 bit = BIT(offset); |
236 | |||
237 | /* testing on r8a7790 shows that INDT does not show correct pin state | ||
238 | * when configured as output, so use OUTDT in case of output pins */ | ||
239 | if (gpio_rcar_read(gpio_to_priv(chip), INOUTSEL) & bit) | ||
240 | return (int)(gpio_rcar_read(gpio_to_priv(chip), OUTDT) & bit); | ||
241 | else | ||
242 | return (int)(gpio_rcar_read(gpio_to_priv(chip), INDT) & bit); | ||
236 | } | 243 | } |
237 | 244 | ||
238 | static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value) | 245 | static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value) |
diff --git a/drivers/gpio/gpio-rdc321x.c b/drivers/gpio/gpio-rdc321x.c index 1bf55f67f7a5..368c3c00fca5 100644 --- a/drivers/gpio/gpio-rdc321x.c +++ b/drivers/gpio/gpio-rdc321x.c | |||
@@ -187,20 +187,18 @@ static int rdc321x_gpio_probe(struct platform_device *pdev) | |||
187 | rdc321x_gpio_dev->reg1_data_base, | 187 | rdc321x_gpio_dev->reg1_data_base, |
188 | &rdc321x_gpio_dev->data_reg[0]); | 188 | &rdc321x_gpio_dev->data_reg[0]); |
189 | if (err) | 189 | if (err) |
190 | goto out_drvdata; | 190 | goto out_free; |
191 | 191 | ||
192 | err = pci_read_config_dword(rdc321x_gpio_dev->sb_pdev, | 192 | err = pci_read_config_dword(rdc321x_gpio_dev->sb_pdev, |
193 | rdc321x_gpio_dev->reg2_data_base, | 193 | rdc321x_gpio_dev->reg2_data_base, |
194 | &rdc321x_gpio_dev->data_reg[1]); | 194 | &rdc321x_gpio_dev->data_reg[1]); |
195 | if (err) | 195 | if (err) |
196 | goto out_drvdata; | 196 | goto out_free; |
197 | 197 | ||
198 | dev_info(&pdev->dev, "registering %d GPIOs\n", | 198 | dev_info(&pdev->dev, "registering %d GPIOs\n", |
199 | rdc321x_gpio_dev->chip.ngpio); | 199 | rdc321x_gpio_dev->chip.ngpio); |
200 | return gpiochip_add(&rdc321x_gpio_dev->chip); | 200 | return gpiochip_add(&rdc321x_gpio_dev->chip); |
201 | 201 | ||
202 | out_drvdata: | ||
203 | platform_set_drvdata(pdev, NULL); | ||
204 | out_free: | 202 | out_free: |
205 | kfree(rdc321x_gpio_dev); | 203 | kfree(rdc321x_gpio_dev); |
206 | return err; | 204 | return err; |
@@ -216,7 +214,6 @@ static int rdc321x_gpio_remove(struct platform_device *pdev) | |||
216 | dev_err(&pdev->dev, "failed to unregister chip\n"); | 214 | dev_err(&pdev->dev, "failed to unregister chip\n"); |
217 | 215 | ||
218 | kfree(rdc321x_gpio_dev); | 216 | kfree(rdc321x_gpio_dev); |
219 | platform_set_drvdata(pdev, NULL); | ||
220 | 217 | ||
221 | return ret; | 218 | return ret; |
222 | } | 219 | } |
diff --git a/drivers/gpio/gpio-sta2x11.c b/drivers/gpio/gpio-sta2x11.c index 558542552aae..f43ab6aea281 100644 --- a/drivers/gpio/gpio-sta2x11.c +++ b/drivers/gpio/gpio-sta2x11.c | |||
@@ -371,8 +371,12 @@ static int gsta_probe(struct platform_device *dev) | |||
371 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); | 371 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); |
372 | 372 | ||
373 | chip = devm_kzalloc(&dev->dev, sizeof(*chip), GFP_KERNEL); | 373 | chip = devm_kzalloc(&dev->dev, sizeof(*chip), GFP_KERNEL); |
374 | if (!chip) | ||
375 | return -ENOMEM; | ||
374 | chip->dev = &dev->dev; | 376 | chip->dev = &dev->dev; |
375 | chip->reg_base = devm_request_and_ioremap(&dev->dev, res); | 377 | chip->reg_base = devm_ioremap_resource(&dev->dev, res); |
378 | if (IS_ERR(chip->reg_base)) | ||
379 | return PTR_ERR(chip->reg_base); | ||
376 | 380 | ||
377 | for (i = 0; i < GSTA_NR_BLOCKS; i++) { | 381 | for (i = 0; i < GSTA_NR_BLOCKS; i++) { |
378 | chip->regs[i] = chip->reg_base + i * 4096; | 382 | chip->regs[i] = chip->reg_base + i * 4096; |
diff --git a/drivers/gpio/gpio-stmpe.c b/drivers/gpio/gpio-stmpe.c index 3ce5bc38ac31..b33bad1bb4df 100644 --- a/drivers/gpio/gpio-stmpe.c +++ b/drivers/gpio/gpio-stmpe.c | |||
@@ -271,8 +271,8 @@ static irqreturn_t stmpe_gpio_irq(int irq, void *dev) | |||
271 | return IRQ_HANDLED; | 271 | return IRQ_HANDLED; |
272 | } | 272 | } |
273 | 273 | ||
274 | int stmpe_gpio_irq_map(struct irq_domain *d, unsigned int virq, | 274 | static int stmpe_gpio_irq_map(struct irq_domain *d, unsigned int virq, |
275 | irq_hw_number_t hwirq) | 275 | irq_hw_number_t hwirq) |
276 | { | 276 | { |
277 | struct stmpe_gpio *stmpe_gpio = d->host_data; | 277 | struct stmpe_gpio *stmpe_gpio = d->host_data; |
278 | 278 | ||
@@ -292,7 +292,7 @@ int stmpe_gpio_irq_map(struct irq_domain *d, unsigned int virq, | |||
292 | return 0; | 292 | return 0; |
293 | } | 293 | } |
294 | 294 | ||
295 | void stmpe_gpio_irq_unmap(struct irq_domain *d, unsigned int virq) | 295 | static void stmpe_gpio_irq_unmap(struct irq_domain *d, unsigned int virq) |
296 | { | 296 | { |
297 | #ifdef CONFIG_ARM | 297 | #ifdef CONFIG_ARM |
298 | set_irq_flags(virq, 0); | 298 | set_irq_flags(virq, 0); |
@@ -431,7 +431,6 @@ static int stmpe_gpio_remove(struct platform_device *pdev) | |||
431 | if (irq >= 0) | 431 | if (irq >= 0) |
432 | free_irq(irq, stmpe_gpio); | 432 | free_irq(irq, stmpe_gpio); |
433 | 433 | ||
434 | platform_set_drvdata(pdev, NULL); | ||
435 | kfree(stmpe_gpio); | 434 | kfree(stmpe_gpio); |
436 | 435 | ||
437 | return 0; | 436 | return 0; |
diff --git a/drivers/gpio/gpio-sx150x.c b/drivers/gpio/gpio-sx150x.c index 796b6c42fa70..f371732591d2 100644 --- a/drivers/gpio/gpio-sx150x.c +++ b/drivers/gpio/gpio-sx150x.c | |||
@@ -548,7 +548,8 @@ static int sx150x_install_irq_chip(struct sx150x_chip *chip, | |||
548 | #endif | 548 | #endif |
549 | } | 549 | } |
550 | 550 | ||
551 | err = request_threaded_irq(irq_summary, | 551 | err = devm_request_threaded_irq(&chip->client->dev, |
552 | irq_summary, | ||
552 | NULL, | 553 | NULL, |
553 | sx150x_irq_thread_fn, | 554 | sx150x_irq_thread_fn, |
554 | IRQF_SHARED | IRQF_TRIGGER_FALLING, | 555 | IRQF_SHARED | IRQF_TRIGGER_FALLING, |
@@ -567,8 +568,6 @@ static void sx150x_remove_irq_chip(struct sx150x_chip *chip) | |||
567 | unsigned n; | 568 | unsigned n; |
568 | unsigned irq; | 569 | unsigned irq; |
569 | 570 | ||
570 | free_irq(chip->irq_summary, chip); | ||
571 | |||
572 | for (n = 0; n < chip->dev_cfg->ngpios; ++n) { | 571 | for (n = 0; n < chip->dev_cfg->ngpios; ++n) { |
573 | irq = chip->irq_base + n; | 572 | irq = chip->irq_base + n; |
574 | irq_set_chip_and_handler(irq, NULL, NULL); | 573 | irq_set_chip_and_handler(irq, NULL, NULL); |
@@ -591,18 +590,19 @@ static int sx150x_probe(struct i2c_client *client, | |||
591 | if (!i2c_check_functionality(client->adapter, i2c_funcs)) | 590 | if (!i2c_check_functionality(client->adapter, i2c_funcs)) |
592 | return -ENOSYS; | 591 | return -ENOSYS; |
593 | 592 | ||
594 | chip = kzalloc(sizeof(struct sx150x_chip), GFP_KERNEL); | 593 | chip = devm_kzalloc(&client->dev, |
594 | sizeof(struct sx150x_chip), GFP_KERNEL); | ||
595 | if (!chip) | 595 | if (!chip) |
596 | return -ENOMEM; | 596 | return -ENOMEM; |
597 | 597 | ||
598 | sx150x_init_chip(chip, client, id->driver_data, pdata); | 598 | sx150x_init_chip(chip, client, id->driver_data, pdata); |
599 | rc = sx150x_init_hw(chip, pdata); | 599 | rc = sx150x_init_hw(chip, pdata); |
600 | if (rc < 0) | 600 | if (rc < 0) |
601 | goto probe_fail_pre_gpiochip_add; | 601 | return rc; |
602 | 602 | ||
603 | rc = gpiochip_add(&chip->gpio_chip); | 603 | rc = gpiochip_add(&chip->gpio_chip); |
604 | if (rc < 0) | 604 | if (rc) |
605 | goto probe_fail_pre_gpiochip_add; | 605 | return rc; |
606 | 606 | ||
607 | if (pdata->irq_summary >= 0) { | 607 | if (pdata->irq_summary >= 0) { |
608 | rc = sx150x_install_irq_chip(chip, | 608 | rc = sx150x_install_irq_chip(chip, |
@@ -617,8 +617,6 @@ static int sx150x_probe(struct i2c_client *client, | |||
617 | return 0; | 617 | return 0; |
618 | probe_fail_post_gpiochip_add: | 618 | probe_fail_post_gpiochip_add: |
619 | WARN_ON(gpiochip_remove(&chip->gpio_chip) < 0); | 619 | WARN_ON(gpiochip_remove(&chip->gpio_chip) < 0); |
620 | probe_fail_pre_gpiochip_add: | ||
621 | kfree(chip); | ||
622 | return rc; | 620 | return rc; |
623 | } | 621 | } |
624 | 622 | ||
@@ -635,8 +633,6 @@ static int sx150x_remove(struct i2c_client *client) | |||
635 | if (chip->irq_summary >= 0) | 633 | if (chip->irq_summary >= 0) |
636 | sx150x_remove_irq_chip(chip); | 634 | sx150x_remove_irq_chip(chip); |
637 | 635 | ||
638 | kfree(chip); | ||
639 | |||
640 | return 0; | 636 | return 0; |
641 | } | 637 | } |
642 | 638 | ||
diff --git a/drivers/gpio/gpio-tc3589x.c b/drivers/gpio/gpio-tc3589x.c index d34d80dfb083..4a5de273c230 100644 --- a/drivers/gpio/gpio-tc3589x.c +++ b/drivers/gpio/gpio-tc3589x.c | |||
@@ -407,7 +407,6 @@ static int tc3589x_gpio_remove(struct platform_device *pdev) | |||
407 | 407 | ||
408 | free_irq(irq, tc3589x_gpio); | 408 | free_irq(irq, tc3589x_gpio); |
409 | 409 | ||
410 | platform_set_drvdata(pdev, NULL); | ||
411 | kfree(tc3589x_gpio); | 410 | kfree(tc3589x_gpio); |
412 | 411 | ||
413 | return 0; | 412 | return 0; |
diff --git a/drivers/gpio/gpio-timberdale.c b/drivers/gpio/gpio-timberdale.c index 43774058b693..4c65f8883204 100644 --- a/drivers/gpio/gpio-timberdale.c +++ b/drivers/gpio/gpio-timberdale.c | |||
@@ -342,8 +342,6 @@ static int timbgpio_remove(struct platform_device *pdev) | |||
342 | release_mem_region(iomem->start, resource_size(iomem)); | 342 | release_mem_region(iomem->start, resource_size(iomem)); |
343 | kfree(tgpio); | 343 | kfree(tgpio); |
344 | 344 | ||
345 | platform_set_drvdata(pdev, NULL); | ||
346 | |||
347 | return 0; | 345 | return 0; |
348 | } | 346 | } |
349 | 347 | ||
diff --git a/drivers/gpio/gpio-vx855.c b/drivers/gpio/gpio-vx855.c index 2b7252cb2427..cddfa22edb41 100644 --- a/drivers/gpio/gpio-vx855.c +++ b/drivers/gpio/gpio-vx855.c | |||
@@ -279,7 +279,6 @@ out_release: | |||
279 | release_region(res_gpi->start, resource_size(res_gpi)); | 279 | release_region(res_gpi->start, resource_size(res_gpi)); |
280 | if (vg->gpo_reserved) | 280 | if (vg->gpo_reserved) |
281 | release_region(res_gpi->start, resource_size(res_gpo)); | 281 | release_region(res_gpi->start, resource_size(res_gpo)); |
282 | platform_set_drvdata(pdev, NULL); | ||
283 | kfree(vg); | 282 | kfree(vg); |
284 | return ret; | 283 | return ret; |
285 | } | 284 | } |
@@ -301,7 +300,6 @@ static int vx855gpio_remove(struct platform_device *pdev) | |||
301 | release_region(res->start, resource_size(res)); | 300 | release_region(res->start, resource_size(res)); |
302 | } | 301 | } |
303 | 302 | ||
304 | platform_set_drvdata(pdev, NULL); | ||
305 | kfree(vg); | 303 | kfree(vg); |
306 | return 0; | 304 | return 0; |
307 | } | 305 | } |
diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c index 9ae7aa8ca48a..792a05ad4649 100644 --- a/drivers/gpio/gpio-xilinx.c +++ b/drivers/gpio/gpio-xilinx.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Xilinx gpio driver | 2 | * Xilinx gpio driver for xps/axi_gpio IP. |
3 | * | 3 | * |
4 | * Copyright 2008 Xilinx, Inc. | 4 | * Copyright 2008 - 2013 Xilinx, Inc. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 | 7 | * it under the terms of the GNU General Public License version 2 |
@@ -12,6 +12,7 @@ | |||
12 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 12 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
13 | */ | 13 | */ |
14 | 14 | ||
15 | #include <linux/bitops.h> | ||
15 | #include <linux/init.h> | 16 | #include <linux/init.h> |
16 | #include <linux/errno.h> | 17 | #include <linux/errno.h> |
17 | #include <linux/module.h> | 18 | #include <linux/module.h> |
@@ -26,11 +27,31 @@ | |||
26 | #define XGPIO_DATA_OFFSET (0x0) /* Data register */ | 27 | #define XGPIO_DATA_OFFSET (0x0) /* Data register */ |
27 | #define XGPIO_TRI_OFFSET (0x4) /* I/O direction register */ | 28 | #define XGPIO_TRI_OFFSET (0x4) /* I/O direction register */ |
28 | 29 | ||
30 | #define XGPIO_CHANNEL_OFFSET 0x8 | ||
31 | |||
32 | /* Read/Write access to the GPIO registers */ | ||
33 | #ifdef CONFIG_ARCH_ZYNQ | ||
34 | # define xgpio_readreg(offset) readl(offset) | ||
35 | # define xgpio_writereg(offset, val) writel(val, offset) | ||
36 | #else | ||
37 | # define xgpio_readreg(offset) __raw_readl(offset) | ||
38 | # define xgpio_writereg(offset, val) __raw_writel(val, offset) | ||
39 | #endif | ||
40 | |||
41 | /** | ||
42 | * struct xgpio_instance - Stores information about GPIO device | ||
43 | * struct of_mm_gpio_chip mmchip: OF GPIO chip for memory mapped banks | ||
44 | * gpio_state: GPIO state shadow register | ||
45 | * gpio_dir: GPIO direction shadow register | ||
46 | * offset: GPIO channel offset | ||
47 | * gpio_lock: Lock used for synchronization | ||
48 | */ | ||
29 | struct xgpio_instance { | 49 | struct xgpio_instance { |
30 | struct of_mm_gpio_chip mmchip; | 50 | struct of_mm_gpio_chip mmchip; |
31 | u32 gpio_state; /* GPIO state shadow register */ | 51 | u32 gpio_state; |
32 | u32 gpio_dir; /* GPIO direction shadow register */ | 52 | u32 gpio_dir; |
33 | spinlock_t gpio_lock; /* Lock used for synchronization */ | 53 | u32 offset; |
54 | spinlock_t gpio_lock; | ||
34 | }; | 55 | }; |
35 | 56 | ||
36 | /** | 57 | /** |
@@ -44,8 +65,12 @@ struct xgpio_instance { | |||
44 | static int xgpio_get(struct gpio_chip *gc, unsigned int gpio) | 65 | static int xgpio_get(struct gpio_chip *gc, unsigned int gpio) |
45 | { | 66 | { |
46 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | 67 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); |
68 | struct xgpio_instance *chip = | ||
69 | container_of(mm_gc, struct xgpio_instance, mmchip); | ||
47 | 70 | ||
48 | return (in_be32(mm_gc->regs + XGPIO_DATA_OFFSET) >> gpio) & 1; | 71 | void __iomem *regs = mm_gc->regs + chip->offset; |
72 | |||
73 | return !!(xgpio_readreg(regs + XGPIO_DATA_OFFSET) & BIT(gpio)); | ||
49 | } | 74 | } |
50 | 75 | ||
51 | /** | 76 | /** |
@@ -63,15 +88,18 @@ static void xgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) | |||
63 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | 88 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); |
64 | struct xgpio_instance *chip = | 89 | struct xgpio_instance *chip = |
65 | container_of(mm_gc, struct xgpio_instance, mmchip); | 90 | container_of(mm_gc, struct xgpio_instance, mmchip); |
91 | void __iomem *regs = mm_gc->regs; | ||
66 | 92 | ||
67 | spin_lock_irqsave(&chip->gpio_lock, flags); | 93 | spin_lock_irqsave(&chip->gpio_lock, flags); |
68 | 94 | ||
69 | /* Write to GPIO signal and set its direction to output */ | 95 | /* Write to GPIO signal and set its direction to output */ |
70 | if (val) | 96 | if (val) |
71 | chip->gpio_state |= 1 << gpio; | 97 | chip->gpio_state |= BIT(gpio); |
72 | else | 98 | else |
73 | chip->gpio_state &= ~(1 << gpio); | 99 | chip->gpio_state &= ~BIT(gpio); |
74 | out_be32(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state); | 100 | |
101 | xgpio_writereg(regs + chip->offset + XGPIO_DATA_OFFSET, | ||
102 | chip->gpio_state); | ||
75 | 103 | ||
76 | spin_unlock_irqrestore(&chip->gpio_lock, flags); | 104 | spin_unlock_irqrestore(&chip->gpio_lock, flags); |
77 | } | 105 | } |
@@ -91,12 +119,13 @@ static int xgpio_dir_in(struct gpio_chip *gc, unsigned int gpio) | |||
91 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | 119 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); |
92 | struct xgpio_instance *chip = | 120 | struct xgpio_instance *chip = |
93 | container_of(mm_gc, struct xgpio_instance, mmchip); | 121 | container_of(mm_gc, struct xgpio_instance, mmchip); |
122 | void __iomem *regs = mm_gc->regs; | ||
94 | 123 | ||
95 | spin_lock_irqsave(&chip->gpio_lock, flags); | 124 | spin_lock_irqsave(&chip->gpio_lock, flags); |
96 | 125 | ||
97 | /* Set the GPIO bit in shadow register and set direction as input */ | 126 | /* Set the GPIO bit in shadow register and set direction as input */ |
98 | chip->gpio_dir |= (1 << gpio); | 127 | chip->gpio_dir |= BIT(gpio); |
99 | out_be32(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir); | 128 | xgpio_writereg(regs + chip->offset + XGPIO_TRI_OFFSET, chip->gpio_dir); |
100 | 129 | ||
101 | spin_unlock_irqrestore(&chip->gpio_lock, flags); | 130 | spin_unlock_irqrestore(&chip->gpio_lock, flags); |
102 | 131 | ||
@@ -119,19 +148,21 @@ static int xgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) | |||
119 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | 148 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); |
120 | struct xgpio_instance *chip = | 149 | struct xgpio_instance *chip = |
121 | container_of(mm_gc, struct xgpio_instance, mmchip); | 150 | container_of(mm_gc, struct xgpio_instance, mmchip); |
151 | void __iomem *regs = mm_gc->regs; | ||
122 | 152 | ||
123 | spin_lock_irqsave(&chip->gpio_lock, flags); | 153 | spin_lock_irqsave(&chip->gpio_lock, flags); |
124 | 154 | ||
125 | /* Write state of GPIO signal */ | 155 | /* Write state of GPIO signal */ |
126 | if (val) | 156 | if (val) |
127 | chip->gpio_state |= 1 << gpio; | 157 | chip->gpio_state |= BIT(gpio); |
128 | else | 158 | else |
129 | chip->gpio_state &= ~(1 << gpio); | 159 | chip->gpio_state &= ~BIT(gpio); |
130 | out_be32(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state); | 160 | xgpio_writereg(regs + chip->offset + XGPIO_DATA_OFFSET, |
161 | chip->gpio_state); | ||
131 | 162 | ||
132 | /* Clear the GPIO bit in shadow register and set direction as output */ | 163 | /* Clear the GPIO bit in shadow register and set direction as output */ |
133 | chip->gpio_dir &= (~(1 << gpio)); | 164 | chip->gpio_dir &= ~BIT(gpio); |
134 | out_be32(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir); | 165 | xgpio_writereg(regs + chip->offset + XGPIO_TRI_OFFSET, chip->gpio_dir); |
135 | 166 | ||
136 | spin_unlock_irqrestore(&chip->gpio_lock, flags); | 167 | spin_unlock_irqrestore(&chip->gpio_lock, flags); |
137 | 168 | ||
@@ -147,8 +178,10 @@ static void xgpio_save_regs(struct of_mm_gpio_chip *mm_gc) | |||
147 | struct xgpio_instance *chip = | 178 | struct xgpio_instance *chip = |
148 | container_of(mm_gc, struct xgpio_instance, mmchip); | 179 | container_of(mm_gc, struct xgpio_instance, mmchip); |
149 | 180 | ||
150 | out_be32(mm_gc->regs + XGPIO_DATA_OFFSET, chip->gpio_state); | 181 | xgpio_writereg(mm_gc->regs + chip->offset + XGPIO_DATA_OFFSET, |
151 | out_be32(mm_gc->regs + XGPIO_TRI_OFFSET, chip->gpio_dir); | 182 | chip->gpio_state); |
183 | xgpio_writereg(mm_gc->regs + chip->offset + XGPIO_TRI_OFFSET, | ||
184 | chip->gpio_dir); | ||
152 | } | 185 | } |
153 | 186 | ||
154 | /** | 187 | /** |
@@ -170,24 +203,20 @@ static int xgpio_of_probe(struct device_node *np) | |||
170 | return -ENOMEM; | 203 | return -ENOMEM; |
171 | 204 | ||
172 | /* Update GPIO state shadow register with default value */ | 205 | /* Update GPIO state shadow register with default value */ |
173 | tree_info = of_get_property(np, "xlnx,dout-default", NULL); | 206 | of_property_read_u32(np, "xlnx,dout-default", &chip->gpio_state); |
174 | if (tree_info) | 207 | |
175 | chip->gpio_state = be32_to_cpup(tree_info); | 208 | /* By default, all pins are inputs */ |
209 | chip->gpio_dir = 0xFFFFFFFF; | ||
176 | 210 | ||
177 | /* Update GPIO direction shadow register with default value */ | 211 | /* Update GPIO direction shadow register with default value */ |
178 | chip->gpio_dir = 0xFFFFFFFF; /* By default, all pins are inputs */ | 212 | of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir); |
179 | tree_info = of_get_property(np, "xlnx,tri-default", NULL); | 213 | |
180 | if (tree_info) | 214 | /* By default assume full GPIO controller */ |
181 | chip->gpio_dir = be32_to_cpup(tree_info); | 215 | chip->mmchip.gc.ngpio = 32; |
182 | 216 | ||
183 | /* Check device node and parent device node for device width */ | 217 | /* Check device node and parent device node for device width */ |
184 | chip->mmchip.gc.ngpio = 32; /* By default assume full GPIO controller */ | 218 | of_property_read_u32(np, "xlnx,gpio-width", |
185 | tree_info = of_get_property(np, "xlnx,gpio-width", NULL); | 219 | (u32 *)&chip->mmchip.gc.ngpio); |
186 | if (!tree_info) | ||
187 | tree_info = of_get_property(np->parent, | ||
188 | "xlnx,gpio-width", NULL); | ||
189 | if (tree_info) | ||
190 | chip->mmchip.gc.ngpio = be32_to_cpup(tree_info); | ||
191 | 220 | ||
192 | spin_lock_init(&chip->gpio_lock); | 221 | spin_lock_init(&chip->gpio_lock); |
193 | 222 | ||
@@ -206,6 +235,57 @@ static int xgpio_of_probe(struct device_node *np) | |||
206 | np->full_name, status); | 235 | np->full_name, status); |
207 | return status; | 236 | return status; |
208 | } | 237 | } |
238 | |||
239 | pr_info("XGpio: %s: registered, base is %d\n", np->full_name, | ||
240 | chip->mmchip.gc.base); | ||
241 | |||
242 | tree_info = of_get_property(np, "xlnx,is-dual", NULL); | ||
243 | if (tree_info && be32_to_cpup(tree_info)) { | ||
244 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); | ||
245 | if (!chip) | ||
246 | return -ENOMEM; | ||
247 | |||
248 | /* Add dual channel offset */ | ||
249 | chip->offset = XGPIO_CHANNEL_OFFSET; | ||
250 | |||
251 | /* Update GPIO state shadow register with default value */ | ||
252 | of_property_read_u32(np, "xlnx,dout-default-2", | ||
253 | &chip->gpio_state); | ||
254 | |||
255 | /* By default, all pins are inputs */ | ||
256 | chip->gpio_dir = 0xFFFFFFFF; | ||
257 | |||
258 | /* Update GPIO direction shadow register with default value */ | ||
259 | of_property_read_u32(np, "xlnx,tri-default-2", &chip->gpio_dir); | ||
260 | |||
261 | /* By default assume full GPIO controller */ | ||
262 | chip->mmchip.gc.ngpio = 32; | ||
263 | |||
264 | /* Check device node and parent device node for device width */ | ||
265 | of_property_read_u32(np, "xlnx,gpio2-width", | ||
266 | (u32 *)&chip->mmchip.gc.ngpio); | ||
267 | |||
268 | spin_lock_init(&chip->gpio_lock); | ||
269 | |||
270 | chip->mmchip.gc.direction_input = xgpio_dir_in; | ||
271 | chip->mmchip.gc.direction_output = xgpio_dir_out; | ||
272 | chip->mmchip.gc.get = xgpio_get; | ||
273 | chip->mmchip.gc.set = xgpio_set; | ||
274 | |||
275 | chip->mmchip.save_regs = xgpio_save_regs; | ||
276 | |||
277 | /* Call the OF gpio helper to setup and register the GPIO dev */ | ||
278 | status = of_mm_gpiochip_add(np, &chip->mmchip); | ||
279 | if (status) { | ||
280 | kfree(chip); | ||
281 | pr_err("%s: error in probe function with status %d\n", | ||
282 | np->full_name, status); | ||
283 | return status; | ||
284 | } | ||
285 | pr_info("XGpio: %s: dual channel registered, base is %d\n", | ||
286 | np->full_name, chip->mmchip.gc.base); | ||
287 | } | ||
288 | |||
209 | return 0; | 289 | return 0; |
210 | } | 290 | } |
211 | 291 | ||
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index c2534d62911c..ff0fd655729f 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c | |||
@@ -1214,15 +1214,14 @@ int gpiochip_add(struct gpio_chip *chip) | |||
1214 | } | 1214 | } |
1215 | } | 1215 | } |
1216 | 1216 | ||
1217 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
1218 | |||
1217 | #ifdef CONFIG_PINCTRL | 1219 | #ifdef CONFIG_PINCTRL |
1218 | INIT_LIST_HEAD(&chip->pin_ranges); | 1220 | INIT_LIST_HEAD(&chip->pin_ranges); |
1219 | #endif | 1221 | #endif |
1220 | 1222 | ||
1221 | of_gpiochip_add(chip); | 1223 | of_gpiochip_add(chip); |
1222 | 1224 | ||
1223 | unlock: | ||
1224 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
1225 | |||
1226 | if (status) | 1225 | if (status) |
1227 | goto fail; | 1226 | goto fail; |
1228 | 1227 | ||
@@ -1235,6 +1234,9 @@ unlock: | |||
1235 | chip->label ? : "generic"); | 1234 | chip->label ? : "generic"); |
1236 | 1235 | ||
1237 | return 0; | 1236 | return 0; |
1237 | |||
1238 | unlock: | ||
1239 | spin_unlock_irqrestore(&gpio_lock, flags); | ||
1238 | fail: | 1240 | fail: |
1239 | /* failures here can mean systems won't boot... */ | 1241 | /* failures here can mean systems won't boot... */ |
1240 | pr_err("gpiochip_add: gpios %d..%d (%s) failed to register\n", | 1242 | pr_err("gpiochip_add: gpios %d..%d (%s) failed to register\n", |