10 files changed, 503 insertions, 32 deletions

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 497912732566..495aeed26779 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -1061,6 +1061,86 @@ static inline void ahci_gtf_filter_workaround(struct ata_host *host)
 {}
 #endif
 
+int ahci_init_interrupts(struct pci_dev *pdev, struct ahci_host_priv *hpriv)
+{
+        int rc;
+        unsigned int maxvec;
+
+        if (!(hpriv->flags & AHCI_HFLAG_NO_MSI)) {
+                rc = pci_enable_msi_block_auto(pdev, &maxvec);
+                if (rc > 0) {
+                        if ((rc == maxvec) || (rc == 1))
+                                return rc;
+                        /*
+                         * Assume that advantage of multipe MSIs is negated,
+                         * so fallback to single MSI mode to save resources
+                         */
+                        pci_disable_msi(pdev);
+                        if (!pci_enable_msi(pdev))
+                                return 1;
+                }
+        }
+
+        pci_intx(pdev, 1);
+        return 0;
+}
+
+/**
+ *      ahci_host_activate - start AHCI host, request IRQs and register it
+ *      @host: target ATA host
+ *      @irq: base IRQ number to request
+ *      @n_msis: number of MSIs allocated for this host
+ *      @irq_handler: irq_handler used when requesting IRQs
+ *      @irq_flags: irq_flags used when requesting IRQs
+ *
+ *      Similar to ata_host_activate, but requests IRQs according to AHCI-1.1
+ *      when multiple MSIs were allocated. That is one MSI per port, starting
+ *      from @irq.
+ *
+ *      LOCKING:
+ *      Inherited from calling layer (may sleep).
+ *
+ *      RETURNS:
+ *      0 on success, -errno otherwise.
+ */
+int ahci_host_activate(struct ata_host *host, int irq, unsigned int n_msis)
+{
+        int i, rc;
+
+        /* Sharing Last Message among several ports is not supported */
+        if (n_msis < host->n_ports)
+                return -EINVAL;
+
+        rc = ata_host_start(host);
+        if (rc)
+                return rc;
+
+        for (i = 0; i < host->n_ports; i++) {
+                rc = devm_request_threaded_irq(host->dev,
+                        irq + i, ahci_hw_interrupt, ahci_thread_fn, IRQF_SHARED,
+                        dev_driver_string(host->dev), host->ports[i]);
+                if (rc)
+                        goto out_free_irqs;
+        }
+
+        for (i = 0; i < host->n_ports; i++)
+                ata_port_desc(host->ports[i], "irq %d", irq + i);
+
+        rc = ata_host_register(host, &ahci_sht);
+        if (rc)
+                goto out_free_all_irqs;
+
+        return 0;
+
+out_free_all_irqs:
+        i = host->n_ports;
+out_free_irqs:
+        for (i--; i >= 0; i--)
+                devm_free_irq(host->dev, irq + i, host->ports[i]);
+
+        return rc;
+}
+
 static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 {
         unsigned int board_id = ent->driver_data;
@@ -1069,7 +1149,7 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
         struct device *dev = &pdev->dev;
         struct ahci_host_priv *hpriv;
         struct ata_host *host;
-        int n_ports, i, rc;
+        int n_ports, n_msis, i, rc;
         int ahci_pci_bar = AHCI_PCI_BAR_STANDARD;
 
         VPRINTK("ENTER\n");
@@ -1156,11 +1236,12 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
         if (ahci_sb600_enable_64bit(pdev))
                 hpriv->flags &= ~AHCI_HFLAG_32BIT_ONLY;
 
-        if ((hpriv->flags & AHCI_HFLAG_NO_MSI) || pci_enable_msi(pdev))
-                pci_intx(pdev, 1);
-
         hpriv->mmio = pcim_iomap_table(pdev)[ahci_pci_bar];
 
+        n_msis = ahci_init_interrupts(pdev, hpriv);
+        if (n_msis > 1)
+                hpriv->flags |= AHCI_HFLAG_MULTI_MSI;
+
         /* save initial config */
         ahci_pci_save_initial_config(pdev, hpriv);
 
@@ -1256,6 +1337,10 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
         ahci_pci_print_info(host);
 
         pci_set_master(pdev);
+
+        if (hpriv->flags & AHCI_HFLAG_MULTI_MSI)
+                return ahci_host_activate(host, pdev->irq, n_msis);
+
         return ata_host_activate(host, pdev->irq, ahci_interrupt, IRQF_SHARED,
                                  &ahci_sht);
 }
diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index 9be471200a07..b830e6c9fe49 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -231,6 +231,7 @@ enum {
         AHCI_HFLAG_DELAY_ENGINE         = (1 << 15), /* do not start engine on
                                                         port start (wait until
                                                         error-handling stage) */
+        AHCI_HFLAG_MULTI_MSI            = (1 << 16), /* multiple PCI MSIs */
 
         /* ap->flags bits */
 
@@ -297,6 +298,8 @@ struct ahci_port_priv {
         unsigned int            ncq_saw_d2h:1;
         unsigned int            ncq_saw_dmas:1;
         unsigned int            ncq_saw_sdb:1;
+        u32                     intr_status;    /* interrupts to handle */
+        spinlock_t              lock;           /* protects parent ata_port */
         u32                     intr_mask;      /* interrupts to enable */
         bool                    fbs_supported;  /* set iff FBS is supported */
         bool                    fbs_enabled;    /* set iff FBS is enabled */
@@ -359,7 +362,10 @@ void ahci_set_em_messages(struct ahci_host_priv *hpriv,
                           struct ata_port_info *pi);
 int ahci_reset_em(struct ata_host *host);
 irqreturn_t ahci_interrupt(int irq, void *dev_instance);
+irqreturn_t ahci_hw_interrupt(int irq, void *dev_instance);
+irqreturn_t ahci_thread_fn(int irq, void *dev_instance);
 void ahci_print_info(struct ata_host *host, const char *scc_s);
+int ahci_host_activate(struct ata_host *host, int irq, unsigned int n_msis);
 
 static inline void __iomem *__ahci_port_base(struct ata_host *host,
                                              unsigned int port_no)
diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c
index 6cd7805e47ca..34c82167b962 100644
--- a/drivers/ata/libahci.c
+++ b/drivers/ata/libahci.c
@@ -1655,19 +1655,16 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat)
                 ata_port_abort(ap);
 }
 
-static void ahci_port_intr(struct ata_port *ap)
+static void ahci_handle_port_interrupt(struct ata_port *ap,
+                                       void __iomem *port_mmio, u32 status)
 {
-        void __iomem *port_mmio = ahci_port_base(ap);
         struct ata_eh_info *ehi = &ap->link.eh_info;
         struct ahci_port_priv *pp = ap->private_data;
         struct ahci_host_priv *hpriv = ap->host->private_data;
         int resetting = !!(ap->pflags & ATA_PFLAG_RESETTING);
-        u32 status, qc_active = 0;
+        u32 qc_active = 0;
         int rc;
 
-        status = readl(port_mmio + PORT_IRQ_STAT);
-        writel(status, port_mmio + PORT_IRQ_STAT);
-
         /* ignore BAD_PMP while resetting */
         if (unlikely(resetting))
                 status &= ~PORT_IRQ_BAD_PMP;
@@ -1743,6 +1740,107 @@ static void ahci_port_intr(struct ata_port *ap)
         }
 }
 
+void ahci_port_intr(struct ata_port *ap)
+{
+        void __iomem *port_mmio = ahci_port_base(ap);
+        u32 status;
+
+        status = readl(port_mmio + PORT_IRQ_STAT);
+        writel(status, port_mmio + PORT_IRQ_STAT);
+
+        ahci_handle_port_interrupt(ap, port_mmio, status);
+}
+
+irqreturn_t ahci_thread_fn(int irq, void *dev_instance)
+{
+        struct ata_port *ap = dev_instance;
+        struct ahci_port_priv *pp = ap->private_data;
+        void __iomem *port_mmio = ahci_port_base(ap);
+        unsigned long flags;
+        u32 status;
+
+        spin_lock_irqsave(&ap->host->lock, flags);
+        status = pp->intr_status;
+        if (status)
+                pp->intr_status = 0;
+        spin_unlock_irqrestore(&ap->host->lock, flags);
+
+        spin_lock_bh(ap->lock);
+        ahci_handle_port_interrupt(ap, port_mmio, status);
+        spin_unlock_bh(ap->lock);
+
+        return IRQ_HANDLED;
+}
+EXPORT_SYMBOL_GPL(ahci_thread_fn);
+
+void ahci_hw_port_interrupt(struct ata_port *ap)
+{
+        void __iomem *port_mmio = ahci_port_base(ap);
+        struct ahci_port_priv *pp = ap->private_data;
+        u32 status;
+
+        status = readl(port_mmio + PORT_IRQ_STAT);
+        writel(status, port_mmio + PORT_IRQ_STAT);
+
+        pp->intr_status |= status;
+}
+
+irqreturn_t ahci_hw_interrupt(int irq, void *dev_instance)
+{
+        struct ata_port *ap_this = dev_instance;
+        struct ahci_port_priv *pp = ap_this->private_data;
+        struct ata_host *host = ap_this->host;
+        struct ahci_host_priv *hpriv = host->private_data;
+        void __iomem *mmio = hpriv->mmio;
+        unsigned int i;
+        u32 irq_stat, irq_masked;
+
+        VPRINTK("ENTER\n");
+
+        spin_lock(&host->lock);
+
+        irq_stat = readl(mmio + HOST_IRQ_STAT);
+
+        if (!irq_stat) {
+                u32 status = pp->intr_status;
+
+                spin_unlock(&host->lock);
+
+                VPRINTK("EXIT\n");
+
+                return status ? IRQ_WAKE_THREAD : IRQ_NONE;
+        }
+
+        irq_masked = irq_stat & hpriv->port_map;
+
+        for (i = 0; i < host->n_ports; i++) {
+                struct ata_port *ap;
+
+                if (!(irq_masked & (1 << i)))
+                        continue;
+
+                ap = host->ports[i];
+                if (ap) {
+                        ahci_hw_port_interrupt(ap);
+                        VPRINTK("port %u\n", i);
+                } else {
+                        VPRINTK("port %u (no irq)\n", i);
+                        if (ata_ratelimit())
+                                dev_warn(host->dev,
+                                         "interrupt on disabled port %u\n", i);
+                }
+        }
+
+        writel(irq_stat, mmio + HOST_IRQ_STAT);
+
+        spin_unlock(&host->lock);
+
+        VPRINTK("EXIT\n");
+
+        return IRQ_WAKE_THREAD;
+}
+EXPORT_SYMBOL_GPL(ahci_hw_interrupt);
+
 irqreturn_t ahci_interrupt(int irq, void *dev_instance)
 {
         struct ata_host *host = dev_instance;
@@ -2196,6 +2294,14 @@ static int ahci_port_start(struct ata_port *ap)
          */
         pp->intr_mask = DEF_PORT_IRQ;
 
+        /*
+         * Switch to per-port locking in case each port has its own MSI vector.
+         */
+        if ((hpriv->flags & AHCI_HFLAG_MULTI_MSI)) {
+                spin_lock_init(&pp->lock);
+                ap->lock = &pp->lock;
+        }
+
         ap->private_data = pp;
 
         /* engage engines, captain */
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index c1c74e030a58..d33eaaf783ad 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -4017,10 +4017,10 @@ static int alloc_irq_index(struct irq_cfg *cfg, u16 devid, int count)
 
                         index -= count - 1;
 
+                        cfg->remapped         = 1;
                         irte_info             = &cfg->irq_2_iommu;
                         irte_info->sub_handle = devid;
                         irte_info->irte_index = index;
-                        irte_info->iommu      = (void *)cfg;
 
                         goto out;
                 }
@@ -4127,9 +4127,9 @@ static int setup_ioapic_entry(int irq, struct IO_APIC_route_entry *entry,
         index = attr->ioapic_pin;
 
         /* Setup IRQ remapping info */
+        cfg->remapped         = 1;
         irte_info->sub_handle = devid;
         irte_info->irte_index = index;
-        irte_info->iommu      = (void *)cfg;
 
         /* Setup IRTE for IOMMU */
         irte.val                = 0;
@@ -4288,9 +4288,9 @@ static int msi_setup_irq(struct pci_dev *pdev, unsigned int irq,
         devid           = get_device_id(&pdev->dev);
         irte_info       = &cfg->irq_2_iommu;
 
+        cfg->remapped         = 1;
         irte_info->sub_handle = devid;
         irte_info->irte_index = index + offset;
-        irte_info->iommu      = (void *)cfg;
 
         return 0;
 }
@@ -4314,9 +4314,9 @@ static int setup_hpet_msi(unsigned int irq, unsigned int id)
         if (index < 0)
                 return index;
 
+        cfg->remapped         = 1;
         irte_info->sub_handle = devid;
         irte_info->irte_index = index;
-        irte_info->iommu      = (void *)cfg;
 
         return 0;
 }
diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c
index 86e2f4a62b9a..174bb654453d 100644
--- a/drivers/iommu/dmar.c
+++ b/drivers/iommu/dmar.c
@@ -41,6 +41,8 @@
 #include <asm/irq_remapping.h>
 #include <asm/iommu_table.h>
 
+#include "irq_remapping.h"
+
 /* No locks are needed as DMA remapping hardware unit
  * list is constructed at boot time and hotplug of
  * these units are not supported by the architecture.
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index eca28014ef3e..43d5c8b8e7ad 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -46,6 +46,8 @@
 #include <asm/cacheflush.h>
 #include <asm/iommu.h>
 
+#include "irq_remapping.h"
+
 #define ROOT_SIZE               VTD_PAGE_SIZE
 #define CONTEXT_SIZE            VTD_PAGE_SIZE
 
diff --git a/drivers/iommu/intel_irq_remapping.c b/drivers/iommu/intel_irq_remapping.c
index af8904de1d44..f3b8f23b5d8f 100644
--- a/drivers/iommu/intel_irq_remapping.c
+++ b/drivers/iommu/intel_irq_remapping.c
@@ -68,6 +68,7 @@ static int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)
 {
         struct ir_table *table = iommu->ir_table;
         struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
+        struct irq_cfg *cfg = irq_get_chip_data(irq);
         u16 index, start_index;
         unsigned int mask = 0;
         unsigned long flags;
@@ -115,6 +116,7 @@ static int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)
         for (i = index; i < index + count; i++)
                 table->base[i].present = 1;
 
+        cfg->remapped = 1;
         irq_iommu->iommu = iommu;
         irq_iommu->irte_index =  index;
         irq_iommu->sub_handle = 0;
@@ -155,6 +157,7 @@ static int map_irq_to_irte_handle(int irq, u16 *sub_handle)
 static int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subhandle)
 {
         struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
+        struct irq_cfg *cfg = irq_get_chip_data(irq);
         unsigned long flags;
 
         if (!irq_iommu)
@@ -162,6 +165,7 @@ static int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subha
 
         raw_spin_lock_irqsave(&irq_2_ir_lock, flags);
 
+        cfg->remapped = 1;
         irq_iommu->iommu = iommu;
         irq_iommu->irte_index = index;
         irq_iommu->sub_handle = subhandle;
@@ -425,11 +429,22 @@ static void iommu_set_irq_remapping(struct intel_iommu *iommu, int mode)
 
         /* Enable interrupt-remapping */
         iommu->gcmd |= DMA_GCMD_IRE;
+        iommu->gcmd &= ~DMA_GCMD_CFI;  /* Block compatibility-format MSIs */
         writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
 
         IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
                       readl, (sts & DMA_GSTS_IRES), sts);
 
+        /*
+         * With CFI clear in the Global Command register, we should be
+         * protected from dangerous (i.e. compatibility) interrupts
+         * regardless of x2apic status.  Check just to be sure.
+         */
+        if (sts & DMA_GSTS_CFIS)
+                WARN(1, KERN_WARNING
+                        "Compatibility-format IRQs enabled despite intr remapping;\n"
+                        "you are vulnerable to IRQ injection.\n");
+
         raw_spin_unlock_irqrestore(&iommu->register_lock, flags);
 }
 
@@ -526,20 +541,24 @@ static int __init intel_irq_remapping_supported(void)
 static int __init intel_enable_irq_remapping(void)
 {
         struct dmar_drhd_unit *drhd;
+        bool x2apic_present;
         int setup = 0;
         int eim = 0;
 
+        x2apic_present = x2apic_supported();
+
         if (parse_ioapics_under_ir() != 1) {
                 printk(KERN_INFO "Not enable interrupt remapping\n");
-                return -1;
+                goto error;
         }
 
-        if (x2apic_supported()) {
+        if (x2apic_present) {
                 eim = !dmar_x2apic_optout();
-                WARN(!eim, KERN_WARNING
-                           "Your BIOS is broken and requested that x2apic be disabled\n"
-                           "This will leave your machine vulnerable to irq-injection attacks\n"
-                           "Use 'intremap=no_x2apic_optout' to override BIOS request\n");
+                if (!eim)
+                        printk(KERN_WARNING
+                                "Your BIOS is broken and requested that x2apic be disabled.\n"
+                                "This will slightly decrease performance.\n"
+                                "Use 'intremap=no_x2apic_optout' to override BIOS request.\n");
         }
 
         for_each_drhd_unit(drhd) {
@@ -578,7 +597,7 @@ static int __init intel_enable_irq_remapping(void)
                 if (eim && !ecap_eim_support(iommu->ecap)) {
                         printk(KERN_INFO "DRHD %Lx: EIM not supported by DRHD, "
                                " ecap %Lx\n", drhd->reg_base_addr, iommu->ecap);
-                        return -1;
+                        goto error;
                 }
         }
 
@@ -594,7 +613,7 @@ static int __init intel_enable_irq_remapping(void)
                         printk(KERN_ERR "DRHD %Lx: failed to enable queued, "
                                " invalidation, ecap %Lx, ret %d\n",
                                drhd->reg_base_addr, iommu->ecap, ret);
-                        return -1;
+                        goto error;
                 }
         }
 
@@ -617,6 +636,14 @@ static int __init intel_enable_irq_remapping(void)
                 goto error;
 
         irq_remapping_enabled = 1;
+
+        /*
+         * VT-d has a different layout for IO-APIC entries when
+         * interrupt remapping is enabled. So it needs a special routine
+         * to print IO-APIC entries for debugging purposes too.
+         */
+        x86_io_apic_ops.print_entries = intel_ir_io_apic_print_entries;
+
         pr_info("Enabled IRQ remapping in %s mode\n", eim ? "x2apic" : "xapic");
 
         return eim ? IRQ_REMAP_X2APIC_MODE : IRQ_REMAP_XAPIC_MODE;
@@ -625,6 +652,11 @@ error:
         /*
          * handle error condition gracefully here!
          */
+
+        if (x2apic_present)
+                WARN(1, KERN_WARNING
+                        "Failed to enable irq remapping.  You are vulnerable to irq-injection attacks.\n");
+
         return -1;
 }
 
diff --git a/drivers/iommu/irq_remapping.c b/drivers/iommu/irq_remapping.c
index faf85d6e33fe..d56f8c17c5fe 100644
--- a/drivers/iommu/irq_remapping.c
+++ b/drivers/iommu/irq_remapping.c
@@ -1,11 +1,18 @@
+#include <linux/seq_file.h>
+#include <linux/cpumask.h>
 #include <linux/kernel.h>
 #include <linux/string.h>
 #include <linux/cpumask.h>
 #include <linux/errno.h>
 #include <linux/msi.h>
+#include <linux/irq.h>
+#include <linux/pci.h>
 
 #include <asm/hw_irq.h>
 #include <asm/irq_remapping.h>
+#include <asm/processor.h>
+#include <asm/x86_init.h>
+#include <asm/apic.h>
 
 #include "irq_remapping.h"
 
@@ -17,6 +24,152 @@ int no_x2apic_optout;
 
 static struct irq_remap_ops *remap_ops;
 
+static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec);
+static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,
+                                  int index, int sub_handle);
+static int set_remapped_irq_affinity(struct irq_data *data,
+                                     const struct cpumask *mask,
+                                     bool force);
+
+static bool irq_remapped(struct irq_cfg *cfg)
+{
+        return (cfg->remapped == 1);
+}
+
+static void irq_remapping_disable_io_apic(void)
+{
+        /*
+         * With interrupt-remapping, for now we will use virtual wire A
+         * mode, as virtual wire B is little complex (need to configure
+         * both IOAPIC RTE as well as interrupt-remapping table entry).
+         * As this gets called during crash dump, keep this simple for
+         * now.
+         */
+        if (cpu_has_apic || apic_from_smp_config())
+                disconnect_bsp_APIC(0);
+}
+
+static int do_setup_msi_irqs(struct pci_dev *dev, int nvec)
+{
+        int node, ret, sub_handle, index = 0;
+        unsigned int irq;
+        struct msi_desc *msidesc;
+
+        nvec = __roundup_pow_of_two(nvec);
+
+        WARN_ON(!list_is_singular(&dev->msi_list));
+        msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
+        WARN_ON(msidesc->irq);
+        WARN_ON(msidesc->msi_attrib.multiple);
+
+        node = dev_to_node(&dev->dev);
+        irq = __create_irqs(get_nr_irqs_gsi(), nvec, node);
+        if (irq == 0)
+                return -ENOSPC;
+
+        msidesc->msi_attrib.multiple = ilog2(nvec);
+        for (sub_handle = 0; sub_handle < nvec; sub_handle++) {
+                if (!sub_handle) {
+                        index = msi_alloc_remapped_irq(dev, irq, nvec);
+                        if (index < 0) {
+                                ret = index;
+                                goto error;
+                        }
+                } else {
+                        ret = msi_setup_remapped_irq(dev, irq + sub_handle,
+                                                     index, sub_handle);
+                        if (ret < 0)
+                                goto error;
+                }
+                ret = setup_msi_irq(dev, msidesc, irq, sub_handle);
+                if (ret < 0)
+                        goto error;
+        }
+        return 0;
+
+error:
+        destroy_irqs(irq, nvec);
+
+        /*
+         * Restore altered MSI descriptor fields and prevent just destroyed
+         * IRQs from tearing down again in default_teardown_msi_irqs()
+         */
+        msidesc->irq = 0;
+        msidesc->msi_attrib.multiple = 0;
+
+        return ret;
+}
+
+static int do_setup_msix_irqs(struct pci_dev *dev, int nvec)
+{
+        int node, ret, sub_handle, index = 0;
+        struct msi_desc *msidesc;
+        unsigned int irq;
+
+        node            = dev_to_node(&dev->dev);
+        irq             = get_nr_irqs_gsi();
+        sub_handle      = 0;
+
+        list_for_each_entry(msidesc, &dev->msi_list, list) {
+
+                irq = create_irq_nr(irq, node);
+                if (irq == 0)
+                        return -1;
+
+                if (sub_handle == 0)
+                        ret = index = msi_alloc_remapped_irq(dev, irq, nvec);
+                else
+                        ret = msi_setup_remapped_irq(dev, irq, index, sub_handle);
+
+                if (ret < 0)
+                        goto error;
+
+                ret = setup_msi_irq(dev, msidesc, irq, 0);
+                if (ret < 0)
+                        goto error;
+
+                sub_handle += 1;
+                irq        += 1;
+        }
+
+        return 0;
+
+error:
+        destroy_irq(irq);
+        return ret;
+}
+
+static int irq_remapping_setup_msi_irqs(struct pci_dev *dev,
+                                        int nvec, int type)
+{
+        if (type == PCI_CAP_ID_MSI)
+                return do_setup_msi_irqs(dev, nvec);
+        else
+                return do_setup_msix_irqs(dev, nvec);
+}
+
+void eoi_ioapic_pin_remapped(int apic, int pin, int vector)
+{
+        /*
+         * Intr-remapping uses pin number as the virtual vector
+         * in the RTE. Actual vector is programmed in
+         * intr-remapping table entry. Hence for the io-apic
+         * EOI we use the pin number.
+         */
+        io_apic_eoi(apic, pin);
+}
+
+static void __init irq_remapping_modify_x86_ops(void)
+{
+        x86_io_apic_ops.disable         = irq_remapping_disable_io_apic;
+        x86_io_apic_ops.set_affinity    = set_remapped_irq_affinity;
+        x86_io_apic_ops.setup_entry     = setup_ioapic_remapped_entry;
+        x86_io_apic_ops.eoi_ioapic_pin  = eoi_ioapic_pin_remapped;
+        x86_msi.setup_msi_irqs          = irq_remapping_setup_msi_irqs;
+        x86_msi.setup_hpet_msi          = setup_hpet_msi_remapped;
+        x86_msi.compose_msi_msg         = compose_remapped_msi_msg;
+}
+
 static __init int setup_nointremap(char *str)
 {
         disable_irq_remap = 1;
@@ -79,15 +232,24 @@ int __init irq_remapping_prepare(void)
 
 int __init irq_remapping_enable(void)
 {
+        int ret;
+
         if (!remap_ops || !remap_ops->enable)
                 return -ENODEV;
 
-        return remap_ops->enable();
+        ret = remap_ops->enable();
+
+        if (irq_remapping_enabled)
+                irq_remapping_modify_x86_ops();
+
+        return ret;
 }
 
 void irq_remapping_disable(void)
 {
-        if (!remap_ops || !remap_ops->disable)
+        if (!irq_remapping_enabled ||
+            !remap_ops ||
+            !remap_ops->disable)
                 return;
 
         remap_ops->disable();
@@ -95,7 +257,9 @@ void irq_remapping_disable(void)
 
 int irq_remapping_reenable(int mode)
 {
-        if (!remap_ops || !remap_ops->reenable)
+        if (!irq_remapping_enabled ||
+            !remap_ops ||
+            !remap_ops->reenable)
                 return 0;
 
         return remap_ops->reenable(mode);
@@ -103,6 +267,9 @@ int irq_remapping_reenable(int mode)
 
 int __init irq_remap_enable_fault_handling(void)
 {
+        if (!irq_remapping_enabled)
+                return 0;
+
         if (!remap_ops || !remap_ops->enable_faulting)
                 return -ENODEV;
 
@@ -133,23 +300,28 @@ int set_remapped_irq_affinity(struct irq_data *data, const struct cpumask *mask,
 
 void free_remapped_irq(int irq)
 {
+        struct irq_cfg *cfg = irq_get_chip_data(irq);
+
         if (!remap_ops || !remap_ops->free_irq)
                 return;
 
-        remap_ops->free_irq(irq);
+        if (irq_remapped(cfg))
+                remap_ops->free_irq(irq);
 }
 
 void compose_remapped_msi_msg(struct pci_dev *pdev,
                               unsigned int irq, unsigned int dest,
                               struct msi_msg *msg, u8 hpet_id)
 {
-        if (!remap_ops || !remap_ops->compose_msi_msg)
-                return;
+        struct irq_cfg *cfg = irq_get_chip_data(irq);
 
-        remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id);
+        if (!irq_remapped(cfg))
+                native_compose_msi_msg(pdev, irq, dest, msg, hpet_id);
+        else if (remap_ops && remap_ops->compose_msi_msg)
+                remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id);
 }
 
-int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec)
+static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec)
 {
         if (!remap_ops || !remap_ops->msi_alloc_irq)
                 return -ENODEV;
@@ -157,8 +329,8 @@ int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec)
         return remap_ops->msi_alloc_irq(pdev, irq, nvec);
 }
 
-int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,
-                           int index, int sub_handle)
+static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,
+                                  int index, int sub_handle)
 {
         if (!remap_ops || !remap_ops->msi_setup_irq)
                 return -ENODEV;
@@ -173,3 +345,42 @@ int setup_hpet_msi_remapped(unsigned int irq, unsigned int id)
 
         return remap_ops->setup_hpet_msi(irq, id);
 }
+
+void panic_if_irq_remap(const char *msg)
+{
+        if (irq_remapping_enabled)
+                panic(msg);
+}
+
+static void ir_ack_apic_edge(struct irq_data *data)
+{
+        ack_APIC_irq();
+}
+
+static void ir_ack_apic_level(struct irq_data *data)
+{
+        ack_APIC_irq();
+        eoi_ioapic_irq(data->irq, data->chip_data);
+}
+
+static void ir_print_prefix(struct irq_data *data, struct seq_file *p)
+{
+        seq_printf(p, " IR-%s", data->chip->name);
+}
+
+void irq_remap_modify_chip_defaults(struct irq_chip *chip)
+{
+        chip->irq_print_chip = ir_print_prefix;
+        chip->irq_ack = ir_ack_apic_edge;
+        chip->irq_eoi = ir_ack_apic_level;
+        chip->irq_set_affinity = x86_io_apic_ops.set_affinity;
+}
+
+bool setup_remapped_irq(int irq, struct irq_cfg *cfg, struct irq_chip *chip)
+{
+        if (!irq_remapped(cfg))
+                return false;
+        irq_set_status_flags(irq, IRQ_MOVE_PCNTXT);
+        irq_remap_modify_chip_defaults(chip);
+        return true;
+}
diff --git a/drivers/iommu/irq_remapping.h b/drivers/iommu/irq_remapping.h
index 95363acb583f..ecb637670405 100644
--- a/drivers/iommu/irq_remapping.h
+++ b/drivers/iommu/irq_remapping.h
@@ -34,6 +34,7 @@ struct msi_msg;
 extern int disable_irq_remap;
 extern int disable_sourceid_checking;
 extern int no_x2apic_optout;
+extern int irq_remapping_enabled;
 
 struct irq_remap_ops {
         /* Check whether Interrupt Remapping is supported */
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 5099636a6e5f..00cc78c7aa04 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -845,6 +845,32 @@ int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec)
 }
 EXPORT_SYMBOL(pci_enable_msi_block);
 
+int pci_enable_msi_block_auto(struct pci_dev *dev, unsigned int *maxvec)
+{
+        int ret, pos, nvec;
+        u16 msgctl;
+
+        pos = pci_find_capability(dev, PCI_CAP_ID_MSI);
+        if (!pos)
+                return -EINVAL;
+
+        pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl);
+        ret = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1);
+
+        if (maxvec)
+                *maxvec = ret;
+
+        do {
+                nvec = ret;
+                ret = pci_enable_msi_block(dev, nvec);
+        } while (ret > 0);
+
+        if (ret < 0)
+                return ret;
+        return nvec;
+}
+EXPORT_SYMBOL(pci_enable_msi_block_auto);
+
 void pci_msi_shutdown(struct pci_dev *dev)
 {
         struct msi_desc *desc;