diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9002_mac.c | 32 |
1 files changed, 11 insertions, 21 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_mac.c b/drivers/net/wireless/ath/ath9k/ar9002_mac.c index 50dda394f8be..f5ed73dac254 100644 --- a/drivers/net/wireless/ath/ath9k/ar9002_mac.c +++ b/drivers/net/wireless/ath/ath9k/ar9002_mac.c | |||
@@ -90,13 +90,10 @@ static bool ar9002_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked) | |||
90 | 90 | ||
91 | *masked = isr & ATH9K_INT_COMMON; | 91 | *masked = isr & ATH9K_INT_COMMON; |
92 | 92 | ||
93 | if (ah->config.rx_intr_mitigation) { | 93 | if (isr & (AR_ISR_RXMINTR | AR_ISR_RXINTM | |
94 | if (isr & (AR_ISR_RXMINTR | AR_ISR_RXINTM)) | 94 | AR_ISR_RXOK | AR_ISR_RXERR)) |
95 | *masked |= ATH9K_INT_RX; | ||
96 | } | ||
97 | |||
98 | if (isr & (AR_ISR_RXOK | AR_ISR_RXERR)) | ||
99 | *masked |= ATH9K_INT_RX; | 95 | *masked |= ATH9K_INT_RX; |
96 | |||
100 | if (isr & | 97 | if (isr & |
101 | (AR_ISR_TXOK | AR_ISR_TXDESC | AR_ISR_TXERR | | 98 | (AR_ISR_TXOK | AR_ISR_TXDESC | AR_ISR_TXERR | |
102 | AR_ISR_TXEOL)) { | 99 | AR_ISR_TXEOL)) { |
@@ -118,14 +115,6 @@ static bool ar9002_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked) | |||
118 | "receive FIFO overrun interrupt\n"); | 115 | "receive FIFO overrun interrupt\n"); |
119 | } | 116 | } |
120 | 117 | ||
121 | if (!AR_SREV_9100(ah)) { | ||
122 | if (!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { | ||
123 | u32 isr5 = REG_READ(ah, AR_ISR_S5_S); | ||
124 | if (isr5 & AR_ISR_S5_TIM_TIMER) | ||
125 | *masked |= ATH9K_INT_TIM_TIMER; | ||
126 | } | ||
127 | } | ||
128 | |||
129 | *masked |= mask2; | 118 | *masked |= mask2; |
130 | } | 119 | } |
131 | 120 | ||
@@ -136,17 +125,18 @@ static bool ar9002_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked) | |||
136 | u32 s5_s; | 125 | u32 s5_s; |
137 | 126 | ||
138 | s5_s = REG_READ(ah, AR_ISR_S5_S); | 127 | s5_s = REG_READ(ah, AR_ISR_S5_S); |
139 | if (isr & AR_ISR_GENTMR) { | 128 | ah->intr_gen_timer_trigger = |
140 | ah->intr_gen_timer_trigger = | ||
141 | MS(s5_s, AR_ISR_S5_GENTIMER_TRIG); | 129 | MS(s5_s, AR_ISR_S5_GENTIMER_TRIG); |
142 | 130 | ||
143 | ah->intr_gen_timer_thresh = | 131 | ah->intr_gen_timer_thresh = |
144 | MS(s5_s, AR_ISR_S5_GENTIMER_THRESH); | 132 | MS(s5_s, AR_ISR_S5_GENTIMER_THRESH); |
145 | 133 | ||
146 | if (ah->intr_gen_timer_trigger) | 134 | if (ah->intr_gen_timer_trigger) |
147 | *masked |= ATH9K_INT_GENTIMER; | 135 | *masked |= ATH9K_INT_GENTIMER; |
148 | 136 | ||
149 | } | 137 | if ((s5_s & AR_ISR_S5_TIM_TIMER) && |
138 | !(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) | ||
139 | *masked |= ATH9K_INT_TIM_TIMER; | ||
150 | } | 140 | } |
151 | 141 | ||
152 | if (sync_cause) { | 142 | if (sync_cause) { |