diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index e6d4c4c8a3df..0db3475487cb 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
@@ -2594,6 +2594,37 @@ enum ath9k_int ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints) | |||
2594 | } | 2594 | } |
2595 | EXPORT_SYMBOL(ath9k_hw_set_interrupts); | 2595 | EXPORT_SYMBOL(ath9k_hw_set_interrupts); |
2596 | 2596 | ||
2597 | /* | ||
2598 | * Helper for ASPM support. | ||
2599 | * | ||
2600 | * Disable PLL when in L0s as well as receiver clock when in L1. | ||
2601 | * This power saving option must be enabled through the SerDes. | ||
2602 | * | ||
2603 | * Programming the SerDes must go through the same 288 bit serial shift | ||
2604 | * register as the other analog registers. Hence the 9 writes. | ||
2605 | */ | ||
2606 | static void ar9003_hw_configpcipowersave(struct ath_hw *ah, | ||
2607 | int restore, | ||
2608 | int power_off) | ||
2609 | { | ||
2610 | if (ah->is_pciexpress != true) | ||
2611 | return; | ||
2612 | |||
2613 | /* Do not touch SerDes registers */ | ||
2614 | if (ah->config.pcie_powersave_enable == 2) | ||
2615 | return; | ||
2616 | |||
2617 | /* Nothing to do on restore for 11N */ | ||
2618 | if (!restore) { | ||
2619 | /* set bit 19 to allow forcing of pcie core into L1 state */ | ||
2620 | REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA); | ||
2621 | |||
2622 | /* Several PCIe massages to ensure proper behaviour */ | ||
2623 | if (ah->config.pcie_waen) | ||
2624 | REG_WRITE(ah, AR_WA, ah->config.pcie_waen); | ||
2625 | } | ||
2626 | } | ||
2627 | |||
2597 | /*******************/ | 2628 | /*******************/ |
2598 | /* Beacon Handling */ | 2629 | /* Beacon Handling */ |
2599 | /*******************/ | 2630 | /*******************/ |
@@ -3628,10 +3659,13 @@ static void ar9002_hw_attach_ops(struct ath_hw *ah) | |||
3628 | static void ar9003_hw_attach_ops(struct ath_hw *ah) | 3659 | static void ar9003_hw_attach_ops(struct ath_hw *ah) |
3629 | { | 3660 | { |
3630 | struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); | 3661 | struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); |
3662 | struct ath_hw_ops *ops = ath9k_hw_ops(ah); | ||
3631 | 3663 | ||
3632 | priv_ops->init_mode_regs = ar9003_hw_init_mode_regs; | 3664 | priv_ops->init_mode_regs = ar9003_hw_init_mode_regs; |
3633 | priv_ops->macversion_supported = ar9003_hw_macversion_supported; | 3665 | priv_ops->macversion_supported = ar9003_hw_macversion_supported; |
3634 | 3666 | ||
3667 | ops->config_pci_powersave = ar9003_hw_configpcipowersave; | ||
3668 | |||
3635 | ar9003_hw_attach_phy_ops(ah); | 3669 | ar9003_hw_attach_phy_ops(ah); |
3636 | ar9003_hw_attach_calib_ops(ah); | 3670 | ar9003_hw_attach_calib_ops(ah); |
3637 | ar9003_hw_attach_mac_ops(ah); | 3671 | ar9003_hw_attach_mac_ops(ah); |