3 files changed, 14 insertions, 3 deletions

diff --git a/drivers/watchdog/ar7_wdt.c b/drivers/watchdog/ar7_wdt.c
index 3fe9742c23ca..2f8643efe92c 100644
--- a/drivers/watchdog/ar7_wdt.c
+++ b/drivers/watchdog/ar7_wdt.c
@@ -37,7 +37,7 @@
 #include <linux/uaccess.h>
 
 #include <asm/addrspace.h>
-#include <asm/ar7/ar7.h>
+#include <asm/mach-ar7/ar7.h>
 
 #define DRVNAME "ar7_wdt"
 #define LONGNAME "TI AR7 Watchdog Timer"
diff --git a/drivers/watchdog/coh901327_wdt.c b/drivers/watchdog/coh901327_wdt.c
index fecb307d28e9..aec7cefdef21 100644
--- a/drivers/watchdog/coh901327_wdt.c
+++ b/drivers/watchdog/coh901327_wdt.c
@@ -18,6 +18,7 @@
 #include <linux/bitops.h>
 #include <linux/uaccess.h>
 #include <linux/clk.h>
+#include <linux/delay.h>
 
 #define DRV_NAME "WDOG COH 901 327"
 
@@ -92,6 +93,8 @@ static struct clk *clk;
 static void coh901327_enable(u16 timeout)
 {
         u16 val;
+        unsigned long freq;
+        unsigned long delay_ns;
 
         clk_enable(clk);
         /* Restart timer if it is disabled */
@@ -102,6 +105,14 @@ static void coh901327_enable(u16 timeout)
         /* Acknowledge any pending interrupt so it doesn't just fire off */
         writew(U300_WDOG_IER_WILL_BARK_IRQ_ACK_ENABLE,
                virtbase + U300_WDOG_IER);
+        /*
+         * The interrupt is cleared in the 32 kHz clock domain.
+         * Wait 3 32 kHz cycles for it to take effect
+         */
+        freq = clk_get_rate(clk);
+        delay_ns = (1000000000 + freq - 1) / freq; /* Freq to ns and round up */
+        delay_ns = 3 * delay_ns; /* Wait 3 cycles */
+        ndelay(delay_ns);
         /* Enable the watchdog interrupt */
         writew(U300_WDOG_IMR_WILL_BARK_IRQ_ENABLE, virtbase + U300_WDOG_IMR);
         /* Activate the watchdog timer */
diff --git a/drivers/watchdog/ks8695_wdt.c b/drivers/watchdog/ks8695_wdt.c
index 00b03eb43bf0..e1c82769b08e 100644
--- a/drivers/watchdog/ks8695_wdt.c
+++ b/drivers/watchdog/ks8695_wdt.c
@@ -66,7 +66,7 @@ static inline void ks8695_wdt_stop(void)
 static inline void ks8695_wdt_start(void)
 {
         unsigned long tmcon;
-        unsigned long tval = wdt_time * CLOCK_TICK_RATE;
+        unsigned long tval = wdt_time * KS8695_CLOCK_RATE;
 
         spin_lock(&ks8695_lock);
         /* disable timer0 */
@@ -103,7 +103,7 @@ static inline void ks8695_wdt_reload(void)
 static int ks8695_wdt_settimeout(int new_time)
 {
         /*
-         * All counting occurs at SLOW_CLOCK / 128 = 0.256 Hz
+         * All counting occurs at KS8695_CLOCK_RATE / 128 = 0.256 Hz
          *
          * Since WDV is a 16-bit counter, the maximum period is
          * 65536 / 0.256 = 256 seconds.