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1/*
2 * Copyright 1998-2008 VIA Technologies, Inc. All Rights Reserved.
3 * Copyright 2001-2008 S3 Graphics, Inc. All Rights Reserved.
4
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public
7 * License as published by the Free Software Foundation;
8 * either version 2, or (at your option) any later version.
9
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
12 * the implied warranty of MERCHANTABILITY or FITNESS FOR
13 * A PARTICULAR PURPOSE.See the GNU General Public License
14 * for more details.
15
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22#ifndef __ACCEL_H__
23#define __ACCEL_H__
24
25#define FB_ACCEL_VIA_UNICHROME 50
26
27/* MMIO Base Address Definition */
28#define MMIO_VGABASE 0x8000
29#define MMIO_CR_READ (MMIO_VGABASE + 0x3D4)
30#define MMIO_CR_WRITE (MMIO_VGABASE + 0x3D5)
31#define MMIO_SR_READ (MMIO_VGABASE + 0x3C4)
32#define MMIO_SR_WRITE (MMIO_VGABASE + 0x3C5)
33
34/* HW Cursor Status Define */
35#define HW_Cursor_ON 0
36#define HW_Cursor_OFF 1
37
38#define CURSOR_SIZE (8 * 1024)
39#define VQ_SIZE (256 * 1024)
40
41#define VIA_MMIO_BLTBASE 0x200000
42#define VIA_MMIO_BLTSIZE 0x200000
43
44/* Defines for 2D registers */
45#define VIA_REG_GECMD 0x000
46#define VIA_REG_GEMODE 0x004
47#define VIA_REG_SRCPOS 0x008
48#define VIA_REG_DSTPOS 0x00C
49/* width and height */
50#define VIA_REG_DIMENSION 0x010
51#define VIA_REG_PATADDR 0x014
52#define VIA_REG_FGCOLOR 0x018
53#define VIA_REG_BGCOLOR 0x01C
54/* top and left of clipping */
55#define VIA_REG_CLIPTL 0x020
56/* bottom and right of clipping */
57#define VIA_REG_CLIPBR 0x024
58#define VIA_REG_OFFSET 0x028
59/* color key control */
60#define VIA_REG_KEYCONTROL 0x02C
61#define VIA_REG_SRCBASE 0x030
62#define VIA_REG_DSTBASE 0x034
63/* pitch of src and dst */
64#define VIA_REG_PITCH 0x038
65#define VIA_REG_MONOPAT0 0x03C
66#define VIA_REG_MONOPAT1 0x040
67/* from 0x100 to 0x1ff */
68#define VIA_REG_COLORPAT 0x100
69
70/* defines for VIA 2D registers for vt3353/3409 (M1 engine)*/
71#define VIA_REG_GECMD_M1 0x000
72#define VIA_REG_GEMODE_M1 0x004
73#define VIA_REG_GESTATUS_M1 0x004 /* as same as VIA_REG_GEMODE */
74#define VIA_REG_PITCH_M1 0x008 /* pitch of src and dst */
75#define VIA_REG_DIMENSION_M1 0x00C /* width and height */
76#define VIA_REG_DSTPOS_M1 0x010
77#define VIA_REG_LINE_XY_M1 0x010
78#define VIA_REG_DSTBASE_M1 0x014
79#define VIA_REG_SRCPOS_M1 0x018
80#define VIA_REG_LINE_K1K2_M1 0x018
81#define VIA_REG_SRCBASE_M1 0x01C
82#define VIA_REG_PATADDR_M1 0x020
83#define VIA_REG_MONOPAT0_M1 0x024
84#define VIA_REG_MONOPAT1_M1 0x028
85#define VIA_REG_OFFSET_M1 0x02C
86#define VIA_REG_LINE_ERROR_M1 0x02C
87#define VIA_REG_CLIPTL_M1 0x040 /* top and left of clipping */
88#define VIA_REG_CLIPBR_M1 0x044 /* bottom and right of clipping */
89#define VIA_REG_KEYCONTROL_M1 0x048 /* color key control */
90#define VIA_REG_FGCOLOR_M1 0x04C
91#define VIA_REG_DSTCOLORKEY_M1 0x04C /* as same as VIA_REG_FG */
92#define VIA_REG_BGCOLOR_M1 0x050
93#define VIA_REG_SRCCOLORKEY_M1 0x050 /* as same as VIA_REG_BG */
94#define VIA_REG_MONOPATFGC_M1 0x058 /* Add BG color of Pattern. */
95#define VIA_REG_MONOPATBGC_M1 0x05C /* Add FG color of Pattern. */
96#define VIA_REG_COLORPAT_M1 0x100 /* from 0x100 to 0x1ff */
97
98/* VIA_REG_PITCH(0x38): Pitch Setting */
99#define VIA_PITCH_ENABLE 0x80000000
100
101/* defines for VIA HW cursor registers */
102#define VIA_REG_CURSOR_MODE 0x2D0
103#define VIA_REG_CURSOR_POS 0x2D4
104#define VIA_REG_CURSOR_ORG 0x2D8
105#define VIA_REG_CURSOR_BG 0x2DC
106#define VIA_REG_CURSOR_FG 0x2E0
107
108/* VIA_REG_GEMODE(0x04): GE mode */
109#define VIA_GEM_8bpp 0x00000000
110#define VIA_GEM_16bpp 0x00000100
111#define VIA_GEM_32bpp 0x00000300
112
113/* VIA_REG_GECMD(0x00): 2D Engine Command */
114#define VIA_GEC_NOOP 0x00000000
115#define VIA_GEC_BLT 0x00000001
116#define VIA_GEC_LINE 0x00000005
117
118/* Rotate Command */
119#define VIA_GEC_ROT 0x00000008
120
121#define VIA_GEC_SRC_XY 0x00000000
122#define VIA_GEC_SRC_LINEAR 0x00000010
123#define VIA_GEC_DST_XY 0x00000000
124#define VIA_GEC_DST_LINRAT 0x00000020
125
126#define VIA_GEC_SRC_FB 0x00000000
127#define VIA_GEC_SRC_SYS 0x00000040
128#define VIA_GEC_DST_FB 0x00000000
129#define VIA_GEC_DST_SYS 0x00000080
130
131/* source is mono */
132#define VIA_GEC_SRC_MONO 0x00000100
133/* pattern is mono */
134#define VIA_GEC_PAT_MONO 0x00000200
135/* mono src is opaque */
136#define VIA_GEC_MSRC_OPAQUE 0x00000000
137/* mono src is transparent */
138#define VIA_GEC_MSRC_TRANS 0x00000400
139/* pattern is in frame buffer */
140#define VIA_GEC_PAT_FB 0x00000000
141/* pattern is from reg setting */
142#define VIA_GEC_PAT_REG 0x00000800
143
144#define VIA_GEC_CLIP_DISABLE 0x00000000
145#define VIA_GEC_CLIP_ENABLE 0x00001000
146
147#define VIA_GEC_FIXCOLOR_PAT 0x00002000
148
149#define VIA_GEC_INCX 0x00000000
150#define VIA_GEC_DECY 0x00004000
151#define VIA_GEC_INCY 0x00000000
152#define VIA_GEC_DECX 0x00008000
153/* mono pattern is opaque */
154#define VIA_GEC_MPAT_OPAQUE 0x00000000
155/* mono pattern is transparent */
156#define VIA_GEC_MPAT_TRANS 0x00010000
157
158#define VIA_GEC_MONO_UNPACK 0x00000000
159#define VIA_GEC_MONO_PACK 0x00020000
160#define VIA_GEC_MONO_DWORD 0x00000000
161#define VIA_GEC_MONO_WORD 0x00040000
162#define VIA_GEC_MONO_BYTE 0x00080000
163
164#define VIA_GEC_LASTPIXEL_ON 0x00000000
165#define VIA_GEC_LASTPIXEL_OFF 0x00100000
166#define VIA_GEC_X_MAJOR 0x00000000
167#define VIA_GEC_Y_MAJOR 0x00200000
168#define VIA_GEC_QUICK_START 0x00800000
169
170/* defines for VIA 3D registers */
171#define VIA_REG_STATUS 0x400
172#define VIA_REG_CR_TRANSET 0x41C
173#define VIA_REG_CR_TRANSPACE 0x420
174#define VIA_REG_TRANSET 0x43C
175#define VIA_REG_TRANSPACE 0x440
176
177/* VIA_REG_STATUS(0x400): Engine Status */
178
179/* Command Regulator is busy */
180#define VIA_CMD_RGTR_BUSY 0x00000080
181/* 2D Engine is busy */
182#define VIA_2D_ENG_BUSY 0x00000002
183/* 3D Engine is busy */
184#define VIA_3D_ENG_BUSY 0x00000001
185/* Virtual Queue is busy */
186#define VIA_VR_QUEUE_BUSY 0x00020000
187
188/* VIA_REG_STATUS(0x400): Engine Status for H5 */
189#define VIA_CMD_RGTR_BUSY_H5 0x00000010 /* Command Regulator is busy */
190#define VIA_2D_ENG_BUSY_H5 0x00000002 /* 2D Engine is busy */
191#define VIA_3D_ENG_BUSY_H5 0x00001FE1 /* 3D Engine is busy */
192#define VIA_VR_QUEUE_BUSY_H5 0x00000004 /* Virtual Queue is busy */
193
194/* VIA_REG_STATUS(0x400): Engine Status for VT3353/3409 */
195#define VIA_CMD_RGTR_BUSY_M1 0x00000010 /* Command Regulator is busy */
196#define VIA_2D_ENG_BUSY_M1 0x00000002 /* 2D Engine is busy */
197#define VIA_3D_ENG_BUSY_M1 0x00001FE1 /* 3D Engine is busy */
198#define VIA_VR_QUEUE_BUSY_M1 0x00000004 /* Virtual Queue is busy */
199
200#define MAXLOOP 0xFFFFFF
201
202#define VIA_BITBLT_COLOR 1
203#define VIA_BITBLT_MONO 2
204#define VIA_BITBLT_FILL 3
205
206int viafb_setup_engine(struct fb_info *info);
207void viafb_reset_engine(struct viafb_par *viapar);
208void viafb_show_hw_cursor(struct fb_info *info, int Status);
209void viafb_wait_engine_idle(struct fb_info *info);
210
211#endif /* __ACCEL_H__ */
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-08 19:55:44 -0500