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path: root/drivers/video/fbdev/omap2/dss/hdmi4.c
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Diffstat (limited to 'drivers/video/fbdev/omap2/dss/hdmi4.c')
-rw-r--r--drivers/video/fbdev/omap2/dss/hdmi4.c703
1 files changed, 703 insertions, 0 deletions
diff --git a/drivers/video/fbdev/omap2/dss/hdmi4.c b/drivers/video/fbdev/omap2/dss/hdmi4.c
new file mode 100644
index 000000000000..f5f7944a1fd1
--- /dev/null
+++ b/drivers/video/fbdev/omap2/dss/hdmi4.c
@@ -0,0 +1,703 @@
1/*
2 * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
3 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
4 * Authors: Yong Zhi
5 * Mythri pk <mythripk@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#define DSS_SUBSYS_NAME "HDMI"
21
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/err.h>
25#include <linux/io.h>
26#include <linux/interrupt.h>
27#include <linux/mutex.h>
28#include <linux/delay.h>
29#include <linux/string.h>
30#include <linux/platform_device.h>
31#include <linux/pm_runtime.h>
32#include <linux/clk.h>
33#include <linux/gpio.h>
34#include <linux/regulator/consumer.h>
35#include <video/omapdss.h>
36
37#include "hdmi4_core.h"
38#include "dss.h"
39#include "dss_features.h"
40
41static struct {
42 struct mutex lock;
43 struct platform_device *pdev;
44
45 struct hdmi_wp_data wp;
46 struct hdmi_pll_data pll;
47 struct hdmi_phy_data phy;
48 struct hdmi_core_data core;
49
50 struct hdmi_config cfg;
51
52 struct clk *sys_clk;
53 struct regulator *vdda_hdmi_dac_reg;
54
55 bool core_enabled;
56
57 struct omap_dss_device output;
58} hdmi;
59
60static int hdmi_runtime_get(void)
61{
62 int r;
63
64 DSSDBG("hdmi_runtime_get\n");
65
66 r = pm_runtime_get_sync(&hdmi.pdev->dev);
67 WARN_ON(r < 0);
68 if (r < 0)
69 return r;
70
71 return 0;
72}
73
74static void hdmi_runtime_put(void)
75{
76 int r;
77
78 DSSDBG("hdmi_runtime_put\n");
79
80 r = pm_runtime_put_sync(&hdmi.pdev->dev);
81 WARN_ON(r < 0 && r != -ENOSYS);
82}
83
84static int hdmi_init_regulator(void)
85{
86 struct regulator *reg;
87
88 if (hdmi.vdda_hdmi_dac_reg != NULL)
89 return 0;
90
91 reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
92
93 if (IS_ERR(reg)) {
94 if (PTR_ERR(reg) != -EPROBE_DEFER)
95 DSSERR("can't get VDDA regulator\n");
96 return PTR_ERR(reg);
97 }
98
99 hdmi.vdda_hdmi_dac_reg = reg;
100
101 return 0;
102}
103
104static int hdmi_power_on_core(struct omap_dss_device *dssdev)
105{
106 int r;
107
108 r = regulator_enable(hdmi.vdda_hdmi_dac_reg);
109 if (r)
110 return r;
111
112 r = hdmi_runtime_get();
113 if (r)
114 goto err_runtime_get;
115
116 /* Make selection of HDMI in DSS */
117 dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
118
119 hdmi.core_enabled = true;
120
121 return 0;
122
123err_runtime_get:
124 regulator_disable(hdmi.vdda_hdmi_dac_reg);
125
126 return r;
127}
128
129static void hdmi_power_off_core(struct omap_dss_device *dssdev)
130{
131 hdmi.core_enabled = false;
132
133 hdmi_runtime_put();
134 regulator_disable(hdmi.vdda_hdmi_dac_reg);
135}
136
137static int hdmi_power_on_full(struct omap_dss_device *dssdev)
138{
139 int r;
140 struct omap_video_timings *p;
141 struct omap_overlay_manager *mgr = hdmi.output.manager;
142 unsigned long phy;
143
144 r = hdmi_power_on_core(dssdev);
145 if (r)
146 return r;
147
148 p = &hdmi.cfg.timings;
149
150 DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
151
152 /* the functions below use kHz pixel clock. TODO: change to Hz */
153 phy = p->pixelclock / 1000;
154
155 hdmi_pll_compute(&hdmi.pll, clk_get_rate(hdmi.sys_clk), phy);
156
157 /* config the PLL and PHY hdmi_set_pll_pwrfirst */
158 r = hdmi_pll_enable(&hdmi.pll, &hdmi.wp);
159 if (r) {
160 DSSDBG("Failed to lock PLL\n");
161 goto err_pll_enable;
162 }
163
164 r = hdmi_phy_enable(&hdmi.phy, &hdmi.wp, &hdmi.cfg);
165 if (r) {
166 DSSDBG("Failed to start PHY\n");
167 goto err_phy_enable;
168 }
169
170 hdmi4_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
171
172 /* bypass TV gamma table */
173 dispc_enable_gamma_table(0);
174
175 /* tv size */
176 dss_mgr_set_timings(mgr, p);
177
178 r = hdmi_wp_video_start(&hdmi.wp);
179 if (r)
180 goto err_vid_enable;
181
182 r = dss_mgr_enable(mgr);
183 if (r)
184 goto err_mgr_enable;
185
186 return 0;
187
188err_mgr_enable:
189 hdmi_wp_video_stop(&hdmi.wp);
190err_vid_enable:
191 hdmi_phy_disable(&hdmi.phy, &hdmi.wp);
192err_phy_enable:
193 hdmi_pll_disable(&hdmi.pll, &hdmi.wp);
194err_pll_enable:
195 hdmi_power_off_core(dssdev);
196 return -EIO;
197}
198
199static void hdmi_power_off_full(struct omap_dss_device *dssdev)
200{
201 struct omap_overlay_manager *mgr = hdmi.output.manager;
202
203 dss_mgr_disable(mgr);
204
205 hdmi_wp_video_stop(&hdmi.wp);
206 hdmi_phy_disable(&hdmi.phy, &hdmi.wp);
207 hdmi_pll_disable(&hdmi.pll, &hdmi.wp);
208
209 hdmi_power_off_core(dssdev);
210}
211
212static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
213 struct omap_video_timings *timings)
214{
215 struct omap_dss_device *out = &hdmi.output;
216
217 if (!dispc_mgr_timings_ok(out->dispc_channel, timings))
218 return -EINVAL;
219
220 return 0;
221}
222
223static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
224 struct omap_video_timings *timings)
225{
226 struct hdmi_cm cm;
227 const struct hdmi_config *t;
228
229 mutex_lock(&hdmi.lock);
230
231 cm = hdmi_get_code(timings);
232 hdmi.cfg.cm = cm;
233
234 t = hdmi_get_timings(cm.mode, cm.code);
235 if (t != NULL) {
236 hdmi.cfg = *t;
237
238 dispc_set_tv_pclk(t->timings.pixelclock);
239 } else {
240 hdmi.cfg.timings = *timings;
241 hdmi.cfg.cm.code = 0;
242 hdmi.cfg.cm.mode = HDMI_DVI;
243
244 dispc_set_tv_pclk(timings->pixelclock);
245 }
246
247 DSSDBG("using mode: %s, code %d\n", hdmi.cfg.cm.mode == HDMI_DVI ?
248 "DVI" : "HDMI", hdmi.cfg.cm.code);
249
250 mutex_unlock(&hdmi.lock);
251}
252
253static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
254 struct omap_video_timings *timings)
255{
256 const struct hdmi_config *cfg;
257 struct hdmi_cm cm = hdmi.cfg.cm;
258
259 cfg = hdmi_get_timings(cm.mode, cm.code);
260 if (cfg == NULL)
261 cfg = hdmi_default_timing();
262
263 memcpy(timings, &cfg->timings, sizeof(cfg->timings));
264}
265
266static void hdmi_dump_regs(struct seq_file *s)
267{
268 mutex_lock(&hdmi.lock);
269
270 if (hdmi_runtime_get()) {
271 mutex_unlock(&hdmi.lock);
272 return;
273 }
274
275 hdmi_wp_dump(&hdmi.wp, s);
276 hdmi_pll_dump(&hdmi.pll, s);
277 hdmi_phy_dump(&hdmi.phy, s);
278 hdmi4_core_dump(&hdmi.core, s);
279
280 hdmi_runtime_put();
281 mutex_unlock(&hdmi.lock);
282}
283
284static int read_edid(u8 *buf, int len)
285{
286 int r;
287
288 mutex_lock(&hdmi.lock);
289
290 r = hdmi_runtime_get();
291 BUG_ON(r);
292
293 r = hdmi4_read_edid(&hdmi.core, buf, len);
294
295 hdmi_runtime_put();
296 mutex_unlock(&hdmi.lock);
297
298 return r;
299}
300
301static int hdmi_display_enable(struct omap_dss_device *dssdev)
302{
303 struct omap_dss_device *out = &hdmi.output;
304 int r = 0;
305
306 DSSDBG("ENTER hdmi_display_enable\n");
307
308 mutex_lock(&hdmi.lock);
309
310 if (out == NULL || out->manager == NULL) {
311 DSSERR("failed to enable display: no output/manager\n");
312 r = -ENODEV;
313 goto err0;
314 }
315
316 r = hdmi_power_on_full(dssdev);
317 if (r) {
318 DSSERR("failed to power on device\n");
319 goto err0;
320 }
321
322 mutex_unlock(&hdmi.lock);
323 return 0;
324
325err0:
326 mutex_unlock(&hdmi.lock);
327 return r;
328}
329
330static void hdmi_display_disable(struct omap_dss_device *dssdev)
331{
332 DSSDBG("Enter hdmi_display_disable\n");
333
334 mutex_lock(&hdmi.lock);
335
336 hdmi_power_off_full(dssdev);
337
338 mutex_unlock(&hdmi.lock);
339}
340
341static int hdmi_core_enable(struct omap_dss_device *dssdev)
342{
343 int r = 0;
344
345 DSSDBG("ENTER omapdss_hdmi_core_enable\n");
346
347 mutex_lock(&hdmi.lock);
348
349 r = hdmi_power_on_core(dssdev);
350 if (r) {
351 DSSERR("failed to power on device\n");
352 goto err0;
353 }
354
355 mutex_unlock(&hdmi.lock);
356 return 0;
357
358err0:
359 mutex_unlock(&hdmi.lock);
360 return r;
361}
362
363static void hdmi_core_disable(struct omap_dss_device *dssdev)
364{
365 DSSDBG("Enter omapdss_hdmi_core_disable\n");
366
367 mutex_lock(&hdmi.lock);
368
369 hdmi_power_off_core(dssdev);
370
371 mutex_unlock(&hdmi.lock);
372}
373
374static int hdmi_get_clocks(struct platform_device *pdev)
375{
376 struct clk *clk;
377
378 clk = devm_clk_get(&pdev->dev, "sys_clk");
379 if (IS_ERR(clk)) {
380 DSSERR("can't get sys_clk\n");
381 return PTR_ERR(clk);
382 }
383
384 hdmi.sys_clk = clk;
385
386 return 0;
387}
388
389static int hdmi_connect(struct omap_dss_device *dssdev,
390 struct omap_dss_device *dst)
391{
392 struct omap_overlay_manager *mgr;
393 int r;
394
395 r = hdmi_init_regulator();
396 if (r)
397 return r;
398
399 mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
400 if (!mgr)
401 return -ENODEV;
402
403 r = dss_mgr_connect(mgr, dssdev);
404 if (r)
405 return r;
406
407 r = omapdss_output_set_device(dssdev, dst);
408 if (r) {
409 DSSERR("failed to connect output to new device: %s\n",
410 dst->name);
411 dss_mgr_disconnect(mgr, dssdev);
412 return r;
413 }
414
415 return 0;
416}
417
418static void hdmi_disconnect(struct omap_dss_device *dssdev,
419 struct omap_dss_device *dst)
420{
421 WARN_ON(dst != dssdev->dst);
422
423 if (dst != dssdev->dst)
424 return;
425
426 omapdss_output_unset_device(dssdev);
427
428 if (dssdev->manager)
429 dss_mgr_disconnect(dssdev->manager, dssdev);
430}
431
432static int hdmi_read_edid(struct omap_dss_device *dssdev,
433 u8 *edid, int len)
434{
435 bool need_enable;
436 int r;
437
438 need_enable = hdmi.core_enabled == false;
439
440 if (need_enable) {
441 r = hdmi_core_enable(dssdev);
442 if (r)
443 return r;
444 }
445
446 r = read_edid(edid, len);
447
448 if (need_enable)
449 hdmi_core_disable(dssdev);
450
451 return r;
452}
453
454#if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO)
455static int hdmi_audio_enable(struct omap_dss_device *dssdev)
456{
457 int r;
458
459 mutex_lock(&hdmi.lock);
460
461 if (!hdmi_mode_has_audio(hdmi.cfg.cm.mode)) {
462 r = -EPERM;
463 goto err;
464 }
465
466 r = hdmi_wp_audio_enable(&hdmi.wp, true);
467 if (r)
468 goto err;
469
470 mutex_unlock(&hdmi.lock);
471 return 0;
472
473err:
474 mutex_unlock(&hdmi.lock);
475 return r;
476}
477
478static void hdmi_audio_disable(struct omap_dss_device *dssdev)
479{
480 hdmi_wp_audio_enable(&hdmi.wp, false);
481}
482
483static int hdmi_audio_start(struct omap_dss_device *dssdev)
484{
485 return hdmi4_audio_start(&hdmi.core, &hdmi.wp);
486}
487
488static void hdmi_audio_stop(struct omap_dss_device *dssdev)
489{
490 hdmi4_audio_stop(&hdmi.core, &hdmi.wp);
491}
492
493static bool hdmi_audio_supported(struct omap_dss_device *dssdev)
494{
495 bool r;
496
497 mutex_lock(&hdmi.lock);
498
499 r = hdmi_mode_has_audio(hdmi.cfg.cm.mode);
500
501 mutex_unlock(&hdmi.lock);
502 return r;
503}
504
505static int hdmi_audio_config(struct omap_dss_device *dssdev,
506 struct omap_dss_audio *audio)
507{
508 int r;
509 u32 pclk = hdmi.cfg.timings.pixelclock;
510
511 mutex_lock(&hdmi.lock);
512
513 if (!hdmi_mode_has_audio(hdmi.cfg.cm.mode)) {
514 r = -EPERM;
515 goto err;
516 }
517
518 r = hdmi4_audio_config(&hdmi.core, &hdmi.wp, audio, pclk);
519 if (r)
520 goto err;
521
522 mutex_unlock(&hdmi.lock);
523 return 0;
524
525err:
526 mutex_unlock(&hdmi.lock);
527 return r;
528}
529#else
530static int hdmi_audio_enable(struct omap_dss_device *dssdev)
531{
532 return -EPERM;
533}
534
535static void hdmi_audio_disable(struct omap_dss_device *dssdev)
536{
537}
538
539static int hdmi_audio_start(struct omap_dss_device *dssdev)
540{
541 return -EPERM;
542}
543
544static void hdmi_audio_stop(struct omap_dss_device *dssdev)
545{
546}
547
548static bool hdmi_audio_supported(struct omap_dss_device *dssdev)
549{
550 return false;
551}
552
553static int hdmi_audio_config(struct omap_dss_device *dssdev,
554 struct omap_dss_audio *audio)
555{
556 return -EPERM;
557}
558#endif
559
560static const struct omapdss_hdmi_ops hdmi_ops = {
561 .connect = hdmi_connect,
562 .disconnect = hdmi_disconnect,
563
564 .enable = hdmi_display_enable,
565 .disable = hdmi_display_disable,
566
567 .check_timings = hdmi_display_check_timing,
568 .set_timings = hdmi_display_set_timing,
569 .get_timings = hdmi_display_get_timings,
570
571 .read_edid = hdmi_read_edid,
572
573 .audio_enable = hdmi_audio_enable,
574 .audio_disable = hdmi_audio_disable,
575 .audio_start = hdmi_audio_start,
576 .audio_stop = hdmi_audio_stop,
577 .audio_supported = hdmi_audio_supported,
578 .audio_config = hdmi_audio_config,
579};
580
581static void hdmi_init_output(struct platform_device *pdev)
582{
583 struct omap_dss_device *out = &hdmi.output;
584
585 out->dev = &pdev->dev;
586 out->id = OMAP_DSS_OUTPUT_HDMI;
587 out->output_type = OMAP_DISPLAY_TYPE_HDMI;
588 out->name = "hdmi.0";
589 out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
590 out->ops.hdmi = &hdmi_ops;
591 out->owner = THIS_MODULE;
592
593 omapdss_register_output(out);
594}
595
596static void __exit hdmi_uninit_output(struct platform_device *pdev)
597{
598 struct omap_dss_device *out = &hdmi.output;
599
600 omapdss_unregister_output(out);
601}
602
603/* HDMI HW IP initialisation */
604static int omapdss_hdmihw_probe(struct platform_device *pdev)
605{
606 int r;
607
608 hdmi.pdev = pdev;
609
610 mutex_init(&hdmi.lock);
611
612 r = hdmi_wp_init(pdev, &hdmi.wp);
613 if (r)
614 return r;
615
616 r = hdmi_pll_init(pdev, &hdmi.pll);
617 if (r)
618 return r;
619
620 r = hdmi_phy_init(pdev, &hdmi.phy);
621 if (r)
622 return r;
623
624 r = hdmi4_core_init(pdev, &hdmi.core);
625 if (r)
626 return r;
627
628 r = hdmi_get_clocks(pdev);
629 if (r) {
630 DSSERR("can't get clocks\n");
631 return r;
632 }
633
634 pm_runtime_enable(&pdev->dev);
635
636 hdmi_init_output(pdev);
637
638 dss_debugfs_create_file("hdmi", hdmi_dump_regs);
639
640 return 0;
641}
642
643static int __exit omapdss_hdmihw_remove(struct platform_device *pdev)
644{
645 hdmi_uninit_output(pdev);
646
647 pm_runtime_disable(&pdev->dev);
648
649 return 0;
650}
651
652static int hdmi_runtime_suspend(struct device *dev)
653{
654 clk_disable_unprepare(hdmi.sys_clk);
655
656 dispc_runtime_put();
657
658 return 0;
659}
660
661static int hdmi_runtime_resume(struct device *dev)
662{
663 int r;
664
665 r = dispc_runtime_get();
666 if (r < 0)
667 return r;
668
669 clk_prepare_enable(hdmi.sys_clk);
670
671 return 0;
672}
673
674static const struct dev_pm_ops hdmi_pm_ops = {
675 .runtime_suspend = hdmi_runtime_suspend,
676 .runtime_resume = hdmi_runtime_resume,
677};
678
679static const struct of_device_id hdmi_of_match[] = {
680 { .compatible = "ti,omap4-hdmi", },
681 {},
682};
683
684static struct platform_driver omapdss_hdmihw_driver = {
685 .probe = omapdss_hdmihw_probe,
686 .remove = __exit_p(omapdss_hdmihw_remove),
687 .driver = {
688 .name = "omapdss_hdmi",
689 .owner = THIS_MODULE,
690 .pm = &hdmi_pm_ops,
691 .of_match_table = hdmi_of_match,
692 },
693};
694
695int __init hdmi4_init_platform_driver(void)
696{
697 return platform_driver_register(&omapdss_hdmihw_driver);
698}
699
700void __exit hdmi4_uninit_platform_driver(void)
701{
702 platform_driver_unregister(&omapdss_hdmihw_driver);
703}