1 files changed, 29 insertions, 0 deletions

diff --git a/drivers/video/exynos/exynos_dp_reg.h b/drivers/video/exynos/exynos_dp_reg.h
index 42f608e2a43e..125b27cd57ae 100644
--- a/drivers/video/exynos/exynos_dp_reg.h
+++ b/drivers/video/exynos/exynos_dp_reg.h
@@ -24,6 +24,12 @@
 
 #define EXYNOS_DP_LANE_MAP                      0x35C
 
+#define EXYNOS_DP_ANALOG_CTL_1                  0x370
+#define EXYNOS_DP_ANALOG_CTL_2                  0x374
+#define EXYNOS_DP_ANALOG_CTL_3                  0x378
+#define EXYNOS_DP_PLL_FILTER_CTL_1              0x37C
+#define EXYNOS_DP_TX_AMP_TUNING_CTL             0x380
+
 #define EXYNOS_DP_AUX_HW_RETRY_CTL              0x390
 
 #define EXYNOS_DP_COMMON_INT_STA_1              0x3C4
@@ -166,6 +172,29 @@
 #define LANE0_MAP_LOGIC_LANE_2                  (0x2 << 0)
 #define LANE0_MAP_LOGIC_LANE_3                  (0x3 << 0)
 
+/* EXYNOS_DP_ANALOG_CTL_1 */
+#define TX_TERMINAL_CTRL_50_OHM                 (0x1 << 4)
+
+/* EXYNOS_DP_ANALOG_CTL_2 */
+#define SEL_24M                                 (0x1 << 3)
+#define TX_DVDD_BIT_1_0625V                     (0x4 << 0)
+
+/* EXYNOS_DP_ANALOG_CTL_3 */
+#define DRIVE_DVDD_BIT_1_0625V                  (0x4 << 5)
+#define VCO_BIT_600_MICRO                       (0x5 << 0)
+
+/* EXYNOS_DP_PLL_FILTER_CTL_1 */
+#define PD_RING_OSC                             (0x1 << 6)
+#define AUX_TERMINAL_CTRL_50_OHM                (0x2 << 4)
+#define TX_CUR1_2X                              (0x1 << 2)
+#define TX_CUR_8_MA                             (0x2 << 0)
+
+/* EXYNOS_DP_TX_AMP_TUNING_CTL */
+#define CH3_AMP_400_MV                          (0x0 << 24)
+#define CH2_AMP_400_MV                          (0x0 << 16)
+#define CH1_AMP_400_MV                          (0x0 << 8)
+#define CH0_AMP_400_MV                          (0x0 << 0)
+
 /* EXYNOS_DP_AUX_HW_RETRY_CTL */
 #define AUX_BIT_PERIOD_EXPECTED_DELAY(x)        (((x) & 0x7) << 8)
 #define AUX_HW_RETRY_INTERVAL_MASK              (0x3 << 3)