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path: root/drivers/video/aty/atyfb_base.c
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Diffstat (limited to 'drivers/video/aty/atyfb_base.c')
-rw-r--r--drivers/video/aty/atyfb_base.c42
1 files changed, 26 insertions, 16 deletions
diff --git a/drivers/video/aty/atyfb_base.c b/drivers/video/aty/atyfb_base.c
index cc6b470073da..1207c208a30b 100644
--- a/drivers/video/aty/atyfb_base.c
+++ b/drivers/video/aty/atyfb_base.c
@@ -135,7 +135,7 @@
135#if defined(CONFIG_PM) || defined(CONFIG_PMAC_BACKLIGHT) || \ 135#if defined(CONFIG_PM) || defined(CONFIG_PMAC_BACKLIGHT) || \
136defined (CONFIG_FB_ATY_GENERIC_LCD) || defined(CONFIG_FB_ATY_BACKLIGHT) 136defined (CONFIG_FB_ATY_GENERIC_LCD) || defined(CONFIG_FB_ATY_BACKLIGHT)
137static const u32 lt_lcd_regs[] = { 137static const u32 lt_lcd_regs[] = {
138 CONFIG_PANEL_LG, 138 CNFG_PANEL_LG,
139 LCD_GEN_CNTL_LG, 139 LCD_GEN_CNTL_LG,
140 DSTN_CONTROL_LG, 140 DSTN_CONTROL_LG,
141 HFB_PITCH_ADDR_LG, 141 HFB_PITCH_ADDR_LG,
@@ -446,7 +446,7 @@ static int __devinit correct_chipset(struct atyfb_par *par)
446 par->pll_limits.ecp_max = aty_chips[i].ecp_max; 446 par->pll_limits.ecp_max = aty_chips[i].ecp_max;
447 par->features = aty_chips[i].features; 447 par->features = aty_chips[i].features;
448 448
449 chip_id = aty_ld_le32(CONFIG_CHIP_ID, par); 449 chip_id = aty_ld_le32(CNFG_CHIP_ID, par);
450 type = chip_id & CFG_CHIP_TYPE; 450 type = chip_id & CFG_CHIP_TYPE;
451 rev = (chip_id & CFG_CHIP_REV) >> 24; 451 rev = (chip_id & CFG_CHIP_REV) >> 24;
452 452
@@ -629,7 +629,7 @@ static void aty_get_crtc(const struct atyfb_par *par, struct crtc *crtc)
629 crtc->lcd_index = aty_ld_le32(LCD_INDEX, par); 629 crtc->lcd_index = aty_ld_le32(LCD_INDEX, par);
630 aty_st_le32(LCD_INDEX, crtc->lcd_index, par); 630 aty_st_le32(LCD_INDEX, crtc->lcd_index, par);
631 } 631 }
632 crtc->lcd_config_panel = aty_ld_lcd(CONFIG_PANEL, par); 632 crtc->lcd_config_panel = aty_ld_lcd(CNFG_PANEL, par);
633 crtc->lcd_gen_cntl = aty_ld_lcd(LCD_GEN_CNTL, par); 633 crtc->lcd_gen_cntl = aty_ld_lcd(LCD_GEN_CNTL, par);
634 634
635 635
@@ -676,7 +676,7 @@ static void aty_set_crtc(const struct atyfb_par *par, const struct crtc *crtc)
676 aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl & ~(CRTC_EXT_DISP_EN | CRTC_EN), par); 676 aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl & ~(CRTC_EXT_DISP_EN | CRTC_EN), par);
677 677
678 /* update non-shadow registers first */ 678 /* update non-shadow registers first */
679 aty_st_lcd(CONFIG_PANEL, crtc->lcd_config_panel, par); 679 aty_st_lcd(CNFG_PANEL, crtc->lcd_config_panel, par);
680 aty_st_lcd(LCD_GEN_CNTL, crtc->lcd_gen_cntl & 680 aty_st_lcd(LCD_GEN_CNTL, crtc->lcd_gen_cntl &
681 ~(CRTC_RW_SELECT | SHADOW_EN | SHADOW_RW_EN), par); 681 ~(CRTC_RW_SELECT | SHADOW_EN | SHADOW_RW_EN), par);
682 682
@@ -858,7 +858,7 @@ static int aty_var_to_crtc(const struct fb_info *info,
858 if (!M64_HAS(MOBIL_BUS)) 858 if (!M64_HAS(MOBIL_BUS))
859 crtc->lcd_index |= CRTC2_DISPLAY_DIS; 859 crtc->lcd_index |= CRTC2_DISPLAY_DIS;
860 860
861 crtc->lcd_config_panel = aty_ld_lcd(CONFIG_PANEL, par) | 0x4000; 861 crtc->lcd_config_panel = aty_ld_lcd(CNFG_PANEL, par) | 0x4000;
862 crtc->lcd_gen_cntl = aty_ld_lcd(LCD_GEN_CNTL, par) & ~CRTC_RW_SELECT; 862 crtc->lcd_gen_cntl = aty_ld_lcd(LCD_GEN_CNTL, par) & ~CRTC_RW_SELECT;
863 863
864 crtc->lcd_gen_cntl &= 864 crtc->lcd_gen_cntl &=
@@ -1978,7 +1978,7 @@ static int aty_power_mgmt(int sleep, struct atyfb_par *par)
1978 1978
1979 return timeout ? 0 : -EIO; 1979 return timeout ? 0 : -EIO;
1980} 1980}
1981#endif 1981#endif /* CONFIG_PPC_PMAC */
1982 1982
1983static int atyfb_pci_suspend(struct pci_dev *pdev, pm_message_t state) 1983static int atyfb_pci_suspend(struct pci_dev *pdev, pm_message_t state)
1984{ 1984{
@@ -2002,9 +2002,15 @@ static int atyfb_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2002 par->asleep = 1; 2002 par->asleep = 1;
2003 par->lock_blank = 1; 2003 par->lock_blank = 1;
2004 2004
2005 /* Because we may change PCI D state ourselves, we need to
2006 * first save the config space content so the core can
2007 * restore it properly on resume.
2008 */
2009 pci_save_state(pdev);
2010
2005#ifdef CONFIG_PPC_PMAC 2011#ifdef CONFIG_PPC_PMAC
2006 /* Set chip to "suspend" mode */ 2012 /* Set chip to "suspend" mode */
2007 if (aty_power_mgmt(1, par)) { 2013 if (machine_is(powermac) && aty_power_mgmt(1, par)) {
2008 par->asleep = 0; 2014 par->asleep = 0;
2009 par->lock_blank = 0; 2015 par->lock_blank = 0;
2010 atyfb_blank(FB_BLANK_UNBLANK, info); 2016 atyfb_blank(FB_BLANK_UNBLANK, info);
@@ -2047,11 +2053,15 @@ static int atyfb_pci_resume(struct pci_dev *pdev)
2047 2053
2048 acquire_console_sem(); 2054 acquire_console_sem();
2049 2055
2056 /* PCI state will have been restored by the core, so
2057 * we should be in D0 now with our config space fully
2058 * restored
2059 */
2060
2050#ifdef CONFIG_PPC_PMAC 2061#ifdef CONFIG_PPC_PMAC
2051 if (pdev->dev.power.power_state.event == 2) 2062 if (machine_is(powermac) &&
2063 pdev->dev.power.power_state.event == PM_EVENT_SUSPEND)
2052 aty_power_mgmt(0, par); 2064 aty_power_mgmt(0, par);
2053#else
2054 pci_set_power_state(pdev, PCI_D0);
2055#endif 2065#endif
2056 2066
2057 aty_resume_chip(info); 2067 aty_resume_chip(info);
@@ -2254,7 +2264,7 @@ static int __devinit aty_init(struct fb_info *info)
2254 if (!M64_HAS(INTEGRATED)) { 2264 if (!M64_HAS(INTEGRATED)) {
2255 u32 stat0; 2265 u32 stat0;
2256 u8 dac_type, dac_subtype, clk_type; 2266 u8 dac_type, dac_subtype, clk_type;
2257 stat0 = aty_ld_le32(CONFIG_STAT0, par); 2267 stat0 = aty_ld_le32(CNFG_STAT0, par);
2258 par->bus_type = (stat0 >> 0) & 0x07; 2268 par->bus_type = (stat0 >> 0) & 0x07;
2259 par->ram_type = (stat0 >> 3) & 0x07; 2269 par->ram_type = (stat0 >> 3) & 0x07;
2260 ramname = aty_gx_ram[par->ram_type]; 2270 ramname = aty_gx_ram[par->ram_type];
@@ -2324,7 +2334,7 @@ static int __devinit aty_init(struct fb_info *info)
2324 par->dac_ops = &aty_dac_ct; 2334 par->dac_ops = &aty_dac_ct;
2325 par->pll_ops = &aty_pll_ct; 2335 par->pll_ops = &aty_pll_ct;
2326 par->bus_type = PCI; 2336 par->bus_type = PCI;
2327 par->ram_type = (aty_ld_le32(CONFIG_STAT0, par) & 0x07); 2337 par->ram_type = (aty_ld_le32(CNFG_STAT0, par) & 0x07);
2328 ramname = aty_ct_ram[par->ram_type]; 2338 ramname = aty_ct_ram[par->ram_type];
2329 /* for many chips, the mclk is 67 MHz for SDRAM, 63 MHz otherwise */ 2339 /* for many chips, the mclk is 67 MHz for SDRAM, 63 MHz otherwise */
2330 if (par->pll_limits.mclk == 67 && par->ram_type < SDRAM) 2340 if (par->pll_limits.mclk == 67 && par->ram_type < SDRAM)
@@ -2433,7 +2443,7 @@ static int __devinit aty_init(struct fb_info *info)
2433 } 2443 }
2434 2444
2435 if (M64_HAS(MAGIC_VRAM_SIZE)) { 2445 if (M64_HAS(MAGIC_VRAM_SIZE)) {
2436 if (aty_ld_le32(CONFIG_STAT1, par) & 0x40000000) 2446 if (aty_ld_le32(CNFG_STAT1, par) & 0x40000000)
2437 info->fix.smem_len += 0x400000; 2447 info->fix.smem_len += 0x400000;
2438 } 2448 }
2439 2449
@@ -2946,7 +2956,7 @@ static int __devinit atyfb_setup_sparc(struct pci_dev *pdev,
2946 * Fix PROMs idea of MEM_CNTL settings... 2956 * Fix PROMs idea of MEM_CNTL settings...
2947 */ 2957 */
2948 mem = aty_ld_le32(MEM_CNTL, par); 2958 mem = aty_ld_le32(MEM_CNTL, par);
2949 chip_id = aty_ld_le32(CONFIG_CHIP_ID, par); 2959 chip_id = aty_ld_le32(CNFG_CHIP_ID, par);
2950 if (((chip_id & CFG_CHIP_TYPE) == VT_CHIP_ID) && !((chip_id >> 24) & 1)) { 2960 if (((chip_id & CFG_CHIP_TYPE) == VT_CHIP_ID) && !((chip_id >> 24) & 1)) {
2951 switch (mem & 0x0f) { 2961 switch (mem & 0x0f) {
2952 case 3: 2962 case 3:
@@ -2964,7 +2974,7 @@ static int __devinit atyfb_setup_sparc(struct pci_dev *pdev,
2964 default: 2974 default:
2965 break; 2975 break;
2966 } 2976 }
2967 if ((aty_ld_le32(CONFIG_STAT0, par) & 7) >= SDRAM) 2977 if ((aty_ld_le32(CNFG_STAT0, par) & 7) >= SDRAM)
2968 mem &= ~(0x00700000); 2978 mem &= ~(0x00700000);
2969 } 2979 }
2970 mem &= ~(0xcf80e000); /* Turn off all undocumented bits. */ 2980 mem &= ~(0xcf80e000); /* Turn off all undocumented bits. */
@@ -3572,7 +3582,7 @@ static int __init atyfb_atari_probe(void)
3572 } 3582 }
3573 3583
3574 /* Fake pci_id for correct_chipset() */ 3584 /* Fake pci_id for correct_chipset() */
3575 switch (aty_ld_le32(CONFIG_CHIP_ID, par) & CFG_CHIP_TYPE) { 3585 switch (aty_ld_le32(CNFG_CHIP_ID, par) & CFG_CHIP_TYPE) {
3576 case 0x00d7: 3586 case 0x00d7:
3577 par->pci_id = PCI_CHIP_MACH64GX; 3587 par->pci_id = PCI_CHIP_MACH64GX;
3578 break; 3588 break;