diff options
Diffstat (limited to 'drivers/usb/musb/musb_core.c')
-rw-r--r-- | drivers/usb/musb/musb_core.c | 228 |
1 files changed, 127 insertions, 101 deletions
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c index 4000cf6d1e81..554a414f65d1 100644 --- a/drivers/usb/musb/musb_core.c +++ b/drivers/usb/musb/musb_core.c | |||
@@ -112,6 +112,7 @@ | |||
112 | #include "davinci.h" | 112 | #include "davinci.h" |
113 | #endif | 113 | #endif |
114 | 114 | ||
115 | #define TA_WAIT_BCON(m) max_t(int, (m)->a_wait_bcon, OTG_TIME_A_WAIT_BCON) | ||
115 | 116 | ||
116 | 117 | ||
117 | unsigned musb_debug; | 118 | unsigned musb_debug; |
@@ -267,7 +268,7 @@ void musb_load_testpacket(struct musb *musb) | |||
267 | 268 | ||
268 | const char *otg_state_string(struct musb *musb) | 269 | const char *otg_state_string(struct musb *musb) |
269 | { | 270 | { |
270 | switch (musb->xceiv.state) { | 271 | switch (musb->xceiv->state) { |
271 | case OTG_STATE_A_IDLE: return "a_idle"; | 272 | case OTG_STATE_A_IDLE: return "a_idle"; |
272 | case OTG_STATE_A_WAIT_VRISE: return "a_wait_vrise"; | 273 | case OTG_STATE_A_WAIT_VRISE: return "a_wait_vrise"; |
273 | case OTG_STATE_A_WAIT_BCON: return "a_wait_bcon"; | 274 | case OTG_STATE_A_WAIT_BCON: return "a_wait_bcon"; |
@@ -288,12 +289,6 @@ const char *otg_state_string(struct musb *musb) | |||
288 | #ifdef CONFIG_USB_MUSB_OTG | 289 | #ifdef CONFIG_USB_MUSB_OTG |
289 | 290 | ||
290 | /* | 291 | /* |
291 | * See also USB_OTG_1-3.pdf 6.6.5 Timers | ||
292 | * REVISIT: Are the other timers done in the hardware? | ||
293 | */ | ||
294 | #define TB_ASE0_BRST 100 /* Min 3.125 ms */ | ||
295 | |||
296 | /* | ||
297 | * Handles OTG hnp timeouts, such as b_ase0_brst | 292 | * Handles OTG hnp timeouts, such as b_ase0_brst |
298 | */ | 293 | */ |
299 | void musb_otg_timer_func(unsigned long data) | 294 | void musb_otg_timer_func(unsigned long data) |
@@ -302,16 +297,18 @@ void musb_otg_timer_func(unsigned long data) | |||
302 | unsigned long flags; | 297 | unsigned long flags; |
303 | 298 | ||
304 | spin_lock_irqsave(&musb->lock, flags); | 299 | spin_lock_irqsave(&musb->lock, flags); |
305 | switch (musb->xceiv.state) { | 300 | switch (musb->xceiv->state) { |
306 | case OTG_STATE_B_WAIT_ACON: | 301 | case OTG_STATE_B_WAIT_ACON: |
307 | DBG(1, "HNP: b_wait_acon timeout; back to b_peripheral\n"); | 302 | DBG(1, "HNP: b_wait_acon timeout; back to b_peripheral\n"); |
308 | musb_g_disconnect(musb); | 303 | musb_g_disconnect(musb); |
309 | musb->xceiv.state = OTG_STATE_B_PERIPHERAL; | 304 | musb->xceiv->state = OTG_STATE_B_PERIPHERAL; |
310 | musb->is_active = 0; | 305 | musb->is_active = 0; |
311 | break; | 306 | break; |
307 | case OTG_STATE_A_SUSPEND: | ||
312 | case OTG_STATE_A_WAIT_BCON: | 308 | case OTG_STATE_A_WAIT_BCON: |
313 | DBG(1, "HNP: a_wait_bcon timeout; back to a_host\n"); | 309 | DBG(1, "HNP: %s timeout\n", otg_state_string(musb)); |
314 | musb_hnp_stop(musb); | 310 | musb_set_vbus(musb, 0); |
311 | musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; | ||
315 | break; | 312 | break; |
316 | default: | 313 | default: |
317 | DBG(1, "HNP: Unhandled mode %s\n", otg_state_string(musb)); | 314 | DBG(1, "HNP: Unhandled mode %s\n", otg_state_string(musb)); |
@@ -320,10 +317,8 @@ void musb_otg_timer_func(unsigned long data) | |||
320 | spin_unlock_irqrestore(&musb->lock, flags); | 317 | spin_unlock_irqrestore(&musb->lock, flags); |
321 | } | 318 | } |
322 | 319 | ||
323 | static DEFINE_TIMER(musb_otg_timer, musb_otg_timer_func, 0, 0); | ||
324 | |||
325 | /* | 320 | /* |
326 | * Stops the B-device HNP state. Caller must take care of locking. | 321 | * Stops the HNP transition. Caller must take care of locking. |
327 | */ | 322 | */ |
328 | void musb_hnp_stop(struct musb *musb) | 323 | void musb_hnp_stop(struct musb *musb) |
329 | { | 324 | { |
@@ -331,20 +326,17 @@ void musb_hnp_stop(struct musb *musb) | |||
331 | void __iomem *mbase = musb->mregs; | 326 | void __iomem *mbase = musb->mregs; |
332 | u8 reg; | 327 | u8 reg; |
333 | 328 | ||
334 | switch (musb->xceiv.state) { | 329 | DBG(1, "HNP: stop from %s\n", otg_state_string(musb)); |
330 | |||
331 | switch (musb->xceiv->state) { | ||
335 | case OTG_STATE_A_PERIPHERAL: | 332 | case OTG_STATE_A_PERIPHERAL: |
336 | case OTG_STATE_A_WAIT_VFALL: | ||
337 | case OTG_STATE_A_WAIT_BCON: | ||
338 | DBG(1, "HNP: Switching back to A-host\n"); | ||
339 | musb_g_disconnect(musb); | 333 | musb_g_disconnect(musb); |
340 | musb->xceiv.state = OTG_STATE_A_IDLE; | 334 | DBG(1, "HNP: back to %s\n", otg_state_string(musb)); |
341 | MUSB_HST_MODE(musb); | ||
342 | musb->is_active = 0; | ||
343 | break; | 335 | break; |
344 | case OTG_STATE_B_HOST: | 336 | case OTG_STATE_B_HOST: |
345 | DBG(1, "HNP: Disabling HR\n"); | 337 | DBG(1, "HNP: Disabling HR\n"); |
346 | hcd->self.is_b_host = 0; | 338 | hcd->self.is_b_host = 0; |
347 | musb->xceiv.state = OTG_STATE_B_PERIPHERAL; | 339 | musb->xceiv->state = OTG_STATE_B_PERIPHERAL; |
348 | MUSB_DEV_MODE(musb); | 340 | MUSB_DEV_MODE(musb); |
349 | reg = musb_readb(mbase, MUSB_POWER); | 341 | reg = musb_readb(mbase, MUSB_POWER); |
350 | reg |= MUSB_POWER_SUSPENDM; | 342 | reg |= MUSB_POWER_SUSPENDM; |
@@ -402,7 +394,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
402 | 394 | ||
403 | if (devctl & MUSB_DEVCTL_HM) { | 395 | if (devctl & MUSB_DEVCTL_HM) { |
404 | #ifdef CONFIG_USB_MUSB_HDRC_HCD | 396 | #ifdef CONFIG_USB_MUSB_HDRC_HCD |
405 | switch (musb->xceiv.state) { | 397 | switch (musb->xceiv->state) { |
406 | case OTG_STATE_A_SUSPEND: | 398 | case OTG_STATE_A_SUSPEND: |
407 | /* remote wakeup? later, GetPortStatus | 399 | /* remote wakeup? later, GetPortStatus |
408 | * will stop RESUME signaling | 400 | * will stop RESUME signaling |
@@ -425,12 +417,12 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
425 | musb->rh_timer = jiffies | 417 | musb->rh_timer = jiffies |
426 | + msecs_to_jiffies(20); | 418 | + msecs_to_jiffies(20); |
427 | 419 | ||
428 | musb->xceiv.state = OTG_STATE_A_HOST; | 420 | musb->xceiv->state = OTG_STATE_A_HOST; |
429 | musb->is_active = 1; | 421 | musb->is_active = 1; |
430 | usb_hcd_resume_root_hub(musb_to_hcd(musb)); | 422 | usb_hcd_resume_root_hub(musb_to_hcd(musb)); |
431 | break; | 423 | break; |
432 | case OTG_STATE_B_WAIT_ACON: | 424 | case OTG_STATE_B_WAIT_ACON: |
433 | musb->xceiv.state = OTG_STATE_B_PERIPHERAL; | 425 | musb->xceiv->state = OTG_STATE_B_PERIPHERAL; |
434 | musb->is_active = 1; | 426 | musb->is_active = 1; |
435 | MUSB_DEV_MODE(musb); | 427 | MUSB_DEV_MODE(musb); |
436 | break; | 428 | break; |
@@ -441,11 +433,11 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
441 | } | 433 | } |
442 | #endif | 434 | #endif |
443 | } else { | 435 | } else { |
444 | switch (musb->xceiv.state) { | 436 | switch (musb->xceiv->state) { |
445 | #ifdef CONFIG_USB_MUSB_HDRC_HCD | 437 | #ifdef CONFIG_USB_MUSB_HDRC_HCD |
446 | case OTG_STATE_A_SUSPEND: | 438 | case OTG_STATE_A_SUSPEND: |
447 | /* possibly DISCONNECT is upcoming */ | 439 | /* possibly DISCONNECT is upcoming */ |
448 | musb->xceiv.state = OTG_STATE_A_HOST; | 440 | musb->xceiv->state = OTG_STATE_A_HOST; |
449 | usb_hcd_resume_root_hub(musb_to_hcd(musb)); | 441 | usb_hcd_resume_root_hub(musb_to_hcd(musb)); |
450 | break; | 442 | break; |
451 | #endif | 443 | #endif |
@@ -490,7 +482,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
490 | */ | 482 | */ |
491 | musb_writeb(mbase, MUSB_DEVCTL, MUSB_DEVCTL_SESSION); | 483 | musb_writeb(mbase, MUSB_DEVCTL, MUSB_DEVCTL_SESSION); |
492 | musb->ep0_stage = MUSB_EP0_START; | 484 | musb->ep0_stage = MUSB_EP0_START; |
493 | musb->xceiv.state = OTG_STATE_A_IDLE; | 485 | musb->xceiv->state = OTG_STATE_A_IDLE; |
494 | MUSB_HST_MODE(musb); | 486 | MUSB_HST_MODE(musb); |
495 | musb_set_vbus(musb, 1); | 487 | musb_set_vbus(musb, 1); |
496 | 488 | ||
@@ -516,7 +508,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
516 | * REVISIT: do delays from lots of DEBUG_KERNEL checks | 508 | * REVISIT: do delays from lots of DEBUG_KERNEL checks |
517 | * make trouble here, keeping VBUS < 4.4V ? | 509 | * make trouble here, keeping VBUS < 4.4V ? |
518 | */ | 510 | */ |
519 | switch (musb->xceiv.state) { | 511 | switch (musb->xceiv->state) { |
520 | case OTG_STATE_A_HOST: | 512 | case OTG_STATE_A_HOST: |
521 | /* recovery is dicey once we've gotten past the | 513 | /* recovery is dicey once we've gotten past the |
522 | * initial stages of enumeration, but if VBUS | 514 | * initial stages of enumeration, but if VBUS |
@@ -594,37 +586,40 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
594 | if (devctl & MUSB_DEVCTL_LSDEV) | 586 | if (devctl & MUSB_DEVCTL_LSDEV) |
595 | musb->port1_status |= USB_PORT_STAT_LOW_SPEED; | 587 | musb->port1_status |= USB_PORT_STAT_LOW_SPEED; |
596 | 588 | ||
597 | if (hcd->status_urb) | ||
598 | usb_hcd_poll_rh_status(hcd); | ||
599 | else | ||
600 | usb_hcd_resume_root_hub(hcd); | ||
601 | |||
602 | MUSB_HST_MODE(musb); | ||
603 | |||
604 | /* indicate new connection to OTG machine */ | 589 | /* indicate new connection to OTG machine */ |
605 | switch (musb->xceiv.state) { | 590 | switch (musb->xceiv->state) { |
606 | case OTG_STATE_B_PERIPHERAL: | 591 | case OTG_STATE_B_PERIPHERAL: |
607 | if (int_usb & MUSB_INTR_SUSPEND) { | 592 | if (int_usb & MUSB_INTR_SUSPEND) { |
608 | DBG(1, "HNP: SUSPEND+CONNECT, now b_host\n"); | 593 | DBG(1, "HNP: SUSPEND+CONNECT, now b_host\n"); |
609 | musb->xceiv.state = OTG_STATE_B_HOST; | ||
610 | hcd->self.is_b_host = 1; | ||
611 | int_usb &= ~MUSB_INTR_SUSPEND; | 594 | int_usb &= ~MUSB_INTR_SUSPEND; |
595 | goto b_host; | ||
612 | } else | 596 | } else |
613 | DBG(1, "CONNECT as b_peripheral???\n"); | 597 | DBG(1, "CONNECT as b_peripheral???\n"); |
614 | break; | 598 | break; |
615 | case OTG_STATE_B_WAIT_ACON: | 599 | case OTG_STATE_B_WAIT_ACON: |
616 | DBG(1, "HNP: Waiting to switch to b_host state\n"); | 600 | DBG(1, "HNP: CONNECT, now b_host\n"); |
617 | musb->xceiv.state = OTG_STATE_B_HOST; | 601 | b_host: |
602 | musb->xceiv->state = OTG_STATE_B_HOST; | ||
618 | hcd->self.is_b_host = 1; | 603 | hcd->self.is_b_host = 1; |
604 | musb->ignore_disconnect = 0; | ||
605 | del_timer(&musb->otg_timer); | ||
619 | break; | 606 | break; |
620 | default: | 607 | default: |
621 | if ((devctl & MUSB_DEVCTL_VBUS) | 608 | if ((devctl & MUSB_DEVCTL_VBUS) |
622 | == (3 << MUSB_DEVCTL_VBUS_SHIFT)) { | 609 | == (3 << MUSB_DEVCTL_VBUS_SHIFT)) { |
623 | musb->xceiv.state = OTG_STATE_A_HOST; | 610 | musb->xceiv->state = OTG_STATE_A_HOST; |
624 | hcd->self.is_b_host = 0; | 611 | hcd->self.is_b_host = 0; |
625 | } | 612 | } |
626 | break; | 613 | break; |
627 | } | 614 | } |
615 | |||
616 | /* poke the root hub */ | ||
617 | MUSB_HST_MODE(musb); | ||
618 | if (hcd->status_urb) | ||
619 | usb_hcd_poll_rh_status(hcd); | ||
620 | else | ||
621 | usb_hcd_resume_root_hub(hcd); | ||
622 | |||
628 | DBG(1, "CONNECT (%s) devctl %02x\n", | 623 | DBG(1, "CONNECT (%s) devctl %02x\n", |
629 | otg_state_string(musb), devctl); | 624 | otg_state_string(musb), devctl); |
630 | } | 625 | } |
@@ -650,7 +645,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
650 | } | 645 | } |
651 | } else if (is_peripheral_capable()) { | 646 | } else if (is_peripheral_capable()) { |
652 | DBG(1, "BUS RESET as %s\n", otg_state_string(musb)); | 647 | DBG(1, "BUS RESET as %s\n", otg_state_string(musb)); |
653 | switch (musb->xceiv.state) { | 648 | switch (musb->xceiv->state) { |
654 | #ifdef CONFIG_USB_OTG | 649 | #ifdef CONFIG_USB_OTG |
655 | case OTG_STATE_A_SUSPEND: | 650 | case OTG_STATE_A_SUSPEND: |
656 | /* We need to ignore disconnect on suspend | 651 | /* We need to ignore disconnect on suspend |
@@ -661,24 +656,27 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, | |||
661 | musb_g_reset(musb); | 656 | musb_g_reset(musb); |
662 | /* FALLTHROUGH */ | 657 | /* FALLTHROUGH */ |
663 | case OTG_STATE_A_WAIT_BCON: /* OPT TD.4.7-900ms */ | 658 | case OTG_STATE_A_WAIT_BCON: /* OPT TD.4.7-900ms */ |
664 | DBG(1, "HNP: Setting timer as %s\n", | 659 | /* never use invalid T(a_wait_bcon) */ |
665 | otg_state_string(musb)); | 660 | DBG(1, "HNP: in %s, %d msec timeout\n", |
666 | musb_otg_timer.data = (unsigned long)musb; | 661 | otg_state_string(musb), |
667 | mod_timer(&musb_otg_timer, jiffies | 662 | TA_WAIT_BCON(musb)); |
668 | + msecs_to_jiffies(100)); | 663 | mod_timer(&musb->otg_timer, jiffies |
664 | + msecs_to_jiffies(TA_WAIT_BCON(musb))); | ||
669 | break; | 665 | break; |
670 | case OTG_STATE_A_PERIPHERAL: | 666 | case OTG_STATE_A_PERIPHERAL: |
671 | musb_hnp_stop(musb); | 667 | musb->ignore_disconnect = 0; |
668 | del_timer(&musb->otg_timer); | ||
669 | musb_g_reset(musb); | ||
672 | break; | 670 | break; |
673 | case OTG_STATE_B_WAIT_ACON: | 671 | case OTG_STATE_B_WAIT_ACON: |
674 | DBG(1, "HNP: RESET (%s), to b_peripheral\n", | 672 | DBG(1, "HNP: RESET (%s), to b_peripheral\n", |
675 | otg_state_string(musb)); | 673 | otg_state_string(musb)); |
676 | musb->xceiv.state = OTG_STATE_B_PERIPHERAL; | 674 | musb->xceiv->state = OTG_STATE_B_PERIPHERAL; |
677 | musb_g_reset(musb); | 675 | musb_g_reset(musb); |
678 | break; | 676 | break; |
679 | #endif | 677 | #endif |
680 | case OTG_STATE_B_IDLE: | 678 | case OTG_STATE_B_IDLE: |
681 | musb->xceiv.state = OTG_STATE_B_PERIPHERAL; | 679 | musb->xceiv->state = OTG_STATE_B_PERIPHERAL; |
682 | /* FALLTHROUGH */ | 680 | /* FALLTHROUGH */ |
683 | case OTG_STATE_B_PERIPHERAL: | 681 | case OTG_STATE_B_PERIPHERAL: |
684 | musb_g_reset(musb); | 682 | musb_g_reset(musb); |
@@ -763,7 +761,7 @@ static irqreturn_t musb_stage2_irq(struct musb *musb, u8 int_usb, | |||
763 | MUSB_MODE(musb), devctl); | 761 | MUSB_MODE(musb), devctl); |
764 | handled = IRQ_HANDLED; | 762 | handled = IRQ_HANDLED; |
765 | 763 | ||
766 | switch (musb->xceiv.state) { | 764 | switch (musb->xceiv->state) { |
767 | #ifdef CONFIG_USB_MUSB_HDRC_HCD | 765 | #ifdef CONFIG_USB_MUSB_HDRC_HCD |
768 | case OTG_STATE_A_HOST: | 766 | case OTG_STATE_A_HOST: |
769 | case OTG_STATE_A_SUSPEND: | 767 | case OTG_STATE_A_SUSPEND: |
@@ -776,7 +774,16 @@ static irqreturn_t musb_stage2_irq(struct musb *musb, u8 int_usb, | |||
776 | #endif /* HOST */ | 774 | #endif /* HOST */ |
777 | #ifdef CONFIG_USB_MUSB_OTG | 775 | #ifdef CONFIG_USB_MUSB_OTG |
778 | case OTG_STATE_B_HOST: | 776 | case OTG_STATE_B_HOST: |
779 | musb_hnp_stop(musb); | 777 | /* REVISIT this behaves for "real disconnect" |
778 | * cases; make sure the other transitions from | ||
779 | * from B_HOST act right too. The B_HOST code | ||
780 | * in hnp_stop() is currently not used... | ||
781 | */ | ||
782 | musb_root_disconnect(musb); | ||
783 | musb_to_hcd(musb)->self.is_b_host = 0; | ||
784 | musb->xceiv->state = OTG_STATE_B_PERIPHERAL; | ||
785 | MUSB_DEV_MODE(musb); | ||
786 | musb_g_disconnect(musb); | ||
780 | break; | 787 | break; |
781 | case OTG_STATE_A_PERIPHERAL: | 788 | case OTG_STATE_A_PERIPHERAL: |
782 | musb_hnp_stop(musb); | 789 | musb_hnp_stop(musb); |
@@ -805,26 +812,35 @@ static irqreturn_t musb_stage2_irq(struct musb *musb, u8 int_usb, | |||
805 | otg_state_string(musb), devctl, power); | 812 | otg_state_string(musb), devctl, power); |
806 | handled = IRQ_HANDLED; | 813 | handled = IRQ_HANDLED; |
807 | 814 | ||
808 | switch (musb->xceiv.state) { | 815 | switch (musb->xceiv->state) { |
809 | #ifdef CONFIG_USB_MUSB_OTG | 816 | #ifdef CONFIG_USB_MUSB_OTG |
810 | case OTG_STATE_A_PERIPHERAL: | 817 | case OTG_STATE_A_PERIPHERAL: |
811 | /* | 818 | /* We also come here if the cable is removed, since |
812 | * We cannot stop HNP here, devctl BDEVICE might be | 819 | * this silicon doesn't report ID-no-longer-grounded. |
813 | * still set. | 820 | * |
821 | * We depend on T(a_wait_bcon) to shut us down, and | ||
822 | * hope users don't do anything dicey during this | ||
823 | * undesired detour through A_WAIT_BCON. | ||
814 | */ | 824 | */ |
825 | musb_hnp_stop(musb); | ||
826 | usb_hcd_resume_root_hub(musb_to_hcd(musb)); | ||
827 | musb_root_disconnect(musb); | ||
828 | musb_platform_try_idle(musb, jiffies | ||
829 | + msecs_to_jiffies(musb->a_wait_bcon | ||
830 | ? : OTG_TIME_A_WAIT_BCON)); | ||
815 | break; | 831 | break; |
816 | #endif | 832 | #endif |
817 | case OTG_STATE_B_PERIPHERAL: | 833 | case OTG_STATE_B_PERIPHERAL: |
818 | musb_g_suspend(musb); | 834 | musb_g_suspend(musb); |
819 | musb->is_active = is_otg_enabled(musb) | 835 | musb->is_active = is_otg_enabled(musb) |
820 | && musb->xceiv.gadget->b_hnp_enable; | 836 | && musb->xceiv->gadget->b_hnp_enable; |
821 | if (musb->is_active) { | 837 | if (musb->is_active) { |
822 | #ifdef CONFIG_USB_MUSB_OTG | 838 | #ifdef CONFIG_USB_MUSB_OTG |
823 | musb->xceiv.state = OTG_STATE_B_WAIT_ACON; | 839 | musb->xceiv->state = OTG_STATE_B_WAIT_ACON; |
824 | DBG(1, "HNP: Setting timer for b_ase0_brst\n"); | 840 | DBG(1, "HNP: Setting timer for b_ase0_brst\n"); |
825 | musb_otg_timer.data = (unsigned long)musb; | 841 | mod_timer(&musb->otg_timer, jiffies |
826 | mod_timer(&musb_otg_timer, jiffies | 842 | + msecs_to_jiffies( |
827 | + msecs_to_jiffies(TB_ASE0_BRST)); | 843 | OTG_TIME_B_ASE0_BRST)); |
828 | #endif | 844 | #endif |
829 | } | 845 | } |
830 | break; | 846 | break; |
@@ -834,9 +850,9 @@ static irqreturn_t musb_stage2_irq(struct musb *musb, u8 int_usb, | |||
834 | + msecs_to_jiffies(musb->a_wait_bcon)); | 850 | + msecs_to_jiffies(musb->a_wait_bcon)); |
835 | break; | 851 | break; |
836 | case OTG_STATE_A_HOST: | 852 | case OTG_STATE_A_HOST: |
837 | musb->xceiv.state = OTG_STATE_A_SUSPEND; | 853 | musb->xceiv->state = OTG_STATE_A_SUSPEND; |
838 | musb->is_active = is_otg_enabled(musb) | 854 | musb->is_active = is_otg_enabled(musb) |
839 | && musb->xceiv.host->b_hnp_enable; | 855 | && musb->xceiv->host->b_hnp_enable; |
840 | break; | 856 | break; |
841 | case OTG_STATE_B_HOST: | 857 | case OTG_STATE_B_HOST: |
842 | /* Transition to B_PERIPHERAL, see 6.8.2.6 p 44 */ | 858 | /* Transition to B_PERIPHERAL, see 6.8.2.6 p 44 */ |
@@ -1068,14 +1084,13 @@ static struct fifo_cfg __initdata mode_4_cfg[] = { | |||
1068 | { .hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 512, }, | 1084 | { .hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 512, }, |
1069 | { .hw_ep_num = 9, .style = FIFO_TX, .maxpacket = 512, }, | 1085 | { .hw_ep_num = 9, .style = FIFO_TX, .maxpacket = 512, }, |
1070 | { .hw_ep_num = 9, .style = FIFO_RX, .maxpacket = 512, }, | 1086 | { .hw_ep_num = 9, .style = FIFO_RX, .maxpacket = 512, }, |
1071 | { .hw_ep_num = 10, .style = FIFO_TX, .maxpacket = 512, }, | 1087 | { .hw_ep_num = 10, .style = FIFO_TX, .maxpacket = 256, }, |
1072 | { .hw_ep_num = 10, .style = FIFO_RX, .maxpacket = 512, }, | 1088 | { .hw_ep_num = 10, .style = FIFO_RX, .maxpacket = 64, }, |
1073 | { .hw_ep_num = 11, .style = FIFO_TX, .maxpacket = 512, }, | 1089 | { .hw_ep_num = 11, .style = FIFO_TX, .maxpacket = 256, }, |
1074 | { .hw_ep_num = 11, .style = FIFO_RX, .maxpacket = 512, }, | 1090 | { .hw_ep_num = 11, .style = FIFO_RX, .maxpacket = 64, }, |
1075 | { .hw_ep_num = 12, .style = FIFO_TX, .maxpacket = 512, }, | 1091 | { .hw_ep_num = 12, .style = FIFO_TX, .maxpacket = 256, }, |
1076 | { .hw_ep_num = 12, .style = FIFO_RX, .maxpacket = 512, }, | 1092 | { .hw_ep_num = 12, .style = FIFO_RX, .maxpacket = 64, }, |
1077 | { .hw_ep_num = 13, .style = FIFO_TX, .maxpacket = 512, }, | 1093 | { .hw_ep_num = 13, .style = FIFO_RXTX, .maxpacket = 4096, }, |
1078 | { .hw_ep_num = 13, .style = FIFO_RX, .maxpacket = 512, }, | ||
1079 | { .hw_ep_num = 14, .style = FIFO_RXTX, .maxpacket = 1024, }, | 1094 | { .hw_ep_num = 14, .style = FIFO_RXTX, .maxpacket = 1024, }, |
1080 | { .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, }, | 1095 | { .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, }, |
1081 | }; | 1096 | }; |
@@ -1335,11 +1350,11 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb) | |||
1335 | } | 1350 | } |
1336 | if (reg & MUSB_CONFIGDATA_HBRXE) { | 1351 | if (reg & MUSB_CONFIGDATA_HBRXE) { |
1337 | strcat(aInfo, ", HB-ISO Rx"); | 1352 | strcat(aInfo, ", HB-ISO Rx"); |
1338 | strcat(aInfo, " (X)"); /* no driver support */ | 1353 | musb->hb_iso_rx = true; |
1339 | } | 1354 | } |
1340 | if (reg & MUSB_CONFIGDATA_HBTXE) { | 1355 | if (reg & MUSB_CONFIGDATA_HBTXE) { |
1341 | strcat(aInfo, ", HB-ISO Tx"); | 1356 | strcat(aInfo, ", HB-ISO Tx"); |
1342 | strcat(aInfo, " (X)"); /* no driver support */ | 1357 | musb->hb_iso_tx = true; |
1343 | } | 1358 | } |
1344 | if (reg & MUSB_CONFIGDATA_SOFTCONE) | 1359 | if (reg & MUSB_CONFIGDATA_SOFTCONE) |
1345 | strcat(aInfo, ", SoftConn"); | 1360 | strcat(aInfo, ", SoftConn"); |
@@ -1481,13 +1496,7 @@ static irqreturn_t generic_interrupt(int irq, void *__hci) | |||
1481 | 1496 | ||
1482 | spin_unlock_irqrestore(&musb->lock, flags); | 1497 | spin_unlock_irqrestore(&musb->lock, flags); |
1483 | 1498 | ||
1484 | /* REVISIT we sometimes get spurious IRQs on g_ep0 | 1499 | return retval; |
1485 | * not clear why... | ||
1486 | */ | ||
1487 | if (retval != IRQ_HANDLED) | ||
1488 | DBG(5, "spurious?\n"); | ||
1489 | |||
1490 | return IRQ_HANDLED; | ||
1491 | } | 1500 | } |
1492 | 1501 | ||
1493 | #else | 1502 | #else |
@@ -1687,8 +1696,9 @@ musb_vbus_store(struct device *dev, struct device_attribute *attr, | |||
1687 | } | 1696 | } |
1688 | 1697 | ||
1689 | spin_lock_irqsave(&musb->lock, flags); | 1698 | spin_lock_irqsave(&musb->lock, flags); |
1690 | musb->a_wait_bcon = val; | 1699 | /* force T(a_wait_bcon) to be zero/unlimited *OR* valid */ |
1691 | if (musb->xceiv.state == OTG_STATE_A_WAIT_BCON) | 1700 | musb->a_wait_bcon = val ? max_t(int, val, OTG_TIME_A_WAIT_BCON) : 0 ; |
1701 | if (musb->xceiv->state == OTG_STATE_A_WAIT_BCON) | ||
1692 | musb->is_active = 0; | 1702 | musb->is_active = 0; |
1693 | musb_platform_try_idle(musb, jiffies + msecs_to_jiffies(val)); | 1703 | musb_platform_try_idle(musb, jiffies + msecs_to_jiffies(val)); |
1694 | spin_unlock_irqrestore(&musb->lock, flags); | 1704 | spin_unlock_irqrestore(&musb->lock, flags); |
@@ -1706,10 +1716,13 @@ musb_vbus_show(struct device *dev, struct device_attribute *attr, char *buf) | |||
1706 | 1716 | ||
1707 | spin_lock_irqsave(&musb->lock, flags); | 1717 | spin_lock_irqsave(&musb->lock, flags); |
1708 | val = musb->a_wait_bcon; | 1718 | val = musb->a_wait_bcon; |
1719 | /* FIXME get_vbus_status() is normally #defined as false... | ||
1720 | * and is effectively TUSB-specific. | ||
1721 | */ | ||
1709 | vbus = musb_platform_get_vbus_status(musb); | 1722 | vbus = musb_platform_get_vbus_status(musb); |
1710 | spin_unlock_irqrestore(&musb->lock, flags); | 1723 | spin_unlock_irqrestore(&musb->lock, flags); |
1711 | 1724 | ||
1712 | return sprintf(buf, "Vbus %s, timeout %lu\n", | 1725 | return sprintf(buf, "Vbus %s, timeout %lu msec\n", |
1713 | vbus ? "on" : "off", val); | 1726 | vbus ? "on" : "off", val); |
1714 | } | 1727 | } |
1715 | static DEVICE_ATTR(vbus, 0644, musb_vbus_show, musb_vbus_store); | 1728 | static DEVICE_ATTR(vbus, 0644, musb_vbus_show, musb_vbus_store); |
@@ -1749,8 +1762,8 @@ static void musb_irq_work(struct work_struct *data) | |||
1749 | struct musb *musb = container_of(data, struct musb, irq_work); | 1762 | struct musb *musb = container_of(data, struct musb, irq_work); |
1750 | static int old_state; | 1763 | static int old_state; |
1751 | 1764 | ||
1752 | if (musb->xceiv.state != old_state) { | 1765 | if (musb->xceiv->state != old_state) { |
1753 | old_state = musb->xceiv.state; | 1766 | old_state = musb->xceiv->state; |
1754 | sysfs_notify(&musb->controller->kobj, NULL, "mode"); | 1767 | sysfs_notify(&musb->controller->kobj, NULL, "mode"); |
1755 | } | 1768 | } |
1756 | } | 1769 | } |
@@ -1782,6 +1795,7 @@ allocate_instance(struct device *dev, | |||
1782 | hcd->uses_new_polling = 1; | 1795 | hcd->uses_new_polling = 1; |
1783 | 1796 | ||
1784 | musb->vbuserr_retry = VBUSERR_RETRY_COUNT; | 1797 | musb->vbuserr_retry = VBUSERR_RETRY_COUNT; |
1798 | musb->a_wait_bcon = OTG_TIME_A_WAIT_BCON; | ||
1785 | #else | 1799 | #else |
1786 | musb = kzalloc(sizeof *musb, GFP_KERNEL); | 1800 | musb = kzalloc(sizeof *musb, GFP_KERNEL); |
1787 | if (!musb) | 1801 | if (!musb) |
@@ -1847,7 +1861,7 @@ static void musb_free(struct musb *musb) | |||
1847 | } | 1861 | } |
1848 | 1862 | ||
1849 | #ifdef CONFIG_USB_MUSB_OTG | 1863 | #ifdef CONFIG_USB_MUSB_OTG |
1850 | put_device(musb->xceiv.dev); | 1864 | put_device(musb->xceiv->dev); |
1851 | #endif | 1865 | #endif |
1852 | 1866 | ||
1853 | #ifdef CONFIG_USB_MUSB_HDRC_HCD | 1867 | #ifdef CONFIG_USB_MUSB_HDRC_HCD |
@@ -1928,10 +1942,18 @@ bad_config: | |||
1928 | } | 1942 | } |
1929 | } | 1943 | } |
1930 | 1944 | ||
1931 | /* assume vbus is off */ | 1945 | /* The musb_platform_init() call: |
1932 | 1946 | * - adjusts musb->mregs and musb->isr if needed, | |
1933 | /* platform adjusts musb->mregs and musb->isr if needed, | 1947 | * - may initialize an integrated tranceiver |
1934 | * and activates clocks | 1948 | * - initializes musb->xceiv, usually by otg_get_transceiver() |
1949 | * - activates clocks. | ||
1950 | * - stops powering VBUS | ||
1951 | * - assigns musb->board_set_vbus if host mode is enabled | ||
1952 | * | ||
1953 | * There are various transciever configurations. Blackfin, | ||
1954 | * DaVinci, TUSB60x0, and others integrate them. OMAP3 uses | ||
1955 | * external/discrete ones in various flavors (twl4030 family, | ||
1956 | * isp1504, non-OTG, etc) mostly hooking up through ULPI. | ||
1935 | */ | 1957 | */ |
1936 | musb->isr = generic_interrupt; | 1958 | musb->isr = generic_interrupt; |
1937 | status = musb_platform_init(musb); | 1959 | status = musb_platform_init(musb); |
@@ -1968,6 +1990,10 @@ bad_config: | |||
1968 | if (status < 0) | 1990 | if (status < 0) |
1969 | goto fail2; | 1991 | goto fail2; |
1970 | 1992 | ||
1993 | #ifdef CONFIG_USB_OTG | ||
1994 | setup_timer(&musb->otg_timer, musb_otg_timer_func, (unsigned long) musb); | ||
1995 | #endif | ||
1996 | |||
1971 | /* Init IRQ workqueue before request_irq */ | 1997 | /* Init IRQ workqueue before request_irq */ |
1972 | INIT_WORK(&musb->irq_work, musb_irq_work); | 1998 | INIT_WORK(&musb->irq_work, musb_irq_work); |
1973 | 1999 | ||
@@ -1999,17 +2025,17 @@ bad_config: | |||
1999 | ? "DMA" : "PIO", | 2025 | ? "DMA" : "PIO", |
2000 | musb->nIrq); | 2026 | musb->nIrq); |
2001 | 2027 | ||
2002 | #ifdef CONFIG_USB_MUSB_HDRC_HCD | 2028 | /* host side needs more setup */ |
2003 | /* host side needs more setup, except for no-host modes */ | 2029 | if (is_host_enabled(musb)) { |
2004 | if (musb->board_mode != MUSB_PERIPHERAL) { | ||
2005 | struct usb_hcd *hcd = musb_to_hcd(musb); | 2030 | struct usb_hcd *hcd = musb_to_hcd(musb); |
2006 | 2031 | ||
2007 | if (musb->board_mode == MUSB_OTG) | 2032 | otg_set_host(musb->xceiv, &hcd->self); |
2033 | |||
2034 | if (is_otg_enabled(musb)) | ||
2008 | hcd->self.otg_port = 1; | 2035 | hcd->self.otg_port = 1; |
2009 | musb->xceiv.host = &hcd->self; | 2036 | musb->xceiv->host = &hcd->self; |
2010 | hcd->power_budget = 2 * (plat->power ? : 250); | 2037 | hcd->power_budget = 2 * (plat->power ? : 250); |
2011 | } | 2038 | } |
2012 | #endif /* CONFIG_USB_MUSB_HDRC_HCD */ | ||
2013 | 2039 | ||
2014 | /* For the host-only role, we can activate right away. | 2040 | /* For the host-only role, we can activate right away. |
2015 | * (We expect the ID pin to be forcibly grounded!!) | 2041 | * (We expect the ID pin to be forcibly grounded!!) |
@@ -2017,8 +2043,8 @@ bad_config: | |||
2017 | */ | 2043 | */ |
2018 | if (!is_otg_enabled(musb) && is_host_enabled(musb)) { | 2044 | if (!is_otg_enabled(musb) && is_host_enabled(musb)) { |
2019 | MUSB_HST_MODE(musb); | 2045 | MUSB_HST_MODE(musb); |
2020 | musb->xceiv.default_a = 1; | 2046 | musb->xceiv->default_a = 1; |
2021 | musb->xceiv.state = OTG_STATE_A_IDLE; | 2047 | musb->xceiv->state = OTG_STATE_A_IDLE; |
2022 | 2048 | ||
2023 | status = usb_add_hcd(musb_to_hcd(musb), -1, 0); | 2049 | status = usb_add_hcd(musb_to_hcd(musb), -1, 0); |
2024 | if (status) | 2050 | if (status) |
@@ -2033,8 +2059,8 @@ bad_config: | |||
2033 | 2059 | ||
2034 | } else /* peripheral is enabled */ { | 2060 | } else /* peripheral is enabled */ { |
2035 | MUSB_DEV_MODE(musb); | 2061 | MUSB_DEV_MODE(musb); |
2036 | musb->xceiv.default_a = 0; | 2062 | musb->xceiv->default_a = 0; |
2037 | musb->xceiv.state = OTG_STATE_B_IDLE; | 2063 | musb->xceiv->state = OTG_STATE_B_IDLE; |
2038 | 2064 | ||
2039 | status = musb_gadget_setup(musb); | 2065 | status = musb_gadget_setup(musb); |
2040 | if (status) | 2066 | if (status) |