diff options
Diffstat (limited to 'drivers/usb/musb/davinci.h')
-rw-r--r-- | drivers/usb/musb/davinci.h | 100 |
1 files changed, 100 insertions, 0 deletions
diff --git a/drivers/usb/musb/davinci.h b/drivers/usb/musb/davinci.h new file mode 100644 index 000000000000..7fb6238e270f --- /dev/null +++ b/drivers/usb/musb/davinci.h | |||
@@ -0,0 +1,100 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2005-2006 by Texas Instruments | ||
3 | * | ||
4 | * The Inventra Controller Driver for Linux is free software; you | ||
5 | * can redistribute it and/or modify it under the terms of the GNU | ||
6 | * General Public License version 2 as published by the Free Software | ||
7 | * Foundation. | ||
8 | */ | ||
9 | |||
10 | #ifndef __MUSB_HDRDF_H__ | ||
11 | #define __MUSB_HDRDF_H__ | ||
12 | |||
13 | /* | ||
14 | * DaVinci-specific definitions | ||
15 | */ | ||
16 | |||
17 | /* Integrated highspeed/otg PHY */ | ||
18 | #define USBPHY_CTL_PADDR (DAVINCI_SYSTEM_MODULE_BASE + 0x34) | ||
19 | #define USBPHY_PHYCLKGD (1 << 8) | ||
20 | #define USBPHY_SESNDEN (1 << 7) /* v(sess_end) comparator */ | ||
21 | #define USBPHY_VBDTCTEN (1 << 6) /* v(bus) comparator */ | ||
22 | #define USBPHY_PHYPLLON (1 << 4) /* override pll suspend */ | ||
23 | #define USBPHY_CLKO1SEL (1 << 3) | ||
24 | #define USBPHY_OSCPDWN (1 << 2) | ||
25 | #define USBPHY_PHYPDWN (1 << 0) | ||
26 | |||
27 | /* For now include usb OTG module registers here */ | ||
28 | #define DAVINCI_USB_VERSION_REG 0x00 | ||
29 | #define DAVINCI_USB_CTRL_REG 0x04 | ||
30 | #define DAVINCI_USB_STAT_REG 0x08 | ||
31 | #define DAVINCI_RNDIS_REG 0x10 | ||
32 | #define DAVINCI_AUTOREQ_REG 0x14 | ||
33 | #define DAVINCI_USB_INT_SOURCE_REG 0x20 | ||
34 | #define DAVINCI_USB_INT_SET_REG 0x24 | ||
35 | #define DAVINCI_USB_INT_SRC_CLR_REG 0x28 | ||
36 | #define DAVINCI_USB_INT_MASK_REG 0x2c | ||
37 | #define DAVINCI_USB_INT_MASK_SET_REG 0x30 | ||
38 | #define DAVINCI_USB_INT_MASK_CLR_REG 0x34 | ||
39 | #define DAVINCI_USB_INT_SRC_MASKED_REG 0x38 | ||
40 | #define DAVINCI_USB_EOI_REG 0x3c | ||
41 | #define DAVINCI_USB_EOI_INTVEC 0x40 | ||
42 | |||
43 | /* BEGIN CPPI-generic (?) */ | ||
44 | |||
45 | /* CPPI related registers */ | ||
46 | #define DAVINCI_TXCPPI_CTRL_REG 0x80 | ||
47 | #define DAVINCI_TXCPPI_TEAR_REG 0x84 | ||
48 | #define DAVINCI_CPPI_EOI_REG 0x88 | ||
49 | #define DAVINCI_CPPI_INTVEC_REG 0x8c | ||
50 | #define DAVINCI_TXCPPI_MASKED_REG 0x90 | ||
51 | #define DAVINCI_TXCPPI_RAW_REG 0x94 | ||
52 | #define DAVINCI_TXCPPI_INTENAB_REG 0x98 | ||
53 | #define DAVINCI_TXCPPI_INTCLR_REG 0x9c | ||
54 | |||
55 | #define DAVINCI_RXCPPI_CTRL_REG 0xC0 | ||
56 | #define DAVINCI_RXCPPI_MASKED_REG 0xD0 | ||
57 | #define DAVINCI_RXCPPI_RAW_REG 0xD4 | ||
58 | #define DAVINCI_RXCPPI_INTENAB_REG 0xD8 | ||
59 | #define DAVINCI_RXCPPI_INTCLR_REG 0xDC | ||
60 | |||
61 | #define DAVINCI_RXCPPI_BUFCNT0_REG 0xE0 | ||
62 | #define DAVINCI_RXCPPI_BUFCNT1_REG 0xE4 | ||
63 | #define DAVINCI_RXCPPI_BUFCNT2_REG 0xE8 | ||
64 | #define DAVINCI_RXCPPI_BUFCNT3_REG 0xEC | ||
65 | |||
66 | /* CPPI state RAM entries */ | ||
67 | #define DAVINCI_CPPI_STATERAM_BASE_OFFSET 0x100 | ||
68 | |||
69 | #define DAVINCI_TXCPPI_STATERAM_OFFSET(chnum) \ | ||
70 | (DAVINCI_CPPI_STATERAM_BASE_OFFSET + ((chnum) * 0x40)) | ||
71 | #define DAVINCI_RXCPPI_STATERAM_OFFSET(chnum) \ | ||
72 | (DAVINCI_CPPI_STATERAM_BASE_OFFSET + 0x20 + ((chnum) * 0x40)) | ||
73 | |||
74 | /* CPPI masks */ | ||
75 | #define DAVINCI_DMA_CTRL_ENABLE 1 | ||
76 | #define DAVINCI_DMA_CTRL_DISABLE 0 | ||
77 | |||
78 | #define DAVINCI_DMA_ALL_CHANNELS_ENABLE 0xF | ||
79 | #define DAVINCI_DMA_ALL_CHANNELS_DISABLE 0xF | ||
80 | |||
81 | /* END CPPI-generic (?) */ | ||
82 | |||
83 | #define DAVINCI_USB_TX_ENDPTS_MASK 0x1f /* ep0 + 4 tx */ | ||
84 | #define DAVINCI_USB_RX_ENDPTS_MASK 0x1e /* 4 rx */ | ||
85 | |||
86 | #define DAVINCI_USB_USBINT_SHIFT 16 | ||
87 | #define DAVINCI_USB_TXINT_SHIFT 0 | ||
88 | #define DAVINCI_USB_RXINT_SHIFT 8 | ||
89 | |||
90 | #define DAVINCI_INTR_DRVVBUS 0x0100 | ||
91 | |||
92 | #define DAVINCI_USB_USBINT_MASK 0x01ff0000 /* 8 Mentor, DRVVBUS */ | ||
93 | #define DAVINCI_USB_TXINT_MASK \ | ||
94 | (DAVINCI_USB_TX_ENDPTS_MASK << DAVINCI_USB_TXINT_SHIFT) | ||
95 | #define DAVINCI_USB_RXINT_MASK \ | ||
96 | (DAVINCI_USB_RX_ENDPTS_MASK << DAVINCI_USB_RXINT_SHIFT) | ||
97 | |||
98 | #define DAVINCI_BASE_OFFSET 0x400 | ||
99 | |||
100 | #endif /* __MUSB_HDRDF_H__ */ | ||