4 files changed, 62 insertions, 17 deletions

diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c
index 17cfb8a1131c..c30435499a02 100644
--- a/drivers/usb/host/ehci-omap.c
+++ b/drivers/usb/host/ehci-omap.c
@@ -281,14 +281,13 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev)
                 }
         }
 
+        /* Hold PHYs in reset while initializing EHCI controller */
         if (pdata->phy_reset) {
                 if (gpio_is_valid(pdata->reset_gpio_port[0]))
-                        gpio_request_one(pdata->reset_gpio_port[0],
-                                         GPIOF_OUT_INIT_LOW, "USB1 PHY reset");
+                        gpio_set_value_cansleep(pdata->reset_gpio_port[0], 0);
 
                 if (gpio_is_valid(pdata->reset_gpio_port[1]))
-                        gpio_request_one(pdata->reset_gpio_port[1],
-                                         GPIOF_OUT_INIT_LOW, "USB2 PHY reset");
+                        gpio_set_value_cansleep(pdata->reset_gpio_port[1], 0);
 
                 /* Hold the PHY in RESET for enough time till DIR is high */
                 udelay(10);
@@ -330,6 +329,11 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev)
         omap_ehci->hcs_params = readl(&omap_ehci->caps->hcs_params);
 
         ehci_reset(omap_ehci);
+        ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
+        if (ret) {
+                dev_err(dev, "failed to add hcd with err %d\n", ret);
+                goto err_add_hcd;
+        }
 
         if (pdata->phy_reset) {
                 /* Hold the PHY in RESET for enough time till
@@ -344,12 +348,6 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev)
                         gpio_set_value_cansleep(pdata->reset_gpio_port[1], 1);
         }
 
-        ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
-        if (ret) {
-                dev_err(dev, "failed to add hcd with err %d\n", ret);
-                goto err_add_hcd;
-        }
-
         /* root ports should always stay powered */
         ehci_port_power(omap_ehci, 1);
 
diff --git a/drivers/usb/host/xhci-hub.c b/drivers/usb/host/xhci-hub.c
index 2732ef660c5c..7b01094d7993 100644
--- a/drivers/usb/host/xhci-hub.c
+++ b/drivers/usb/host/xhci-hub.c
@@ -462,6 +462,42 @@ void xhci_test_and_clear_bit(struct xhci_hcd *xhci, __le32 __iomem **port_array,
         }
 }
 
+/* Updates Link Status for super Speed port */
+static void xhci_hub_report_link_state(u32 *status, u32 status_reg)
+{
+        u32 pls = status_reg & PORT_PLS_MASK;
+
+        /* resume state is a xHCI internal state.
+         * Do not report it to usb core.
+         */
+        if (pls == XDEV_RESUME)
+                return;
+
+        /* When the CAS bit is set then warm reset
+         * should be performed on port
+         */
+        if (status_reg & PORT_CAS) {
+                /* The CAS bit can be set while the port is
+                 * in any link state.
+                 * Only roothubs have CAS bit, so we
+                 * pretend to be in compliance mode
+                 * unless we're already in compliance
+                 * or the inactive state.
+                 */
+                if (pls != USB_SS_PORT_LS_COMP_MOD &&
+                    pls != USB_SS_PORT_LS_SS_INACTIVE) {
+                        pls = USB_SS_PORT_LS_COMP_MOD;
+                }
+                /* Return also connection bit -
+                 * hub state machine resets port
+                 * when this bit is set.
+                 */
+                pls |= USB_PORT_STAT_CONNECTION;
+        }
+        /* update status field */
+        *status |= pls;
+}
+
 int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
                 u16 wIndex, char *buf, u16 wLength)
 {
@@ -606,13 +642,9 @@ int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
                         else
                                 status |= USB_PORT_STAT_POWER;
                 }
-                /* Port Link State */
+                /* Update Port Link State for super speed ports*/
                 if (hcd->speed == HCD_USB3) {
-                        /* resume state is a xHCI internal state.
-                         * Do not report it to usb core.
-                         */
-                        if ((temp & PORT_PLS_MASK) != XDEV_RESUME)
-                                status |= (temp & PORT_PLS_MASK);
+                        xhci_hub_report_link_state(&status, temp);
                 }
                 if (bus_state->port_c_suspend & (1 << wIndex))
                         status |= 1 << USB_PORT_FEAT_C_SUSPEND;
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 23b4aefd1036..8275645889da 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -885,6 +885,17 @@ static void update_ring_for_set_deq_completion(struct xhci_hcd *xhci,
         num_trbs_free_temp = ep_ring->num_trbs_free;
         dequeue_temp = ep_ring->dequeue;
 
+        /* If we get two back-to-back stalls, and the first stalled transfer
+         * ends just before a link TRB, the dequeue pointer will be left on
+         * the link TRB by the code in the while loop.  So we have to update
+         * the dequeue pointer one segment further, or we'll jump off
+         * the segment into la-la-land.
+         */
+        if (last_trb(xhci, ep_ring, ep_ring->deq_seg, ep_ring->dequeue)) {
+                ep_ring->deq_seg = ep_ring->deq_seg->next;
+                ep_ring->dequeue = ep_ring->deq_seg->trbs;
+        }
+
         while (ep_ring->dequeue != dev->eps[ep_index].queued_deq_ptr) {
                 /* We have more usable TRBs */
                 ep_ring->num_trbs_free++;
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index de3d6e3e57be..55c0785810c9 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -341,7 +341,11 @@ struct xhci_op_regs {
 #define PORT_PLC        (1 << 22)
 /* port configure error change - port failed to configure its link partner */
 #define PORT_CEC        (1 << 23)
-/* bit 24 reserved */
+/* Cold Attach Status - xHC can set this bit to report device attached during
+ * Sx state. Warm port reset should be perfomed to clear this bit and move port
+ * to connected state.
+ */
+#define PORT_CAS        (1 << 24)
 /* wake on connect (enable) */
 #define PORT_WKCONN_E   (1 << 25)
 /* wake on disconnect (enable) */