diff options
Diffstat (limited to 'drivers/usb/host/xhci-ring.c')
-rw-r--r-- | drivers/usb/host/xhci-ring.c | 91 |
1 files changed, 51 insertions, 40 deletions
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index df558f6f84e3..3e8211c1ce5a 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c | |||
@@ -308,11 +308,8 @@ static int room_on_ring(struct xhci_hcd *xhci, struct xhci_ring *ring, | |||
308 | /* Ring the host controller doorbell after placing a command on the ring */ | 308 | /* Ring the host controller doorbell after placing a command on the ring */ |
309 | void xhci_ring_cmd_db(struct xhci_hcd *xhci) | 309 | void xhci_ring_cmd_db(struct xhci_hcd *xhci) |
310 | { | 310 | { |
311 | u32 temp; | ||
312 | |||
313 | xhci_dbg(xhci, "// Ding dong!\n"); | 311 | xhci_dbg(xhci, "// Ding dong!\n"); |
314 | temp = xhci_readl(xhci, &xhci->dba->doorbell[0]) & DB_MASK; | 312 | xhci_writel(xhci, DB_VALUE_HOST, &xhci->dba->doorbell[0]); |
315 | xhci_writel(xhci, temp | DB_TARGET_HOST, &xhci->dba->doorbell[0]); | ||
316 | /* Flush PCI posted writes */ | 313 | /* Flush PCI posted writes */ |
317 | xhci_readl(xhci, &xhci->dba->doorbell[0]); | 314 | xhci_readl(xhci, &xhci->dba->doorbell[0]); |
318 | } | 315 | } |
@@ -322,26 +319,24 @@ void xhci_ring_ep_doorbell(struct xhci_hcd *xhci, | |||
322 | unsigned int ep_index, | 319 | unsigned int ep_index, |
323 | unsigned int stream_id) | 320 | unsigned int stream_id) |
324 | { | 321 | { |
325 | struct xhci_virt_ep *ep; | ||
326 | unsigned int ep_state; | ||
327 | u32 field; | ||
328 | __u32 __iomem *db_addr = &xhci->dba->doorbell[slot_id]; | 322 | __u32 __iomem *db_addr = &xhci->dba->doorbell[slot_id]; |
323 | struct xhci_virt_ep *ep = &xhci->devs[slot_id]->eps[ep_index]; | ||
324 | unsigned int ep_state = ep->ep_state; | ||
329 | 325 | ||
330 | ep = &xhci->devs[slot_id]->eps[ep_index]; | ||
331 | ep_state = ep->ep_state; | ||
332 | /* Don't ring the doorbell for this endpoint if there are pending | 326 | /* Don't ring the doorbell for this endpoint if there are pending |
333 | * cancellations because the we don't want to interrupt processing. | 327 | * cancellations because we don't want to interrupt processing. |
334 | * We don't want to restart any stream rings if there's a set dequeue | 328 | * We don't want to restart any stream rings if there's a set dequeue |
335 | * pointer command pending because the device can choose to start any | 329 | * pointer command pending because the device can choose to start any |
336 | * stream once the endpoint is on the HW schedule. | 330 | * stream once the endpoint is on the HW schedule. |
337 | * FIXME - check all the stream rings for pending cancellations. | 331 | * FIXME - check all the stream rings for pending cancellations. |
338 | */ | 332 | */ |
339 | if (!(ep_state & EP_HALT_PENDING) && !(ep_state & SET_DEQ_PENDING) | 333 | if ((ep_state & EP_HALT_PENDING) || (ep_state & SET_DEQ_PENDING) || |
340 | && !(ep_state & EP_HALTED)) { | 334 | (ep_state & EP_HALTED)) |
341 | field = xhci_readl(xhci, db_addr) & DB_MASK; | 335 | return; |
342 | field |= EPI_TO_DB(ep_index) | STREAM_ID_TO_DB(stream_id); | 336 | xhci_writel(xhci, DB_VALUE(ep_index, stream_id), db_addr); |
343 | xhci_writel(xhci, field, db_addr); | 337 | /* The CPU has better things to do at this point than wait for a |
344 | } | 338 | * write-posting flush. It'll get there soon enough. |
339 | */ | ||
345 | } | 340 | } |
346 | 341 | ||
347 | /* Ring the doorbell for any rings with pending URBs */ | 342 | /* Ring the doorbell for any rings with pending URBs */ |
@@ -1188,7 +1183,7 @@ static void handle_port_status(struct xhci_hcd *xhci, | |||
1188 | 1183 | ||
1189 | addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS * (port_id - 1); | 1184 | addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS * (port_id - 1); |
1190 | temp = xhci_readl(xhci, addr); | 1185 | temp = xhci_readl(xhci, addr); |
1191 | if ((temp & PORT_CONNECT) && (hcd->state == HC_STATE_SUSPENDED)) { | 1186 | if (hcd->state == HC_STATE_SUSPENDED) { |
1192 | xhci_dbg(xhci, "resume root hub\n"); | 1187 | xhci_dbg(xhci, "resume root hub\n"); |
1193 | usb_hcd_resume_root_hub(hcd); | 1188 | usb_hcd_resume_root_hub(hcd); |
1194 | } | 1189 | } |
@@ -1710,8 +1705,7 @@ static int process_bulk_intr_td(struct xhci_hcd *xhci, struct xhci_td *td, | |||
1710 | /* Others already handled above */ | 1705 | /* Others already handled above */ |
1711 | break; | 1706 | break; |
1712 | } | 1707 | } |
1713 | dev_dbg(&td->urb->dev->dev, | 1708 | xhci_dbg(xhci, "ep %#x - asked for %d bytes, " |
1714 | "ep %#x - asked for %d bytes, " | ||
1715 | "%d bytes untransferred\n", | 1709 | "%d bytes untransferred\n", |
1716 | td->urb->ep->desc.bEndpointAddress, | 1710 | td->urb->ep->desc.bEndpointAddress, |
1717 | td->urb->transfer_buffer_length, | 1711 | td->urb->transfer_buffer_length, |
@@ -2389,7 +2383,8 @@ static unsigned int count_sg_trbs_needed(struct xhci_hcd *xhci, struct urb *urb) | |||
2389 | } | 2383 | } |
2390 | xhci_dbg(xhci, "\n"); | 2384 | xhci_dbg(xhci, "\n"); |
2391 | if (!in_interrupt()) | 2385 | if (!in_interrupt()) |
2392 | dev_dbg(&urb->dev->dev, "ep %#x - urb len = %d, sglist used, num_trbs = %d\n", | 2386 | xhci_dbg(xhci, "ep %#x - urb len = %d, sglist used, " |
2387 | "num_trbs = %d\n", | ||
2393 | urb->ep->desc.bEndpointAddress, | 2388 | urb->ep->desc.bEndpointAddress, |
2394 | urb->transfer_buffer_length, | 2389 | urb->transfer_buffer_length, |
2395 | num_trbs); | 2390 | num_trbs); |
@@ -2414,14 +2409,17 @@ static void check_trb_math(struct urb *urb, int num_trbs, int running_total) | |||
2414 | 2409 | ||
2415 | static void giveback_first_trb(struct xhci_hcd *xhci, int slot_id, | 2410 | static void giveback_first_trb(struct xhci_hcd *xhci, int slot_id, |
2416 | unsigned int ep_index, unsigned int stream_id, int start_cycle, | 2411 | unsigned int ep_index, unsigned int stream_id, int start_cycle, |
2417 | struct xhci_generic_trb *start_trb, struct xhci_td *td) | 2412 | struct xhci_generic_trb *start_trb) |
2418 | { | 2413 | { |
2419 | /* | 2414 | /* |
2420 | * Pass all the TRBs to the hardware at once and make sure this write | 2415 | * Pass all the TRBs to the hardware at once and make sure this write |
2421 | * isn't reordered. | 2416 | * isn't reordered. |
2422 | */ | 2417 | */ |
2423 | wmb(); | 2418 | wmb(); |
2424 | start_trb->field[3] |= start_cycle; | 2419 | if (start_cycle) |
2420 | start_trb->field[3] |= start_cycle; | ||
2421 | else | ||
2422 | start_trb->field[3] &= ~0x1; | ||
2425 | xhci_ring_ep_doorbell(xhci, slot_id, ep_index, stream_id); | 2423 | xhci_ring_ep_doorbell(xhci, slot_id, ep_index, stream_id); |
2426 | } | 2424 | } |
2427 | 2425 | ||
@@ -2449,7 +2447,7 @@ int xhci_queue_intr_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2449 | * to set the polling interval (once the API is added). | 2447 | * to set the polling interval (once the API is added). |
2450 | */ | 2448 | */ |
2451 | if (xhci_interval != ep_interval) { | 2449 | if (xhci_interval != ep_interval) { |
2452 | if (!printk_ratelimit()) | 2450 | if (printk_ratelimit()) |
2453 | dev_dbg(&urb->dev->dev, "Driver uses different interval" | 2451 | dev_dbg(&urb->dev->dev, "Driver uses different interval" |
2454 | " (%d microframe%s) than xHCI " | 2452 | " (%d microframe%s) than xHCI " |
2455 | "(%d microframe%s)\n", | 2453 | "(%d microframe%s)\n", |
@@ -2551,9 +2549,11 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2551 | u32 remainder = 0; | 2549 | u32 remainder = 0; |
2552 | 2550 | ||
2553 | /* Don't change the cycle bit of the first TRB until later */ | 2551 | /* Don't change the cycle bit of the first TRB until later */ |
2554 | if (first_trb) | 2552 | if (first_trb) { |
2555 | first_trb = false; | 2553 | first_trb = false; |
2556 | else | 2554 | if (start_cycle == 0) |
2555 | field |= 0x1; | ||
2556 | } else | ||
2557 | field |= ep_ring->cycle_state; | 2557 | field |= ep_ring->cycle_state; |
2558 | 2558 | ||
2559 | /* Chain all the TRBs together; clear the chain bit in the last | 2559 | /* Chain all the TRBs together; clear the chain bit in the last |
@@ -2625,7 +2625,7 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2625 | 2625 | ||
2626 | check_trb_math(urb, num_trbs, running_total); | 2626 | check_trb_math(urb, num_trbs, running_total); |
2627 | giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id, | 2627 | giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id, |
2628 | start_cycle, start_trb, td); | 2628 | start_cycle, start_trb); |
2629 | return 0; | 2629 | return 0; |
2630 | } | 2630 | } |
2631 | 2631 | ||
@@ -2671,7 +2671,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2671 | /* FIXME: this doesn't deal with URB_ZERO_PACKET - need one more */ | 2671 | /* FIXME: this doesn't deal with URB_ZERO_PACKET - need one more */ |
2672 | 2672 | ||
2673 | if (!in_interrupt()) | 2673 | if (!in_interrupt()) |
2674 | dev_dbg(&urb->dev->dev, "ep %#x - urb len = %#x (%d), addr = %#llx, num_trbs = %d\n", | 2674 | xhci_dbg(xhci, "ep %#x - urb len = %#x (%d), " |
2675 | "addr = %#llx, num_trbs = %d\n", | ||
2675 | urb->ep->desc.bEndpointAddress, | 2676 | urb->ep->desc.bEndpointAddress, |
2676 | urb->transfer_buffer_length, | 2677 | urb->transfer_buffer_length, |
2677 | urb->transfer_buffer_length, | 2678 | urb->transfer_buffer_length, |
@@ -2711,9 +2712,11 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2711 | field = 0; | 2712 | field = 0; |
2712 | 2713 | ||
2713 | /* Don't change the cycle bit of the first TRB until later */ | 2714 | /* Don't change the cycle bit of the first TRB until later */ |
2714 | if (first_trb) | 2715 | if (first_trb) { |
2715 | first_trb = false; | 2716 | first_trb = false; |
2716 | else | 2717 | if (start_cycle == 0) |
2718 | field |= 0x1; | ||
2719 | } else | ||
2717 | field |= ep_ring->cycle_state; | 2720 | field |= ep_ring->cycle_state; |
2718 | 2721 | ||
2719 | /* Chain all the TRBs together; clear the chain bit in the last | 2722 | /* Chain all the TRBs together; clear the chain bit in the last |
@@ -2757,7 +2760,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2757 | 2760 | ||
2758 | check_trb_math(urb, num_trbs, running_total); | 2761 | check_trb_math(urb, num_trbs, running_total); |
2759 | giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id, | 2762 | giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id, |
2760 | start_cycle, start_trb, td); | 2763 | start_cycle, start_trb); |
2761 | return 0; | 2764 | return 0; |
2762 | } | 2765 | } |
2763 | 2766 | ||
@@ -2818,13 +2821,17 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2818 | /* Queue setup TRB - see section 6.4.1.2.1 */ | 2821 | /* Queue setup TRB - see section 6.4.1.2.1 */ |
2819 | /* FIXME better way to translate setup_packet into two u32 fields? */ | 2822 | /* FIXME better way to translate setup_packet into two u32 fields? */ |
2820 | setup = (struct usb_ctrlrequest *) urb->setup_packet; | 2823 | setup = (struct usb_ctrlrequest *) urb->setup_packet; |
2824 | field = 0; | ||
2825 | field |= TRB_IDT | TRB_TYPE(TRB_SETUP); | ||
2826 | if (start_cycle == 0) | ||
2827 | field |= 0x1; | ||
2821 | queue_trb(xhci, ep_ring, false, true, | 2828 | queue_trb(xhci, ep_ring, false, true, |
2822 | /* FIXME endianness is probably going to bite my ass here. */ | 2829 | /* FIXME endianness is probably going to bite my ass here. */ |
2823 | setup->bRequestType | setup->bRequest << 8 | setup->wValue << 16, | 2830 | setup->bRequestType | setup->bRequest << 8 | setup->wValue << 16, |
2824 | setup->wIndex | setup->wLength << 16, | 2831 | setup->wIndex | setup->wLength << 16, |
2825 | TRB_LEN(8) | TRB_INTR_TARGET(0), | 2832 | TRB_LEN(8) | TRB_INTR_TARGET(0), |
2826 | /* Immediate data in pointer */ | 2833 | /* Immediate data in pointer */ |
2827 | TRB_IDT | TRB_TYPE(TRB_SETUP)); | 2834 | field); |
2828 | 2835 | ||
2829 | /* If there's data, queue data TRBs */ | 2836 | /* If there's data, queue data TRBs */ |
2830 | field = 0; | 2837 | field = 0; |
@@ -2859,7 +2866,7 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2859 | field | TRB_IOC | TRB_TYPE(TRB_STATUS) | ep_ring->cycle_state); | 2866 | field | TRB_IOC | TRB_TYPE(TRB_STATUS) | ep_ring->cycle_state); |
2860 | 2867 | ||
2861 | giveback_first_trb(xhci, slot_id, ep_index, 0, | 2868 | giveback_first_trb(xhci, slot_id, ep_index, 0, |
2862 | start_cycle, start_trb, td); | 2869 | start_cycle, start_trb); |
2863 | return 0; | 2870 | return 0; |
2864 | } | 2871 | } |
2865 | 2872 | ||
@@ -2900,6 +2907,7 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2900 | int running_total, trb_buff_len, td_len, td_remain_len, ret; | 2907 | int running_total, trb_buff_len, td_len, td_remain_len, ret; |
2901 | u64 start_addr, addr; | 2908 | u64 start_addr, addr; |
2902 | int i, j; | 2909 | int i, j; |
2910 | bool more_trbs_coming; | ||
2903 | 2911 | ||
2904 | ep_ring = xhci->devs[slot_id]->eps[ep_index].ring; | 2912 | ep_ring = xhci->devs[slot_id]->eps[ep_index].ring; |
2905 | 2913 | ||
@@ -2910,7 +2918,7 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2910 | } | 2918 | } |
2911 | 2919 | ||
2912 | if (!in_interrupt()) | 2920 | if (!in_interrupt()) |
2913 | dev_dbg(&urb->dev->dev, "ep %#x - urb len = %#x (%d)," | 2921 | xhci_dbg(xhci, "ep %#x - urb len = %#x (%d)," |
2914 | " addr = %#llx, num_tds = %d\n", | 2922 | " addr = %#llx, num_tds = %d\n", |
2915 | urb->ep->desc.bEndpointAddress, | 2923 | urb->ep->desc.bEndpointAddress, |
2916 | urb->transfer_buffer_length, | 2924 | urb->transfer_buffer_length, |
@@ -2950,7 +2958,10 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2950 | field |= TRB_TYPE(TRB_ISOC); | 2958 | field |= TRB_TYPE(TRB_ISOC); |
2951 | /* Assume URB_ISO_ASAP is set */ | 2959 | /* Assume URB_ISO_ASAP is set */ |
2952 | field |= TRB_SIA; | 2960 | field |= TRB_SIA; |
2953 | if (i > 0) | 2961 | if (i == 0) { |
2962 | if (start_cycle == 0) | ||
2963 | field |= 0x1; | ||
2964 | } else | ||
2954 | field |= ep_ring->cycle_state; | 2965 | field |= ep_ring->cycle_state; |
2955 | first_trb = false; | 2966 | first_trb = false; |
2956 | } else { | 2967 | } else { |
@@ -2965,9 +2976,11 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2965 | */ | 2976 | */ |
2966 | if (j < trbs_per_td - 1) { | 2977 | if (j < trbs_per_td - 1) { |
2967 | field |= TRB_CHAIN; | 2978 | field |= TRB_CHAIN; |
2979 | more_trbs_coming = true; | ||
2968 | } else { | 2980 | } else { |
2969 | td->last_trb = ep_ring->enqueue; | 2981 | td->last_trb = ep_ring->enqueue; |
2970 | field |= TRB_IOC; | 2982 | field |= TRB_IOC; |
2983 | more_trbs_coming = false; | ||
2971 | } | 2984 | } |
2972 | 2985 | ||
2973 | /* Calculate TRB length */ | 2986 | /* Calculate TRB length */ |
@@ -2980,7 +2993,7 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
2980 | length_field = TRB_LEN(trb_buff_len) | | 2993 | length_field = TRB_LEN(trb_buff_len) | |
2981 | remainder | | 2994 | remainder | |
2982 | TRB_INTR_TARGET(0); | 2995 | TRB_INTR_TARGET(0); |
2983 | queue_trb(xhci, ep_ring, false, false, | 2996 | queue_trb(xhci, ep_ring, false, more_trbs_coming, |
2984 | lower_32_bits(addr), | 2997 | lower_32_bits(addr), |
2985 | upper_32_bits(addr), | 2998 | upper_32_bits(addr), |
2986 | length_field, | 2999 | length_field, |
@@ -3003,10 +3016,8 @@ static int xhci_queue_isoc_tx(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
3003 | } | 3016 | } |
3004 | } | 3017 | } |
3005 | 3018 | ||
3006 | wmb(); | 3019 | giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id, |
3007 | start_trb->field[3] |= start_cycle; | 3020 | start_cycle, start_trb); |
3008 | |||
3009 | xhci_ring_ep_doorbell(xhci, slot_id, ep_index, urb->stream_id); | ||
3010 | return 0; | 3021 | return 0; |
3011 | } | 3022 | } |
3012 | 3023 | ||
@@ -3064,7 +3075,7 @@ int xhci_queue_isoc_tx_prepare(struct xhci_hcd *xhci, gfp_t mem_flags, | |||
3064 | * to set the polling interval (once the API is added). | 3075 | * to set the polling interval (once the API is added). |
3065 | */ | 3076 | */ |
3066 | if (xhci_interval != ep_interval) { | 3077 | if (xhci_interval != ep_interval) { |
3067 | if (!printk_ratelimit()) | 3078 | if (printk_ratelimit()) |
3068 | dev_dbg(&urb->dev->dev, "Driver uses different interval" | 3079 | dev_dbg(&urb->dev->dev, "Driver uses different interval" |
3069 | " (%d microframe%s) than xHCI " | 3080 | " (%d microframe%s) than xHCI " |
3070 | "(%d microframe%s)\n", | 3081 | "(%d microframe%s)\n", |