1 files changed, 7 insertions, 12 deletions

diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 947b009009f1..f2407b2e8a99 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -130,7 +130,7 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver,
         }
 
         /* Enable USB controller, 83xx or 8536 */
-        if (pdata->have_sysif_regs)
+        if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6)
                 setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
 
         /* Don't need to set host mode here. It will be done by tdi_reset() */
@@ -232,15 +232,9 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
         case FSL_USB2_PHY_ULPI:
                 if (pdata->have_sysif_regs && pdata->controller_ver) {
                         /* controller version 1.6 or above */
+                        clrbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
                         setbits32(non_ehci + FSL_SOC_USB_CTRL,
-                                        ULPI_PHY_CLK_SEL);
-                        /*
-                         * Due to controller issue of PHY_CLK_VALID in ULPI
-                         * mode, we set USB_CTRL_USB_EN before checking
-                         * PHY_CLK_VALID, otherwise PHY_CLK_VALID doesn't work.
-                         */
-                        clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
-                                        UTMI_PHY_EN, USB_CTRL_USB_EN);
+                                ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN);
                 }
                 portsc |= PORT_PTS_ULPI;
                 break;
@@ -270,8 +264,9 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
         if (pdata->have_sysif_regs && pdata->controller_ver &&
             (phy_mode == FSL_USB2_PHY_ULPI)) {
                 /* check PHY_CLK_VALID to get phy clk valid */
-                if (!spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
-                                PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0)) {
+                if (!(spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
+                                PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0) ||
+                                in_be32(non_ehci + FSL_SOC_USB_PRICTRL))) {
                         printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
                         return -EINVAL;
                 }
@@ -669,7 +664,7 @@ static const struct hc_driver ehci_fsl_hc_driver = {
          * generic hardware linkage
          */
         .irq = ehci_irq,
-        .flags = HCD_USB2 | HCD_MEMORY | HCD_BH,
+        .flags = HCD_USB2 | HCD_MEMORY,
 
         /*
          * basic lifecycle operations