diff options
Diffstat (limited to 'drivers/usb/dwc3/gadget.c')
-rw-r--r-- | drivers/usb/dwc3/gadget.c | 440 |
1 files changed, 310 insertions, 130 deletions
diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 25dbd8614e72..a696bde53222 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c | |||
@@ -65,6 +65,22 @@ void dwc3_map_buffer_to_dma(struct dwc3_request *req) | |||
65 | return; | 65 | return; |
66 | } | 66 | } |
67 | 67 | ||
68 | if (req->request.num_sgs) { | ||
69 | int mapped; | ||
70 | |||
71 | mapped = dma_map_sg(dwc->dev, req->request.sg, | ||
72 | req->request.num_sgs, | ||
73 | req->direction ? DMA_TO_DEVICE | ||
74 | : DMA_FROM_DEVICE); | ||
75 | if (mapped < 0) { | ||
76 | dev_err(dwc->dev, "failed to map SGs\n"); | ||
77 | return; | ||
78 | } | ||
79 | |||
80 | req->request.num_mapped_sgs = mapped; | ||
81 | return; | ||
82 | } | ||
83 | |||
68 | if (req->request.dma == DMA_ADDR_INVALID) { | 84 | if (req->request.dma == DMA_ADDR_INVALID) { |
69 | req->request.dma = dma_map_single(dwc->dev, req->request.buf, | 85 | req->request.dma = dma_map_single(dwc->dev, req->request.buf, |
70 | req->request.length, req->direction | 86 | req->request.length, req->direction |
@@ -82,6 +98,17 @@ void dwc3_unmap_buffer_from_dma(struct dwc3_request *req) | |||
82 | return; | 98 | return; |
83 | } | 99 | } |
84 | 100 | ||
101 | if (req->request.num_mapped_sgs) { | ||
102 | req->request.dma = DMA_ADDR_INVALID; | ||
103 | dma_unmap_sg(dwc->dev, req->request.sg, | ||
104 | req->request.num_sgs, | ||
105 | req->direction ? DMA_TO_DEVICE | ||
106 | : DMA_FROM_DEVICE); | ||
107 | |||
108 | req->request.num_mapped_sgs = 0; | ||
109 | return; | ||
110 | } | ||
111 | |||
85 | if (req->mapped) { | 112 | if (req->mapped) { |
86 | dma_unmap_single(dwc->dev, req->request.dma, | 113 | dma_unmap_single(dwc->dev, req->request.dma, |
87 | req->request.length, req->direction | 114 | req->request.length, req->direction |
@@ -97,7 +124,11 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req, | |||
97 | struct dwc3 *dwc = dep->dwc; | 124 | struct dwc3 *dwc = dep->dwc; |
98 | 125 | ||
99 | if (req->queued) { | 126 | if (req->queued) { |
100 | dep->busy_slot++; | 127 | if (req->request.num_mapped_sgs) |
128 | dep->busy_slot += req->request.num_mapped_sgs; | ||
129 | else | ||
130 | dep->busy_slot++; | ||
131 | |||
101 | /* | 132 | /* |
102 | * Skip LINK TRB. We can't use req->trb and check for | 133 | * Skip LINK TRB. We can't use req->trb and check for |
103 | * DWC3_TRBCTL_LINK_TRB because it points the TRB we just | 134 | * DWC3_TRBCTL_LINK_TRB because it points the TRB we just |
@@ -108,6 +139,7 @@ void dwc3_gadget_giveback(struct dwc3_ep *dep, struct dwc3_request *req, | |||
108 | dep->busy_slot++; | 139 | dep->busy_slot++; |
109 | } | 140 | } |
110 | list_del(&req->list); | 141 | list_del(&req->list); |
142 | req->trb = NULL; | ||
111 | 143 | ||
112 | if (req->request.status == -EINPROGRESS) | 144 | if (req->request.status == -EINPROGRESS) |
113 | req->request.status = status; | 145 | req->request.status = status; |
@@ -251,7 +283,8 @@ static int dwc3_gadget_start_config(struct dwc3 *dwc, struct dwc3_ep *dep) | |||
251 | } | 283 | } |
252 | 284 | ||
253 | static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep, | 285 | static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep, |
254 | const struct usb_endpoint_descriptor *desc) | 286 | const struct usb_endpoint_descriptor *desc, |
287 | const struct usb_ss_ep_comp_descriptor *comp_desc) | ||
255 | { | 288 | { |
256 | struct dwc3_gadget_ep_cmd_params params; | 289 | struct dwc3_gadget_ep_cmd_params params; |
257 | 290 | ||
@@ -264,7 +297,7 @@ static int dwc3_gadget_set_ep_config(struct dwc3 *dwc, struct dwc3_ep *dep, | |||
264 | params.param1 = DWC3_DEPCFG_XFER_COMPLETE_EN | 297 | params.param1 = DWC3_DEPCFG_XFER_COMPLETE_EN |
265 | | DWC3_DEPCFG_XFER_NOT_READY_EN; | 298 | | DWC3_DEPCFG_XFER_NOT_READY_EN; |
266 | 299 | ||
267 | if (usb_endpoint_xfer_bulk(desc) && dep->endpoint.max_streams) { | 300 | if (usb_ss_max_streams(comp_desc) && usb_endpoint_xfer_bulk(desc)) { |
268 | params.param1 |= DWC3_DEPCFG_STREAM_CAPABLE | 301 | params.param1 |= DWC3_DEPCFG_STREAM_CAPABLE |
269 | | DWC3_DEPCFG_STREAM_EVENT_EN; | 302 | | DWC3_DEPCFG_STREAM_EVENT_EN; |
270 | dep->stream_capable = true; | 303 | dep->stream_capable = true; |
@@ -317,7 +350,8 @@ static int dwc3_gadget_set_xfer_resource(struct dwc3 *dwc, struct dwc3_ep *dep) | |||
317 | * Caller should take care of locking | 350 | * Caller should take care of locking |
318 | */ | 351 | */ |
319 | static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep, | 352 | static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep, |
320 | const struct usb_endpoint_descriptor *desc) | 353 | const struct usb_endpoint_descriptor *desc, |
354 | const struct usb_ss_ep_comp_descriptor *comp_desc) | ||
321 | { | 355 | { |
322 | struct dwc3 *dwc = dep->dwc; | 356 | struct dwc3 *dwc = dep->dwc; |
323 | u32 reg; | 357 | u32 reg; |
@@ -329,7 +363,7 @@ static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep, | |||
329 | return ret; | 363 | return ret; |
330 | } | 364 | } |
331 | 365 | ||
332 | ret = dwc3_gadget_set_ep_config(dwc, dep, desc); | 366 | ret = dwc3_gadget_set_ep_config(dwc, dep, desc, comp_desc); |
333 | if (ret) | 367 | if (ret) |
334 | return ret; | 368 | return ret; |
335 | 369 | ||
@@ -343,6 +377,7 @@ static int __dwc3_gadget_ep_enable(struct dwc3_ep *dep, | |||
343 | return ret; | 377 | return ret; |
344 | 378 | ||
345 | dep->desc = desc; | 379 | dep->desc = desc; |
380 | dep->comp_desc = comp_desc; | ||
346 | dep->type = usb_endpoint_type(desc); | 381 | dep->type = usb_endpoint_type(desc); |
347 | dep->flags |= DWC3_EP_ENABLED; | 382 | dep->flags |= DWC3_EP_ENABLED; |
348 | 383 | ||
@@ -405,6 +440,7 @@ static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep) | |||
405 | 440 | ||
406 | dep->stream_capable = false; | 441 | dep->stream_capable = false; |
407 | dep->desc = NULL; | 442 | dep->desc = NULL; |
443 | dep->comp_desc = NULL; | ||
408 | dep->type = 0; | 444 | dep->type = 0; |
409 | dep->flags = 0; | 445 | dep->flags = 0; |
410 | 446 | ||
@@ -473,7 +509,7 @@ static int dwc3_gadget_ep_enable(struct usb_ep *ep, | |||
473 | dev_vdbg(dwc->dev, "Enabling %s\n", dep->name); | 509 | dev_vdbg(dwc->dev, "Enabling %s\n", dep->name); |
474 | 510 | ||
475 | spin_lock_irqsave(&dwc->lock, flags); | 511 | spin_lock_irqsave(&dwc->lock, flags); |
476 | ret = __dwc3_gadget_ep_enable(dep, desc); | 512 | ret = __dwc3_gadget_ep_enable(dep, desc, ep->comp_desc); |
477 | spin_unlock_irqrestore(&dwc->lock, flags); | 513 | spin_unlock_irqrestore(&dwc->lock, flags); |
478 | 514 | ||
479 | return ret; | 515 | return ret; |
@@ -539,6 +575,85 @@ static void dwc3_gadget_ep_free_request(struct usb_ep *ep, | |||
539 | kfree(req); | 575 | kfree(req); |
540 | } | 576 | } |
541 | 577 | ||
578 | /** | ||
579 | * dwc3_prepare_one_trb - setup one TRB from one request | ||
580 | * @dep: endpoint for which this request is prepared | ||
581 | * @req: dwc3_request pointer | ||
582 | */ | ||
583 | static void dwc3_prepare_one_trb(struct dwc3_ep *dep, | ||
584 | struct dwc3_request *req, dma_addr_t dma, | ||
585 | unsigned length, unsigned last, unsigned chain) | ||
586 | { | ||
587 | struct dwc3 *dwc = dep->dwc; | ||
588 | struct dwc3_trb_hw *trb_hw; | ||
589 | struct dwc3_trb trb; | ||
590 | |||
591 | unsigned int cur_slot; | ||
592 | |||
593 | dev_vdbg(dwc->dev, "%s: req %p dma %08llx length %d%s%s\n", | ||
594 | dep->name, req, (unsigned long long) dma, | ||
595 | length, last ? " last" : "", | ||
596 | chain ? " chain" : ""); | ||
597 | |||
598 | trb_hw = &dep->trb_pool[dep->free_slot & DWC3_TRB_MASK]; | ||
599 | cur_slot = dep->free_slot; | ||
600 | dep->free_slot++; | ||
601 | |||
602 | /* Skip the LINK-TRB on ISOC */ | ||
603 | if (((cur_slot & DWC3_TRB_MASK) == DWC3_TRB_NUM - 1) && | ||
604 | usb_endpoint_xfer_isoc(dep->desc)) | ||
605 | return; | ||
606 | |||
607 | memset(&trb, 0, sizeof(trb)); | ||
608 | if (!req->trb) { | ||
609 | dwc3_gadget_move_request_queued(req); | ||
610 | req->trb = trb_hw; | ||
611 | req->trb_dma = dwc3_trb_dma_offset(dep, trb_hw); | ||
612 | } | ||
613 | |||
614 | if (usb_endpoint_xfer_isoc(dep->desc)) { | ||
615 | trb.isp_imi = true; | ||
616 | trb.csp = true; | ||
617 | } else { | ||
618 | trb.chn = chain; | ||
619 | trb.lst = last; | ||
620 | } | ||
621 | |||
622 | if (usb_endpoint_xfer_bulk(dep->desc) && dep->stream_capable) | ||
623 | trb.sid_sofn = req->request.stream_id; | ||
624 | |||
625 | switch (usb_endpoint_type(dep->desc)) { | ||
626 | case USB_ENDPOINT_XFER_CONTROL: | ||
627 | trb.trbctl = DWC3_TRBCTL_CONTROL_SETUP; | ||
628 | break; | ||
629 | |||
630 | case USB_ENDPOINT_XFER_ISOC: | ||
631 | trb.trbctl = DWC3_TRBCTL_ISOCHRONOUS_FIRST; | ||
632 | |||
633 | /* IOC every DWC3_TRB_NUM / 4 so we can refill */ | ||
634 | if (!(cur_slot % (DWC3_TRB_NUM / 4))) | ||
635 | trb.ioc = last; | ||
636 | break; | ||
637 | |||
638 | case USB_ENDPOINT_XFER_BULK: | ||
639 | case USB_ENDPOINT_XFER_INT: | ||
640 | trb.trbctl = DWC3_TRBCTL_NORMAL; | ||
641 | break; | ||
642 | default: | ||
643 | /* | ||
644 | * This is only possible with faulty memory because we | ||
645 | * checked it already :) | ||
646 | */ | ||
647 | BUG(); | ||
648 | } | ||
649 | |||
650 | trb.length = length; | ||
651 | trb.bplh = dma; | ||
652 | trb.hwo = true; | ||
653 | |||
654 | dwc3_trb_to_hw(&trb, trb_hw); | ||
655 | } | ||
656 | |||
542 | /* | 657 | /* |
543 | * dwc3_prepare_trbs - setup TRBs from requests | 658 | * dwc3_prepare_trbs - setup TRBs from requests |
544 | * @dep: endpoint for which requests are being prepared | 659 | * @dep: endpoint for which requests are being prepared |
@@ -548,18 +663,17 @@ static void dwc3_gadget_ep_free_request(struct usb_ep *ep, | |||
548 | * transfers. The functions returns once there are not more TRBs available or | 663 | * transfers. The functions returns once there are not more TRBs available or |
549 | * it run out of requests. | 664 | * it run out of requests. |
550 | */ | 665 | */ |
551 | static struct dwc3_request *dwc3_prepare_trbs(struct dwc3_ep *dep, | 666 | static void dwc3_prepare_trbs(struct dwc3_ep *dep, bool starting) |
552 | bool starting) | ||
553 | { | 667 | { |
554 | struct dwc3_request *req, *n, *ret = NULL; | 668 | struct dwc3_request *req, *n; |
555 | struct dwc3_trb_hw *trb_hw; | ||
556 | struct dwc3_trb trb; | ||
557 | u32 trbs_left; | 669 | u32 trbs_left; |
670 | unsigned int last_one = 0; | ||
558 | 671 | ||
559 | BUILD_BUG_ON_NOT_POWER_OF_2(DWC3_TRB_NUM); | 672 | BUILD_BUG_ON_NOT_POWER_OF_2(DWC3_TRB_NUM); |
560 | 673 | ||
561 | /* the first request must not be queued */ | 674 | /* the first request must not be queued */ |
562 | trbs_left = (dep->busy_slot - dep->free_slot) & DWC3_TRB_MASK; | 675 | trbs_left = (dep->busy_slot - dep->free_slot) & DWC3_TRB_MASK; |
676 | |||
563 | /* | 677 | /* |
564 | * if busy & slot are equal than it is either full or empty. If we are | 678 | * if busy & slot are equal than it is either full or empty. If we are |
565 | * starting to proceed requests then we are empty. Otherwise we ar | 679 | * starting to proceed requests then we are empty. Otherwise we ar |
@@ -567,7 +681,7 @@ static struct dwc3_request *dwc3_prepare_trbs(struct dwc3_ep *dep, | |||
567 | */ | 681 | */ |
568 | if (!trbs_left) { | 682 | if (!trbs_left) { |
569 | if (!starting) | 683 | if (!starting) |
570 | return NULL; | 684 | return; |
571 | trbs_left = DWC3_TRB_NUM; | 685 | trbs_left = DWC3_TRB_NUM; |
572 | /* | 686 | /* |
573 | * In case we start from scratch, we queue the ISOC requests | 687 | * In case we start from scratch, we queue the ISOC requests |
@@ -591,94 +705,62 @@ static struct dwc3_request *dwc3_prepare_trbs(struct dwc3_ep *dep, | |||
591 | 705 | ||
592 | /* The last TRB is a link TRB, not used for xfer */ | 706 | /* The last TRB is a link TRB, not used for xfer */ |
593 | if ((trbs_left <= 1) && usb_endpoint_xfer_isoc(dep->desc)) | 707 | if ((trbs_left <= 1) && usb_endpoint_xfer_isoc(dep->desc)) |
594 | return NULL; | 708 | return; |
595 | 709 | ||
596 | list_for_each_entry_safe(req, n, &dep->request_list, list) { | 710 | list_for_each_entry_safe(req, n, &dep->request_list, list) { |
597 | unsigned int last_one = 0; | 711 | unsigned length; |
598 | unsigned int cur_slot; | 712 | dma_addr_t dma; |
599 | 713 | ||
600 | trb_hw = &dep->trb_pool[dep->free_slot & DWC3_TRB_MASK]; | 714 | if (req->request.num_mapped_sgs > 0) { |
601 | cur_slot = dep->free_slot; | 715 | struct usb_request *request = &req->request; |
602 | dep->free_slot++; | 716 | struct scatterlist *sg = request->sg; |
717 | struct scatterlist *s; | ||
718 | int i; | ||
603 | 719 | ||
604 | /* Skip the LINK-TRB on ISOC */ | 720 | for_each_sg(sg, s, request->num_mapped_sgs, i) { |
605 | if (((cur_slot & DWC3_TRB_MASK) == DWC3_TRB_NUM - 1) && | 721 | unsigned chain = true; |
606 | usb_endpoint_xfer_isoc(dep->desc)) | ||
607 | continue; | ||
608 | 722 | ||
609 | dwc3_gadget_move_request_queued(req); | 723 | length = sg_dma_len(s); |
610 | memset(&trb, 0, sizeof(trb)); | 724 | dma = sg_dma_address(s); |
611 | trbs_left--; | ||
612 | 725 | ||
613 | /* Is our TRB pool empty? */ | 726 | if (i == (request->num_mapped_sgs - 1) |
614 | if (!trbs_left) | 727 | || sg_is_last(s)) { |
615 | last_one = 1; | 728 | last_one = true; |
616 | /* Is this the last request? */ | 729 | chain = false; |
617 | if (list_empty(&dep->request_list)) | 730 | } |
618 | last_one = 1; | ||
619 | 731 | ||
620 | /* | 732 | trbs_left--; |
621 | * FIXME we shouldn't need to set LST bit always but we are | 733 | if (!trbs_left) |
622 | * facing some weird problem with the Hardware where it doesn't | 734 | last_one = true; |
623 | * complete even though it has been previously started. | ||
624 | * | ||
625 | * While we're debugging the problem, as a workaround to | ||
626 | * multiple TRBs handling, use only one TRB at a time. | ||
627 | */ | ||
628 | last_one = 1; | ||
629 | 735 | ||
630 | req->trb = trb_hw; | 736 | if (last_one) |
631 | if (!ret) | 737 | chain = false; |
632 | ret = req; | ||
633 | 738 | ||
634 | trb.bplh = req->request.dma; | 739 | dwc3_prepare_one_trb(dep, req, dma, length, |
740 | last_one, chain); | ||
635 | 741 | ||
636 | if (usb_endpoint_xfer_isoc(dep->desc)) { | 742 | if (last_one) |
637 | trb.isp_imi = true; | 743 | break; |
638 | trb.csp = true; | 744 | } |
639 | } else { | 745 | } else { |
640 | trb.lst = last_one; | 746 | dma = req->request.dma; |
641 | } | 747 | length = req->request.length; |
748 | trbs_left--; | ||
642 | 749 | ||
643 | if (usb_endpoint_xfer_bulk(dep->desc) && dep->stream_capable) | 750 | if (!trbs_left) |
644 | trb.sid_sofn = req->request.stream_id; | 751 | last_one = 1; |
645 | |||
646 | switch (usb_endpoint_type(dep->desc)) { | ||
647 | case USB_ENDPOINT_XFER_CONTROL: | ||
648 | trb.trbctl = DWC3_TRBCTL_CONTROL_SETUP; | ||
649 | break; | ||
650 | 752 | ||
651 | case USB_ENDPOINT_XFER_ISOC: | 753 | /* Is this the last request? */ |
652 | trb.trbctl = DWC3_TRBCTL_ISOCHRONOUS_FIRST; | 754 | if (list_is_last(&req->list, &dep->request_list)) |
755 | last_one = 1; | ||
653 | 756 | ||
654 | /* IOC every DWC3_TRB_NUM / 4 so we can refill */ | 757 | dwc3_prepare_one_trb(dep, req, dma, length, |
655 | if (!(cur_slot % (DWC3_TRB_NUM / 4))) | 758 | last_one, false); |
656 | trb.ioc = last_one; | ||
657 | break; | ||
658 | 759 | ||
659 | case USB_ENDPOINT_XFER_BULK: | 760 | if (last_one) |
660 | case USB_ENDPOINT_XFER_INT: | 761 | break; |
661 | trb.trbctl = DWC3_TRBCTL_NORMAL; | ||
662 | break; | ||
663 | default: | ||
664 | /* | ||
665 | * This is only possible with faulty memory because we | ||
666 | * checked it already :) | ||
667 | */ | ||
668 | BUG(); | ||
669 | } | 762 | } |
670 | |||
671 | trb.length = req->request.length; | ||
672 | trb.hwo = true; | ||
673 | |||
674 | dwc3_trb_to_hw(&trb, trb_hw); | ||
675 | req->trb_dma = dwc3_trb_dma_offset(dep, trb_hw); | ||
676 | |||
677 | if (last_one) | ||
678 | break; | ||
679 | } | 763 | } |
680 | |||
681 | return ret; | ||
682 | } | 764 | } |
683 | 765 | ||
684 | static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param, | 766 | static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param, |
@@ -707,11 +789,13 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param, | |||
707 | /* req points to the first request which will be sent */ | 789 | /* req points to the first request which will be sent */ |
708 | req = next_request(&dep->req_queued); | 790 | req = next_request(&dep->req_queued); |
709 | } else { | 791 | } else { |
792 | dwc3_prepare_trbs(dep, start_new); | ||
793 | |||
710 | /* | 794 | /* |
711 | * req points to the first request where HWO changed | 795 | * req points to the first request where HWO changed |
712 | * from 0 to 1 | 796 | * from 0 to 1 |
713 | */ | 797 | */ |
714 | req = dwc3_prepare_trbs(dep, start_new); | 798 | req = next_request(&dep->req_queued); |
715 | } | 799 | } |
716 | if (!req) { | 800 | if (!req) { |
717 | dep->flags |= DWC3_EP_PENDING_REQUEST; | 801 | dep->flags |= DWC3_EP_PENDING_REQUEST; |
@@ -745,8 +829,9 @@ static int __dwc3_gadget_kick_transfer(struct dwc3_ep *dep, u16 cmd_param, | |||
745 | dep->flags |= DWC3_EP_BUSY; | 829 | dep->flags |= DWC3_EP_BUSY; |
746 | dep->res_trans_idx = dwc3_gadget_ep_get_transfer_index(dwc, | 830 | dep->res_trans_idx = dwc3_gadget_ep_get_transfer_index(dwc, |
747 | dep->number); | 831 | dep->number); |
748 | if (!dep->res_trans_idx) | 832 | |
749 | printk_once(KERN_ERR "%s() res_trans_idx is invalid\n", __func__); | 833 | WARN_ON_ONCE(!dep->res_trans_idx); |
834 | |||
750 | return 0; | 835 | return 0; |
751 | } | 836 | } |
752 | 837 | ||
@@ -1155,35 +1240,9 @@ static int dwc3_gadget_start(struct usb_gadget *g, | |||
1155 | dwc->gadget_driver = driver; | 1240 | dwc->gadget_driver = driver; |
1156 | dwc->gadget.dev.driver = &driver->driver; | 1241 | dwc->gadget.dev.driver = &driver->driver; |
1157 | 1242 | ||
1158 | reg = dwc3_readl(dwc->regs, DWC3_GCTL); | ||
1159 | |||
1160 | reg &= ~DWC3_GCTL_SCALEDOWN(3); | ||
1161 | reg &= ~DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_OTG); | ||
1162 | reg &= ~DWC3_GCTL_DISSCRAMBLE; | ||
1163 | reg |= DWC3_GCTL_PRTCAPDIR(DWC3_GCTL_PRTCAP_DEVICE); | ||
1164 | |||
1165 | switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams0)) { | ||
1166 | case DWC3_GHWPARAMS1_EN_PWROPT_CLK: | ||
1167 | reg &= ~DWC3_GCTL_DSBLCLKGTNG; | ||
1168 | break; | ||
1169 | default: | ||
1170 | dev_dbg(dwc->dev, "No power optimization available\n"); | ||
1171 | } | ||
1172 | |||
1173 | /* | ||
1174 | * WORKAROUND: DWC3 revisions <1.90a have a bug | ||
1175 | * when The device fails to connect at SuperSpeed | ||
1176 | * and falls back to high-speed mode which causes | ||
1177 | * the device to enter in a Connect/Disconnect loop | ||
1178 | */ | ||
1179 | if (dwc->revision < DWC3_REVISION_190A) | ||
1180 | reg |= DWC3_GCTL_U2RSTECN; | ||
1181 | |||
1182 | dwc3_writel(dwc->regs, DWC3_GCTL, reg); | ||
1183 | |||
1184 | reg = dwc3_readl(dwc->regs, DWC3_DCFG); | 1243 | reg = dwc3_readl(dwc->regs, DWC3_DCFG); |
1185 | reg &= ~(DWC3_DCFG_SPEED_MASK); | 1244 | reg &= ~(DWC3_DCFG_SPEED_MASK); |
1186 | reg |= DWC3_DCFG_SUPERSPEED; | 1245 | reg |= dwc->maximum_speed; |
1187 | dwc3_writel(dwc->regs, DWC3_DCFG, reg); | 1246 | dwc3_writel(dwc->regs, DWC3_DCFG, reg); |
1188 | 1247 | ||
1189 | dwc->start_config_issued = false; | 1248 | dwc->start_config_issued = false; |
@@ -1192,14 +1251,14 @@ static int dwc3_gadget_start(struct usb_gadget *g, | |||
1192 | dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512); | 1251 | dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512); |
1193 | 1252 | ||
1194 | dep = dwc->eps[0]; | 1253 | dep = dwc->eps[0]; |
1195 | ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc); | 1254 | ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL); |
1196 | if (ret) { | 1255 | if (ret) { |
1197 | dev_err(dwc->dev, "failed to enable %s\n", dep->name); | 1256 | dev_err(dwc->dev, "failed to enable %s\n", dep->name); |
1198 | goto err0; | 1257 | goto err0; |
1199 | } | 1258 | } |
1200 | 1259 | ||
1201 | dep = dwc->eps[1]; | 1260 | dep = dwc->eps[1]; |
1202 | ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc); | 1261 | ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL); |
1203 | if (ret) { | 1262 | if (ret) { |
1204 | dev_err(dwc->dev, "failed to enable %s\n", dep->name); | 1263 | dev_err(dwc->dev, "failed to enable %s\n", dep->name); |
1205 | goto err1; | 1264 | goto err1; |
@@ -1290,11 +1349,10 @@ static int __devinit dwc3_gadget_init_endpoints(struct dwc3 *dwc) | |||
1290 | &dwc->gadget.ep_list); | 1349 | &dwc->gadget.ep_list); |
1291 | 1350 | ||
1292 | ret = dwc3_alloc_trb_pool(dep); | 1351 | ret = dwc3_alloc_trb_pool(dep); |
1293 | if (ret) { | 1352 | if (ret) |
1294 | dev_err(dwc->dev, "%s: failed to allocate TRB pool\n", dep->name); | ||
1295 | return ret; | 1353 | return ret; |
1296 | } | ||
1297 | } | 1354 | } |
1355 | |||
1298 | INIT_LIST_HEAD(&dep->request_list); | 1356 | INIT_LIST_HEAD(&dep->request_list); |
1299 | INIT_LIST_HEAD(&dep->req_queued); | 1357 | INIT_LIST_HEAD(&dep->req_queued); |
1300 | } | 1358 | } |
@@ -1334,8 +1392,10 @@ static int dwc3_cleanup_done_reqs(struct dwc3 *dwc, struct dwc3_ep *dep, | |||
1334 | 1392 | ||
1335 | do { | 1393 | do { |
1336 | req = next_request(&dep->req_queued); | 1394 | req = next_request(&dep->req_queued); |
1337 | if (!req) | 1395 | if (!req) { |
1338 | break; | 1396 | WARN_ON_ONCE(1); |
1397 | return 1; | ||
1398 | } | ||
1339 | 1399 | ||
1340 | dwc3_trb_to_nat(req->trb, &trb); | 1400 | dwc3_trb_to_nat(req->trb, &trb); |
1341 | 1401 | ||
@@ -1400,6 +1460,31 @@ static void dwc3_endpoint_transfer_complete(struct dwc3 *dwc, | |||
1400 | dep->flags &= ~DWC3_EP_BUSY; | 1460 | dep->flags &= ~DWC3_EP_BUSY; |
1401 | dep->res_trans_idx = 0; | 1461 | dep->res_trans_idx = 0; |
1402 | } | 1462 | } |
1463 | |||
1464 | /* | ||
1465 | * WORKAROUND: This is the 2nd half of U1/U2 -> U0 workaround. | ||
1466 | * See dwc3_gadget_linksts_change_interrupt() for 1st half. | ||
1467 | */ | ||
1468 | if (dwc->revision < DWC3_REVISION_183A) { | ||
1469 | u32 reg; | ||
1470 | int i; | ||
1471 | |||
1472 | for (i = 0; i < DWC3_ENDPOINTS_NUM; i++) { | ||
1473 | struct dwc3_ep *dep = dwc->eps[i]; | ||
1474 | |||
1475 | if (!(dep->flags & DWC3_EP_ENABLED)) | ||
1476 | continue; | ||
1477 | |||
1478 | if (!list_empty(&dep->req_queued)) | ||
1479 | return; | ||
1480 | } | ||
1481 | |||
1482 | reg = dwc3_readl(dwc->regs, DWC3_DCTL); | ||
1483 | reg |= dwc->u1u2; | ||
1484 | dwc3_writel(dwc->regs, DWC3_DCTL, reg); | ||
1485 | |||
1486 | dwc->u1u2 = 0; | ||
1487 | } | ||
1403 | } | 1488 | } |
1404 | 1489 | ||
1405 | static void dwc3_gadget_start_isoc(struct dwc3 *dwc, | 1490 | static void dwc3_gadget_start_isoc(struct dwc3 *dwc, |
@@ -1639,6 +1724,7 @@ static void dwc3_gadget_disconnect_interrupt(struct dwc3 *dwc) | |||
1639 | dwc->start_config_issued = false; | 1724 | dwc->start_config_issued = false; |
1640 | 1725 | ||
1641 | dwc->gadget.speed = USB_SPEED_UNKNOWN; | 1726 | dwc->gadget.speed = USB_SPEED_UNKNOWN; |
1727 | dwc->setup_packet_pending = false; | ||
1642 | } | 1728 | } |
1643 | 1729 | ||
1644 | static void dwc3_gadget_usb3_phy_power(struct dwc3 *dwc, int on) | 1730 | static void dwc3_gadget_usb3_phy_power(struct dwc3 *dwc, int on) |
@@ -1675,6 +1761,40 @@ static void dwc3_gadget_reset_interrupt(struct dwc3 *dwc) | |||
1675 | 1761 | ||
1676 | dev_vdbg(dwc->dev, "%s\n", __func__); | 1762 | dev_vdbg(dwc->dev, "%s\n", __func__); |
1677 | 1763 | ||
1764 | /* | ||
1765 | * WORKAROUND: DWC3 revisions <1.88a have an issue which | ||
1766 | * would cause a missing Disconnect Event if there's a | ||
1767 | * pending Setup Packet in the FIFO. | ||
1768 | * | ||
1769 | * There's no suggested workaround on the official Bug | ||
1770 | * report, which states that "unless the driver/application | ||
1771 | * is doing any special handling of a disconnect event, | ||
1772 | * there is no functional issue". | ||
1773 | * | ||
1774 | * Unfortunately, it turns out that we _do_ some special | ||
1775 | * handling of a disconnect event, namely complete all | ||
1776 | * pending transfers, notify gadget driver of the | ||
1777 | * disconnection, and so on. | ||
1778 | * | ||
1779 | * Our suggested workaround is to follow the Disconnect | ||
1780 | * Event steps here, instead, based on a setup_packet_pending | ||
1781 | * flag. Such flag gets set whenever we have a XferNotReady | ||
1782 | * event on EP0 and gets cleared on XferComplete for the | ||
1783 | * same endpoint. | ||
1784 | * | ||
1785 | * Refers to: | ||
1786 | * | ||
1787 | * STAR#9000466709: RTL: Device : Disconnect event not | ||
1788 | * generated if setup packet pending in FIFO | ||
1789 | */ | ||
1790 | if (dwc->revision < DWC3_REVISION_188A) { | ||
1791 | if (dwc->setup_packet_pending) | ||
1792 | dwc3_gadget_disconnect_interrupt(dwc); | ||
1793 | } | ||
1794 | |||
1795 | /* after reset -> Default State */ | ||
1796 | dwc->dev_state = DWC3_DEFAULT_STATE; | ||
1797 | |||
1678 | /* Enable PHYs */ | 1798 | /* Enable PHYs */ |
1679 | dwc3_gadget_usb2_phy_power(dwc, true); | 1799 | dwc3_gadget_usb2_phy_power(dwc, true); |
1680 | dwc3_gadget_usb3_phy_power(dwc, true); | 1800 | dwc3_gadget_usb3_phy_power(dwc, true); |
@@ -1755,6 +1875,22 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc) | |||
1755 | 1875 | ||
1756 | switch (speed) { | 1876 | switch (speed) { |
1757 | case DWC3_DCFG_SUPERSPEED: | 1877 | case DWC3_DCFG_SUPERSPEED: |
1878 | /* | ||
1879 | * WORKAROUND: DWC3 revisions <1.90a have an issue which | ||
1880 | * would cause a missing USB3 Reset event. | ||
1881 | * | ||
1882 | * In such situations, we should force a USB3 Reset | ||
1883 | * event by calling our dwc3_gadget_reset_interrupt() | ||
1884 | * routine. | ||
1885 | * | ||
1886 | * Refers to: | ||
1887 | * | ||
1888 | * STAR#9000483510: RTL: SS : USB3 reset event may | ||
1889 | * not be generated always when the link enters poll | ||
1890 | */ | ||
1891 | if (dwc->revision < DWC3_REVISION_190A) | ||
1892 | dwc3_gadget_reset_interrupt(dwc); | ||
1893 | |||
1758 | dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512); | 1894 | dwc3_gadget_ep0_desc.wMaxPacketSize = cpu_to_le16(512); |
1759 | dwc->gadget.ep0->maxpacket = 512; | 1895 | dwc->gadget.ep0->maxpacket = 512; |
1760 | dwc->gadget.speed = USB_SPEED_SUPER; | 1896 | dwc->gadget.speed = USB_SPEED_SUPER; |
@@ -1781,14 +1917,14 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc) | |||
1781 | dwc3_gadget_disable_phy(dwc, dwc->gadget.speed); | 1917 | dwc3_gadget_disable_phy(dwc, dwc->gadget.speed); |
1782 | 1918 | ||
1783 | dep = dwc->eps[0]; | 1919 | dep = dwc->eps[0]; |
1784 | ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc); | 1920 | ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL); |
1785 | if (ret) { | 1921 | if (ret) { |
1786 | dev_err(dwc->dev, "failed to enable %s\n", dep->name); | 1922 | dev_err(dwc->dev, "failed to enable %s\n", dep->name); |
1787 | return; | 1923 | return; |
1788 | } | 1924 | } |
1789 | 1925 | ||
1790 | dep = dwc->eps[1]; | 1926 | dep = dwc->eps[1]; |
1791 | ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc); | 1927 | ret = __dwc3_gadget_ep_enable(dep, &dwc3_gadget_ep0_desc, NULL); |
1792 | if (ret) { | 1928 | if (ret) { |
1793 | dev_err(dwc->dev, "failed to enable %s\n", dep->name); | 1929 | dev_err(dwc->dev, "failed to enable %s\n", dep->name); |
1794 | return; | 1930 | return; |
@@ -1818,8 +1954,55 @@ static void dwc3_gadget_wakeup_interrupt(struct dwc3 *dwc) | |||
1818 | static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc, | 1954 | static void dwc3_gadget_linksts_change_interrupt(struct dwc3 *dwc, |
1819 | unsigned int evtinfo) | 1955 | unsigned int evtinfo) |
1820 | { | 1956 | { |
1821 | /* The fith bit says SuperSpeed yes or no. */ | 1957 | enum dwc3_link_state next = evtinfo & DWC3_LINK_STATE_MASK; |
1822 | dwc->link_state = evtinfo & DWC3_LINK_STATE_MASK; | 1958 | |
1959 | /* | ||
1960 | * WORKAROUND: DWC3 Revisions <1.83a have an issue which, depending | ||
1961 | * on the link partner, the USB session might do multiple entry/exit | ||
1962 | * of low power states before a transfer takes place. | ||
1963 | * | ||
1964 | * Due to this problem, we might experience lower throughput. The | ||
1965 | * suggested workaround is to disable DCTL[12:9] bits if we're | ||
1966 | * transitioning from U1/U2 to U0 and enable those bits again | ||
1967 | * after a transfer completes and there are no pending transfers | ||
1968 | * on any of the enabled endpoints. | ||
1969 | * | ||
1970 | * This is the first half of that workaround. | ||
1971 | * | ||
1972 | * Refers to: | ||
1973 | * | ||
1974 | * STAR#9000446952: RTL: Device SS : if U1/U2 ->U0 takes >128us | ||
1975 | * core send LGO_Ux entering U0 | ||
1976 | */ | ||
1977 | if (dwc->revision < DWC3_REVISION_183A) { | ||
1978 | if (next == DWC3_LINK_STATE_U0) { | ||
1979 | u32 u1u2; | ||
1980 | u32 reg; | ||
1981 | |||
1982 | switch (dwc->link_state) { | ||
1983 | case DWC3_LINK_STATE_U1: | ||
1984 | case DWC3_LINK_STATE_U2: | ||
1985 | reg = dwc3_readl(dwc->regs, DWC3_DCTL); | ||
1986 | u1u2 = reg & (DWC3_DCTL_INITU2ENA | ||
1987 | | DWC3_DCTL_ACCEPTU2ENA | ||
1988 | | DWC3_DCTL_INITU1ENA | ||
1989 | | DWC3_DCTL_ACCEPTU1ENA); | ||
1990 | |||
1991 | if (!dwc->u1u2) | ||
1992 | dwc->u1u2 = reg & u1u2; | ||
1993 | |||
1994 | reg &= ~u1u2; | ||
1995 | |||
1996 | dwc3_writel(dwc->regs, DWC3_DCTL, reg); | ||
1997 | break; | ||
1998 | default: | ||
1999 | /* do nothing */ | ||
2000 | break; | ||
2001 | } | ||
2002 | } | ||
2003 | } | ||
2004 | |||
2005 | dwc->link_state = next; | ||
1823 | 2006 | ||
1824 | dev_vdbg(dwc->dev, "%s link %d\n", __func__, dwc->link_state); | 2007 | dev_vdbg(dwc->dev, "%s link %d\n", __func__, dwc->link_state); |
1825 | } | 2008 | } |
@@ -1925,7 +2108,7 @@ static irqreturn_t dwc3_interrupt(int irq, void *_dwc) | |||
1925 | 2108 | ||
1926 | spin_lock(&dwc->lock); | 2109 | spin_lock(&dwc->lock); |
1927 | 2110 | ||
1928 | for (i = 0; i < DWC3_EVENT_BUFFERS_NUM; i++) { | 2111 | for (i = 0; i < dwc->num_event_buffers; i++) { |
1929 | irqreturn_t status; | 2112 | irqreturn_t status; |
1930 | 2113 | ||
1931 | status = dwc3_process_event_buf(dwc, i); | 2114 | status = dwc3_process_event_buf(dwc, i); |
@@ -1986,9 +2169,10 @@ int __devinit dwc3_gadget_init(struct dwc3 *dwc) | |||
1986 | dev_set_name(&dwc->gadget.dev, "gadget"); | 2169 | dev_set_name(&dwc->gadget.dev, "gadget"); |
1987 | 2170 | ||
1988 | dwc->gadget.ops = &dwc3_gadget_ops; | 2171 | dwc->gadget.ops = &dwc3_gadget_ops; |
1989 | dwc->gadget.is_dualspeed = true; | 2172 | dwc->gadget.max_speed = USB_SPEED_SUPER; |
1990 | dwc->gadget.speed = USB_SPEED_UNKNOWN; | 2173 | dwc->gadget.speed = USB_SPEED_UNKNOWN; |
1991 | dwc->gadget.dev.parent = dwc->dev; | 2174 | dwc->gadget.dev.parent = dwc->dev; |
2175 | dwc->gadget.sg_supported = true; | ||
1992 | 2176 | ||
1993 | dma_set_coherent_mask(&dwc->gadget.dev, dwc->dev->coherent_dma_mask); | 2177 | dma_set_coherent_mask(&dwc->gadget.dev, dwc->dev->coherent_dma_mask); |
1994 | 2178 | ||
@@ -2076,7 +2260,6 @@ err0: | |||
2076 | void dwc3_gadget_exit(struct dwc3 *dwc) | 2260 | void dwc3_gadget_exit(struct dwc3 *dwc) |
2077 | { | 2261 | { |
2078 | int irq; | 2262 | int irq; |
2079 | int i; | ||
2080 | 2263 | ||
2081 | usb_del_gadget_udc(&dwc->gadget); | 2264 | usb_del_gadget_udc(&dwc->gadget); |
2082 | irq = platform_get_irq(to_platform_device(dwc->dev), 0); | 2265 | irq = platform_get_irq(to_platform_device(dwc->dev), 0); |
@@ -2084,9 +2267,6 @@ void dwc3_gadget_exit(struct dwc3 *dwc) | |||
2084 | dwc3_writel(dwc->regs, DWC3_DEVTEN, 0x00); | 2267 | dwc3_writel(dwc->regs, DWC3_DEVTEN, 0x00); |
2085 | free_irq(irq, dwc); | 2268 | free_irq(irq, dwc); |
2086 | 2269 | ||
2087 | for (i = 0; i < ARRAY_SIZE(dwc->eps); i++) | ||
2088 | __dwc3_gadget_ep_disable(dwc->eps[i]); | ||
2089 | |||
2090 | dwc3_gadget_free_endpoints(dwc); | 2270 | dwc3_gadget_free_endpoints(dwc); |
2091 | 2271 | ||
2092 | dma_free_coherent(dwc->dev, 512, dwc->ep0_bounce, | 2272 | dma_free_coherent(dwc->dev, 512, dwc->ep0_bounce, |