6 files changed, 46 insertions, 36 deletions

diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 5f479dada6f2..925a1e547a83 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1560,7 +1560,7 @@ config SERIAL_IFX6X60
           Support for the IFX6x60 modem devices on Intel MID platforms.
 
 config SERIAL_PCH_UART
-        tristate "Intel EG20T PCH / OKI SEMICONDUCTOR IOH(ML7213/ML7223) UART"
+        tristate "Intel EG20T PCH/LAPIS Semicon IOH(ML7213/ML7223/ML7831) UART"
         depends on PCI
         select SERIAL_CORE
         help
@@ -1568,12 +1568,12 @@ config SERIAL_PCH_UART
           which is an IOH(Input/Output Hub) for x86 embedded processor.
           Enabling PCH_DMA, this PCH UART works as DMA mode.
 
-          This driver also can be used for OKI SEMICONDUCTOR IOH(Input/
-          Output Hub), ML7213 and ML7223.
-          ML7213 IOH is for IVI(In-Vehicle Infotainment) use and ML7223 IOH is
-          for MP(Media Phone) use.
-          ML7213/ML7223 is companion chip for Intel Atom E6xx series.
-          ML7213/ML7223 is completely compatible for Intel EG20T PCH.
+          This driver also can be used for LAPIS Semiconductor IOH(Input/
+          Output Hub), ML7213, ML7223 and ML7831.
+          ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
+          for MP(Media Phone) use and ML7831 IOH is for general purpose use.
+          ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
+          ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
 
 config SERIAL_MSM_SMD
         bool "Enable tty device interface for some SMD ports"
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index 4a0f86fa1e90..4c823f341d98 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -228,7 +228,7 @@ void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
         if (rs485conf->flags & SER_RS485_ENABLED) {
                 dev_dbg(port->dev, "Setting UART to RS485\n");
                 atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
-                if (rs485conf->flags & SER_RS485_RTS_AFTER_SEND)
+                if ((rs485conf->delay_rts_after_send) > 0)
                         UART_PUT_TTGR(port, rs485conf->delay_rts_after_send);
                 mode |= ATMEL_US_USMODE_RS485;
         } else {
@@ -304,7 +304,7 @@ static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
 
         if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
                 dev_dbg(port->dev, "Setting UART to RS485\n");
-                if (atmel_port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
+                if ((atmel_port->rs485.delay_rts_after_send) > 0)
                         UART_PUT_TTGR(port,
                                         atmel_port->rs485.delay_rts_after_send);
                 mode |= ATMEL_US_USMODE_RS485;
@@ -1228,7 +1228,7 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
 
         if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
                 dev_dbg(port->dev, "Setting UART to RS485\n");
-                if (atmel_port->rs485.flags & SER_RS485_RTS_AFTER_SEND)
+                if ((atmel_port->rs485.delay_rts_after_send) > 0)
                         UART_PUT_TTGR(port,
                                         atmel_port->rs485.delay_rts_after_send);
                 mode |= ATMEL_US_USMODE_RS485;
@@ -1447,16 +1447,6 @@ static void __devinit atmel_of_init_port(struct atmel_uart_port *atmel_port,
                 rs485conf->delay_rts_after_send = rs485_delay[1];
                 rs485conf->flags = 0;
 
-                if (rs485conf->delay_rts_before_send == 0 &&
-                    rs485conf->delay_rts_after_send == 0) {
-                        rs485conf->flags |= SER_RS485_RTS_ON_SEND;
-                } else {
-                        if (rs485conf->delay_rts_before_send)
-                                rs485conf->flags |= SER_RS485_RTS_BEFORE_SEND;
-                        if (rs485conf->delay_rts_after_send)
-                                rs485conf->flags |= SER_RS485_RTS_AFTER_SEND;
-                }
-
                 if (of_get_property(np, "rs485-rx-during-tx", NULL))
                         rs485conf->flags |= SER_RS485_RX_DURING_TX;
 
diff --git a/drivers/tty/serial/crisv10.c b/drivers/tty/serial/crisv10.c
index b7435043f2fe..1dfba7b779c8 100644
--- a/drivers/tty/serial/crisv10.c
+++ b/drivers/tty/serial/crisv10.c
@@ -3234,9 +3234,8 @@ rs_write(struct tty_struct *tty,
                 e100_disable_rx(info);
                 e100_enable_rx_irq(info);
 #endif
-                if ((info->rs485.flags & SER_RS485_RTS_BEFORE_SEND) &&
-                        (info->rs485.delay_rts_before_send > 0))
-                                msleep(info->rs485.delay_rts_before_send);
+                if (info->rs485.delay_rts_before_send > 0)
+                        msleep(info->rs485.delay_rts_before_send);
         }
 #endif /* CONFIG_ETRAX_RS485 */
 
@@ -3693,10 +3692,6 @@ rs_ioctl(struct tty_struct *tty,
 
                 rs485data.delay_rts_before_send = rs485ctrl.delay_rts_before_send;
                 rs485data.flags = 0;
-                if (rs485data.delay_rts_before_send != 0)
-                        rs485data.flags |= SER_RS485_RTS_BEFORE_SEND;
-                else
-                        rs485data.flags &= ~(SER_RS485_RTS_BEFORE_SEND);
 
                 if (rs485ctrl.enabled)
                         rs485data.flags |= SER_RS485_ENABLED;
@@ -4531,7 +4526,6 @@ static int __init rs_init(void)
                 /* Set sane defaults */
                 info->rs485.flags &= ~(SER_RS485_RTS_ON_SEND);
                 info->rs485.flags |= SER_RS485_RTS_AFTER_SEND;
-                info->rs485.flags &= ~(SER_RS485_RTS_BEFORE_SEND);
                 info->rs485.delay_rts_before_send = 0;
                 info->rs485.flags &= ~(SER_RS485_ENABLED);
 #endif
diff --git a/drivers/tty/serial/mfd.c b/drivers/tty/serial/mfd.c
index 286c386d9c46..e272d3919c67 100644
--- a/drivers/tty/serial/mfd.c
+++ b/drivers/tty/serial/mfd.c
@@ -884,7 +884,6 @@ serial_hsu_set_termios(struct uart_port *port, struct ktermios *termios,
 {
         struct uart_hsu_port *up =
                         container_of(port, struct uart_hsu_port, port);
-        struct tty_struct *tty = port->state->port.tty;
         unsigned char cval, fcr = 0;
         unsigned long flags;
         unsigned int baud, quot;
@@ -907,8 +906,7 @@ serial_hsu_set_termios(struct uart_port *port, struct ktermios *termios,
         }
 
         /* CMSPAR isn't supported by this driver */
-        if (tty)
-                tty->termios->c_cflag &= ~CMSPAR;
+        termios->c_cflag &= ~CMSPAR;
 
         if (termios->c_cflag & CSTOPB)
                 cval |= UART_LCR_STOP;
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index 21febef926aa..d6aba8c087e4 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -1,5 +1,5 @@
 /*
- *Copyright (C) 2010 OKI SEMICONDUCTOR CO., LTD.
+ *Copyright (C) 2011 LAPIS Semiconductor Co., Ltd.
  *
  *This program is free software; you can redistribute it and/or modify
  *it under the terms of the GNU General Public License as published by
@@ -46,8 +46,8 @@ enum {
 
 /* Set the max number of UART port
  * Intel EG20T PCH: 4 port
- * OKI SEMICONDUCTOR ML7213 IOH: 3 port
- * OKI SEMICONDUCTOR ML7223 IOH: 2 port
+ * LAPIS Semiconductor ML7213 IOH: 3 port
+ * LAPIS Semiconductor ML7223 IOH: 2 port
 */
 #define PCH_UART_NR     4
 
@@ -258,6 +258,8 @@ enum pch_uart_num_t {
         pch_ml7213_uart2,
         pch_ml7223_uart0,
         pch_ml7223_uart1,
+        pch_ml7831_uart0,
+        pch_ml7831_uart1,
 };
 
 static struct pch_uart_driver_data drv_dat[] = {
@@ -270,6 +272,8 @@ static struct pch_uart_driver_data drv_dat[] = {
         [pch_ml7213_uart2] = {PCH_UART_2LINE, 2},
         [pch_ml7223_uart0] = {PCH_UART_8LINE, 0},
         [pch_ml7223_uart1] = {PCH_UART_2LINE, 1},
+        [pch_ml7831_uart0] = {PCH_UART_8LINE, 0},
+        [pch_ml7831_uart1] = {PCH_UART_2LINE, 1},
 };
 
 static unsigned int default_baud = 9600;
@@ -628,6 +632,7 @@ static void pch_request_dma(struct uart_port *port)
                 dev_err(priv->port.dev, "%s:dma_request_channel FAILS(Rx)\n",
                         __func__);
                 dma_release_channel(priv->chan_tx);
+                priv->chan_tx = NULL;
                 return;
         }
 
@@ -1215,8 +1220,7 @@ static void pch_uart_shutdown(struct uart_port *port)
                 dev_err(priv->port.dev,
                         "pch_uart_hal_set_fifo Failed(ret=%d)\n", ret);
 
-        if (priv->use_dma_flag)
-                pch_free_dma(port);
+        pch_free_dma(port);
 
         free_irq(priv->port.irq, priv);
 }
@@ -1280,6 +1284,7 @@ static void pch_uart_set_termios(struct uart_port *port,
         if (rtn)
                 goto out;
 
+        pch_uart_set_mctrl(&priv->port, priv->port.mctrl);
         /* Don't rewrite B0 */
         if (tty_termios_baud_rate(termios))
                 tty_termios_encode_baud_rate(termios, baud, baud);
@@ -1552,6 +1557,10 @@ static DEFINE_PCI_DEVICE_TABLE(pch_uart_pci_id) = {
          .driver_data = pch_ml7223_uart0},
         {PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x800D),
          .driver_data = pch_ml7223_uart1},
+        {PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x8811),
+         .driver_data = pch_ml7831_uart0},
+        {PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x8812),
+         .driver_data = pch_ml7831_uart1},
         {0,},
 };
 
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 1945c70539c2..aff9d612dff0 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -207,6 +207,25 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = {
         },
 
         /*
+         * Common SH-2(A) SCIF definitions for ports with FIFO data
+         * count registers.
+         */
+        [SCIx_SH2_SCIF_FIFODATA_REGTYPE] = {
+                [SCSMR]         = { 0x00, 16 },
+                [SCBRR]         = { 0x04,  8 },
+                [SCSCR]         = { 0x08, 16 },
+                [SCxTDR]        = { 0x0c,  8 },
+                [SCxSR]         = { 0x10, 16 },
+                [SCxRDR]        = { 0x14,  8 },
+                [SCFCR]         = { 0x18, 16 },
+                [SCFDR]         = { 0x1c, 16 },
+                [SCTFDR]        = sci_reg_invalid,
+                [SCRFDR]        = sci_reg_invalid,
+                [SCSPTR]        = { 0x20, 16 },
+                [SCLSR]         = { 0x24, 16 },
+        },
+
+        /*
          * Common SH-3 SCIF definitions.
          */
         [SCIx_SH3_SCIF_REGTYPE] = {