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path: root/drivers/tty/serial/omap-serial.c
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Diffstat (limited to 'drivers/tty/serial/omap-serial.c')
-rw-r--r--drivers/tty/serial/omap-serial.c860
1 files changed, 363 insertions, 497 deletions
diff --git a/drivers/tty/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index d3cda0cb2df0..f175385bb304 100644
--- a/drivers/tty/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
@@ -32,16 +32,16 @@
32#include <linux/slab.h> 32#include <linux/slab.h>
33#include <linux/tty.h> 33#include <linux/tty.h>
34#include <linux/tty_flip.h> 34#include <linux/tty_flip.h>
35#include <linux/platform_device.h>
35#include <linux/io.h> 36#include <linux/io.h>
36#include <linux/dma-mapping.h>
37#include <linux/clk.h> 37#include <linux/clk.h>
38#include <linux/serial_core.h> 38#include <linux/serial_core.h>
39#include <linux/irq.h> 39#include <linux/irq.h>
40#include <linux/pm_runtime.h> 40#include <linux/pm_runtime.h>
41#include <linux/of.h> 41#include <linux/of.h>
42#include <linux/gpio.h>
43#include <linux/pinctrl/consumer.h>
42 44
43#include <plat/dma.h>
44#include <plat/dmtimer.h>
45#include <plat/omap-serial.h> 45#include <plat/omap-serial.h>
46 46
47#define UART_BUILD_REVISION(x, y) (((x) << 8) | (y)) 47#define UART_BUILD_REVISION(x, y) (((x) << 8) | (y))
@@ -57,8 +57,8 @@
57#define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7) 57#define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7)
58 58
59/* FCR register bitmasks */ 59/* FCR register bitmasks */
60#define OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT 6
61#define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6) 60#define OMAP_UART_FCR_RX_FIFO_TRIG_MASK (0x3 << 6)
61#define OMAP_UART_FCR_TX_FIFO_TRIG_MASK (0x3 << 4)
62 62
63/* MVR register bitmasks */ 63/* MVR register bitmasks */
64#define OMAP_UART_MVR_SCHEME_SHIFT 30 64#define OMAP_UART_MVR_SCHEME_SHIFT 30
@@ -71,12 +71,52 @@
71#define OMAP_UART_MVR_MAJ_SHIFT 8 71#define OMAP_UART_MVR_MAJ_SHIFT 8
72#define OMAP_UART_MVR_MIN_MASK 0x3f 72#define OMAP_UART_MVR_MIN_MASK 0x3f
73 73
74struct uart_omap_port {
75 struct uart_port port;
76 struct uart_omap_dma uart_dma;
77 struct device *dev;
78
79 unsigned char ier;
80 unsigned char lcr;
81 unsigned char mcr;
82 unsigned char fcr;
83 unsigned char efr;
84 unsigned char dll;
85 unsigned char dlh;
86 unsigned char mdr1;
87 unsigned char scr;
88
89 int use_dma;
90 /*
91 * Some bits in registers are cleared on a read, so they must
92 * be saved whenever the register is read but the bits will not
93 * be immediately processed.
94 */
95 unsigned int lsr_break_flag;
96 unsigned char msr_saved_flags;
97 char name[20];
98 unsigned long port_activity;
99 u32 context_loss_cnt;
100 u32 errata;
101 u8 wakeups_enabled;
102 unsigned int irq_pending:1;
103
104 int DTR_gpio;
105 int DTR_inverted;
106 int DTR_active;
107
108 struct pm_qos_request pm_qos_request;
109 u32 latency;
110 u32 calc_latency;
111 struct work_struct qos_work;
112 struct pinctrl *pins;
113};
114
115#define to_uart_omap_port(p) ((container_of((p), struct uart_omap_port, port)))
116
74static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS]; 117static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
75 118
76/* Forward declaration of functions */ 119/* Forward declaration of functions */
77static void uart_tx_dma_callback(int lch, u16 ch_status, void *data);
78static void serial_omap_rxdma_poll(unsigned long uart_no);
79static int serial_omap_start_rxdma(struct uart_omap_port *up);
80static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1); 120static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1);
81 121
82static struct workqueue_struct *serial_omap_uart_wq; 122static struct workqueue_struct *serial_omap_uart_wq;
@@ -101,6 +141,46 @@ static inline void serial_omap_clear_fifos(struct uart_omap_port *up)
101 serial_out(up, UART_FCR, 0); 141 serial_out(up, UART_FCR, 0);
102} 142}
103 143
144static int serial_omap_get_context_loss_count(struct uart_omap_port *up)
145{
146 struct omap_uart_port_info *pdata = up->dev->platform_data;
147
148 if (!pdata || !pdata->get_context_loss_count)
149 return 0;
150
151 return pdata->get_context_loss_count(up->dev);
152}
153
154static void serial_omap_set_forceidle(struct uart_omap_port *up)
155{
156 struct omap_uart_port_info *pdata = up->dev->platform_data;
157
158 if (!pdata || !pdata->set_forceidle)
159 return;
160
161 pdata->set_forceidle(up->dev);
162}
163
164static void serial_omap_set_noidle(struct uart_omap_port *up)
165{
166 struct omap_uart_port_info *pdata = up->dev->platform_data;
167
168 if (!pdata || !pdata->set_noidle)
169 return;
170
171 pdata->set_noidle(up->dev);
172}
173
174static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable)
175{
176 struct omap_uart_port_info *pdata = up->dev->platform_data;
177
178 if (!pdata || !pdata->enable_wakeup)
179 return;
180
181 pdata->enable_wakeup(up->dev, enable);
182}
183
104/* 184/*
105 * serial_omap_get_divisor - calculate divisor value 185 * serial_omap_get_divisor - calculate divisor value
106 * @port: uart port info 186 * @port: uart port info
@@ -126,151 +206,55 @@ serial_omap_get_divisor(struct uart_port *port, unsigned int baud)
126 return port->uartclk/(baud * divisor); 206 return port->uartclk/(baud * divisor);
127} 207}
128 208
129static void serial_omap_stop_rxdma(struct uart_omap_port *up)
130{
131 if (up->uart_dma.rx_dma_used) {
132 del_timer(&up->uart_dma.rx_timer);
133 omap_stop_dma(up->uart_dma.rx_dma_channel);
134 omap_free_dma(up->uart_dma.rx_dma_channel);
135 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
136 up->uart_dma.rx_dma_used = false;
137 pm_runtime_mark_last_busy(&up->pdev->dev);
138 pm_runtime_put_autosuspend(&up->pdev->dev);
139 }
140}
141
142static void serial_omap_enable_ms(struct uart_port *port) 209static void serial_omap_enable_ms(struct uart_port *port)
143{ 210{
144 struct uart_omap_port *up = (struct uart_omap_port *)port; 211 struct uart_omap_port *up = to_uart_omap_port(port);
145 212
146 dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line); 213 dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line);
147 214
148 pm_runtime_get_sync(&up->pdev->dev); 215 pm_runtime_get_sync(up->dev);
149 up->ier |= UART_IER_MSI; 216 up->ier |= UART_IER_MSI;
150 serial_out(up, UART_IER, up->ier); 217 serial_out(up, UART_IER, up->ier);
151 pm_runtime_put(&up->pdev->dev); 218 pm_runtime_mark_last_busy(up->dev);
219 pm_runtime_put_autosuspend(up->dev);
152} 220}
153 221
154static void serial_omap_stop_tx(struct uart_port *port) 222static void serial_omap_stop_tx(struct uart_port *port)
155{ 223{
156 struct uart_omap_port *up = (struct uart_omap_port *)port; 224 struct uart_omap_port *up = to_uart_omap_port(port);
157 struct omap_uart_port_info *pdata = up->pdev->dev.platform_data;
158 225
159 if (up->use_dma && 226 pm_runtime_get_sync(up->dev);
160 up->uart_dma.tx_dma_channel != OMAP_UART_DMA_CH_FREE) {
161 /*
162 * Check if dma is still active. If yes do nothing,
163 * return. Else stop dma
164 */
165 if (omap_get_dma_active_status(up->uart_dma.tx_dma_channel))
166 return;
167 omap_stop_dma(up->uart_dma.tx_dma_channel);
168 omap_free_dma(up->uart_dma.tx_dma_channel);
169 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
170 pm_runtime_mark_last_busy(&up->pdev->dev);
171 pm_runtime_put_autosuspend(&up->pdev->dev);
172 }
173
174 pm_runtime_get_sync(&up->pdev->dev);
175 if (up->ier & UART_IER_THRI) { 227 if (up->ier & UART_IER_THRI) {
176 up->ier &= ~UART_IER_THRI; 228 up->ier &= ~UART_IER_THRI;
177 serial_out(up, UART_IER, up->ier); 229 serial_out(up, UART_IER, up->ier);
178 } 230 }
179 231
180 if (!up->use_dma && pdata && pdata->set_forceidle) 232 serial_omap_set_forceidle(up);
181 pdata->set_forceidle(up->pdev);
182 233
183 pm_runtime_mark_last_busy(&up->pdev->dev); 234 pm_runtime_mark_last_busy(up->dev);
184 pm_runtime_put_autosuspend(&up->pdev->dev); 235 pm_runtime_put_autosuspend(up->dev);
185} 236}
186 237
187static void serial_omap_stop_rx(struct uart_port *port) 238static void serial_omap_stop_rx(struct uart_port *port)
188{ 239{
189 struct uart_omap_port *up = (struct uart_omap_port *)port; 240 struct uart_omap_port *up = to_uart_omap_port(port);
190 241
191 pm_runtime_get_sync(&up->pdev->dev); 242 pm_runtime_get_sync(up->dev);
192 if (up->use_dma)
193 serial_omap_stop_rxdma(up);
194 up->ier &= ~UART_IER_RLSI; 243 up->ier &= ~UART_IER_RLSI;
195 up->port.read_status_mask &= ~UART_LSR_DR; 244 up->port.read_status_mask &= ~UART_LSR_DR;
196 serial_out(up, UART_IER, up->ier); 245 serial_out(up, UART_IER, up->ier);
197 pm_runtime_mark_last_busy(&up->pdev->dev); 246 pm_runtime_mark_last_busy(up->dev);
198 pm_runtime_put_autosuspend(&up->pdev->dev); 247 pm_runtime_put_autosuspend(up->dev);
199}
200
201static inline void receive_chars(struct uart_omap_port *up,
202 unsigned int *status)
203{
204 struct tty_struct *tty = up->port.state->port.tty;
205 unsigned int flag, lsr = *status;
206 unsigned char ch = 0;
207 int max_count = 256;
208
209 do {
210 if (likely(lsr & UART_LSR_DR))
211 ch = serial_in(up, UART_RX);
212 flag = TTY_NORMAL;
213 up->port.icount.rx++;
214
215 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
216 /*
217 * For statistics only
218 */
219 if (lsr & UART_LSR_BI) {
220 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
221 up->port.icount.brk++;
222 /*
223 * We do the SysRQ and SAK checking
224 * here because otherwise the break
225 * may get masked by ignore_status_mask
226 * or read_status_mask.
227 */
228 if (uart_handle_break(&up->port))
229 goto ignore_char;
230 } else if (lsr & UART_LSR_PE) {
231 up->port.icount.parity++;
232 } else if (lsr & UART_LSR_FE) {
233 up->port.icount.frame++;
234 }
235
236 if (lsr & UART_LSR_OE)
237 up->port.icount.overrun++;
238
239 /*
240 * Mask off conditions which should be ignored.
241 */
242 lsr &= up->port.read_status_mask;
243
244#ifdef CONFIG_SERIAL_OMAP_CONSOLE
245 if (up->port.line == up->port.cons->index) {
246 /* Recover the break flag from console xmit */
247 lsr |= up->lsr_break_flag;
248 }
249#endif
250 if (lsr & UART_LSR_BI)
251 flag = TTY_BREAK;
252 else if (lsr & UART_LSR_PE)
253 flag = TTY_PARITY;
254 else if (lsr & UART_LSR_FE)
255 flag = TTY_FRAME;
256 }
257
258 if (uart_handle_sysrq_char(&up->port, ch))
259 goto ignore_char;
260 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
261ignore_char:
262 lsr = serial_in(up, UART_LSR);
263 } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
264 spin_unlock(&up->port.lock);
265 tty_flip_buffer_push(tty);
266 spin_lock(&up->port.lock);
267} 248}
268 249
269static void transmit_chars(struct uart_omap_port *up) 250static void transmit_chars(struct uart_omap_port *up, unsigned int lsr)
270{ 251{
271 struct circ_buf *xmit = &up->port.state->xmit; 252 struct circ_buf *xmit = &up->port.state->xmit;
272 int count; 253 int count;
273 254
255 if (!(lsr & UART_LSR_THRE))
256 return;
257
274 if (up->port.x_char) { 258 if (up->port.x_char) {
275 serial_out(up, UART_TX, up->port.x_char); 259 serial_out(up, UART_TX, up->port.x_char);
276 up->port.icount.tx++; 260 up->port.icount.tx++;
@@ -290,8 +274,11 @@ static void transmit_chars(struct uart_omap_port *up)
290 break; 274 break;
291 } while (--count > 0); 275 } while (--count > 0);
292 276
293 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 277 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) {
278 spin_unlock(&up->port.lock);
294 uart_write_wakeup(&up->port); 279 uart_write_wakeup(&up->port);
280 spin_lock(&up->port.lock);
281 }
295 282
296 if (uart_circ_empty(xmit)) 283 if (uart_circ_empty(xmit))
297 serial_omap_stop_tx(&up->port); 284 serial_omap_stop_tx(&up->port);
@@ -307,70 +294,13 @@ static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up)
307 294
308static void serial_omap_start_tx(struct uart_port *port) 295static void serial_omap_start_tx(struct uart_port *port)
309{ 296{
310 struct uart_omap_port *up = (struct uart_omap_port *)port; 297 struct uart_omap_port *up = to_uart_omap_port(port);
311 struct omap_uart_port_info *pdata = up->pdev->dev.platform_data;
312 struct circ_buf *xmit;
313 unsigned int start;
314 int ret = 0;
315
316 if (!up->use_dma) {
317 pm_runtime_get_sync(&up->pdev->dev);
318 serial_omap_enable_ier_thri(up);
319 if (pdata && pdata->set_noidle)
320 pdata->set_noidle(up->pdev);
321 pm_runtime_mark_last_busy(&up->pdev->dev);
322 pm_runtime_put_autosuspend(&up->pdev->dev);
323 return;
324 }
325
326 if (up->uart_dma.tx_dma_used)
327 return;
328
329 xmit = &up->port.state->xmit;
330
331 if (up->uart_dma.tx_dma_channel == OMAP_UART_DMA_CH_FREE) {
332 pm_runtime_get_sync(&up->pdev->dev);
333 ret = omap_request_dma(up->uart_dma.uart_dma_tx,
334 "UART Tx DMA",
335 (void *)uart_tx_dma_callback, up,
336 &(up->uart_dma.tx_dma_channel));
337 298
338 if (ret < 0) { 299 pm_runtime_get_sync(up->dev);
339 serial_omap_enable_ier_thri(up); 300 serial_omap_enable_ier_thri(up);
340 return; 301 serial_omap_set_noidle(up);
341 } 302 pm_runtime_mark_last_busy(up->dev);
342 } 303 pm_runtime_put_autosuspend(up->dev);
343 spin_lock(&(up->uart_dma.tx_lock));
344 up->uart_dma.tx_dma_used = true;
345 spin_unlock(&(up->uart_dma.tx_lock));
346
347 start = up->uart_dma.tx_buf_dma_phys +
348 (xmit->tail & (UART_XMIT_SIZE - 1));
349
350 up->uart_dma.tx_buf_size = uart_circ_chars_pending(xmit);
351 /*
352 * It is a circular buffer. See if the buffer has wounded back.
353 * If yes it will have to be transferred in two separate dma
354 * transfers
355 */
356 if (start + up->uart_dma.tx_buf_size >=
357 up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE)
358 up->uart_dma.tx_buf_size =
359 (up->uart_dma.tx_buf_dma_phys +
360 UART_XMIT_SIZE) - start;
361
362 omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
363 OMAP_DMA_AMODE_CONSTANT,
364 up->uart_dma.uart_base, 0, 0);
365 omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
366 OMAP_DMA_AMODE_POST_INC, start, 0, 0);
367 omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
368 OMAP_DMA_DATA_TYPE_S8,
369 up->uart_dma.tx_buf_size, 1,
370 OMAP_DMA_SYNC_ELEMENT,
371 up->uart_dma.uart_dma_tx, 0);
372 /* FIXME: Cache maintenance needed here? */
373 omap_start_dma(up->uart_dma.tx_dma_channel);
374} 304}
375 305
376static unsigned int check_modem_status(struct uart_omap_port *up) 306static unsigned int check_modem_status(struct uart_omap_port *up)
@@ -401,76 +331,158 @@ static unsigned int check_modem_status(struct uart_omap_port *up)
401 return status; 331 return status;
402} 332}
403 333
334static void serial_omap_rlsi(struct uart_omap_port *up, unsigned int lsr)
335{
336 unsigned int flag;
337
338 up->port.icount.rx++;
339 flag = TTY_NORMAL;
340
341 if (lsr & UART_LSR_BI) {
342 flag = TTY_BREAK;
343 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
344 up->port.icount.brk++;
345 /*
346 * We do the SysRQ and SAK checking
347 * here because otherwise the break
348 * may get masked by ignore_status_mask
349 * or read_status_mask.
350 */
351 if (uart_handle_break(&up->port))
352 return;
353
354 }
355
356 if (lsr & UART_LSR_PE) {
357 flag = TTY_PARITY;
358 up->port.icount.parity++;
359 }
360
361 if (lsr & UART_LSR_FE) {
362 flag = TTY_FRAME;
363 up->port.icount.frame++;
364 }
365
366 if (lsr & UART_LSR_OE)
367 up->port.icount.overrun++;
368
369#ifdef CONFIG_SERIAL_OMAP_CONSOLE
370 if (up->port.line == up->port.cons->index) {
371 /* Recover the break flag from console xmit */
372 lsr |= up->lsr_break_flag;
373 }
374#endif
375 uart_insert_char(&up->port, lsr, UART_LSR_OE, 0, flag);
376}
377
378static void serial_omap_rdi(struct uart_omap_port *up, unsigned int lsr)
379{
380 unsigned char ch = 0;
381 unsigned int flag;
382
383 if (!(lsr & UART_LSR_DR))
384 return;
385
386 ch = serial_in(up, UART_RX);
387 flag = TTY_NORMAL;
388 up->port.icount.rx++;
389
390 if (uart_handle_sysrq_char(&up->port, ch))
391 return;
392
393 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
394}
395
404/** 396/**
405 * serial_omap_irq() - This handles the interrupt from one port 397 * serial_omap_irq() - This handles the interrupt from one port
406 * @irq: uart port irq number 398 * @irq: uart port irq number
407 * @dev_id: uart port info 399 * @dev_id: uart port info
408 */ 400 */
409static inline irqreturn_t serial_omap_irq(int irq, void *dev_id) 401static irqreturn_t serial_omap_irq(int irq, void *dev_id)
410{ 402{
411 struct uart_omap_port *up = dev_id; 403 struct uart_omap_port *up = dev_id;
404 struct tty_struct *tty = up->port.state->port.tty;
412 unsigned int iir, lsr; 405 unsigned int iir, lsr;
413 unsigned long flags; 406 unsigned int type;
407 irqreturn_t ret = IRQ_NONE;
408 int max_count = 256;
414 409
415 pm_runtime_get_sync(&up->pdev->dev); 410 spin_lock(&up->port.lock);
416 iir = serial_in(up, UART_IIR); 411 pm_runtime_get_sync(up->dev);
417 if (iir & UART_IIR_NO_INT) {
418 pm_runtime_mark_last_busy(&up->pdev->dev);
419 pm_runtime_put_autosuspend(&up->pdev->dev);
420 return IRQ_NONE;
421 }
422 412
423 spin_lock_irqsave(&up->port.lock, flags); 413 do {
424 lsr = serial_in(up, UART_LSR); 414 iir = serial_in(up, UART_IIR);
425 if (iir & UART_IIR_RLSI) { 415 if (iir & UART_IIR_NO_INT)
426 if (!up->use_dma) { 416 break;
427 if (lsr & UART_LSR_DR) 417
428 receive_chars(up, &lsr); 418 ret = IRQ_HANDLED;
429 } else { 419 lsr = serial_in(up, UART_LSR);
430 up->ier &= ~(UART_IER_RDI | UART_IER_RLSI); 420
431 serial_out(up, UART_IER, up->ier); 421 /* extract IRQ type from IIR register */
432 if ((serial_omap_start_rxdma(up) != 0) && 422 type = iir & 0x3e;
433 (lsr & UART_LSR_DR)) 423
434 receive_chars(up, &lsr); 424 switch (type) {
425 case UART_IIR_MSI:
426 check_modem_status(up);
427 break;
428 case UART_IIR_THRI:
429 transmit_chars(up, lsr);
430 break;
431 case UART_IIR_RX_TIMEOUT:
432 /* FALLTHROUGH */
433 case UART_IIR_RDI:
434 serial_omap_rdi(up, lsr);
435 break;
436 case UART_IIR_RLSI:
437 serial_omap_rlsi(up, lsr);
438 break;
439 case UART_IIR_CTS_RTS_DSR:
440 /* simply try again */
441 break;
442 case UART_IIR_XOFF:
443 /* FALLTHROUGH */
444 default:
445 break;
435 } 446 }
436 } 447 } while (!(iir & UART_IIR_NO_INT) && max_count--);
437 448
438 check_modem_status(up); 449 spin_unlock(&up->port.lock);
439 if ((lsr & UART_LSR_THRE) && (iir & UART_IIR_THRI))
440 transmit_chars(up);
441 450
442 spin_unlock_irqrestore(&up->port.lock, flags); 451 tty_flip_buffer_push(tty);
443 pm_runtime_mark_last_busy(&up->pdev->dev);
444 pm_runtime_put_autosuspend(&up->pdev->dev);
445 452
453 pm_runtime_mark_last_busy(up->dev);
454 pm_runtime_put_autosuspend(up->dev);
446 up->port_activity = jiffies; 455 up->port_activity = jiffies;
447 return IRQ_HANDLED; 456
457 return ret;
448} 458}
449 459
450static unsigned int serial_omap_tx_empty(struct uart_port *port) 460static unsigned int serial_omap_tx_empty(struct uart_port *port)
451{ 461{
452 struct uart_omap_port *up = (struct uart_omap_port *)port; 462 struct uart_omap_port *up = to_uart_omap_port(port);
453 unsigned long flags = 0; 463 unsigned long flags = 0;
454 unsigned int ret = 0; 464 unsigned int ret = 0;
455 465
456 pm_runtime_get_sync(&up->pdev->dev); 466 pm_runtime_get_sync(up->dev);
457 dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line); 467 dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line);
458 spin_lock_irqsave(&up->port.lock, flags); 468 spin_lock_irqsave(&up->port.lock, flags);
459 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; 469 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
460 spin_unlock_irqrestore(&up->port.lock, flags); 470 spin_unlock_irqrestore(&up->port.lock, flags);
461 pm_runtime_put(&up->pdev->dev); 471 pm_runtime_mark_last_busy(up->dev);
472 pm_runtime_put_autosuspend(up->dev);
462 return ret; 473 return ret;
463} 474}
464 475
465static unsigned int serial_omap_get_mctrl(struct uart_port *port) 476static unsigned int serial_omap_get_mctrl(struct uart_port *port)
466{ 477{
467 struct uart_omap_port *up = (struct uart_omap_port *)port; 478 struct uart_omap_port *up = to_uart_omap_port(port);
468 unsigned int status; 479 unsigned int status;
469 unsigned int ret = 0; 480 unsigned int ret = 0;
470 481
471 pm_runtime_get_sync(&up->pdev->dev); 482 pm_runtime_get_sync(up->dev);
472 status = check_modem_status(up); 483 status = check_modem_status(up);
473 pm_runtime_put(&up->pdev->dev); 484 pm_runtime_mark_last_busy(up->dev);
485 pm_runtime_put_autosuspend(up->dev);
474 486
475 dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line); 487 dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line);
476 488
@@ -487,7 +499,7 @@ static unsigned int serial_omap_get_mctrl(struct uart_port *port)
487 499
488static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl) 500static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
489{ 501{
490 struct uart_omap_port *up = (struct uart_omap_port *)port; 502 struct uart_omap_port *up = to_uart_omap_port(port);
491 unsigned char mcr = 0; 503 unsigned char mcr = 0;
492 504
493 dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line); 505 dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line);
@@ -502,20 +514,31 @@ static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
502 if (mctrl & TIOCM_LOOP) 514 if (mctrl & TIOCM_LOOP)
503 mcr |= UART_MCR_LOOP; 515 mcr |= UART_MCR_LOOP;
504 516
505 pm_runtime_get_sync(&up->pdev->dev); 517 pm_runtime_get_sync(up->dev);
506 up->mcr = serial_in(up, UART_MCR); 518 up->mcr = serial_in(up, UART_MCR);
507 up->mcr |= mcr; 519 up->mcr |= mcr;
508 serial_out(up, UART_MCR, up->mcr); 520 serial_out(up, UART_MCR, up->mcr);
509 pm_runtime_put(&up->pdev->dev); 521 pm_runtime_mark_last_busy(up->dev);
522 pm_runtime_put_autosuspend(up->dev);
523
524 if (gpio_is_valid(up->DTR_gpio) &&
525 !!(mctrl & TIOCM_DTR) != up->DTR_active) {
526 up->DTR_active = !up->DTR_active;
527 if (gpio_cansleep(up->DTR_gpio))
528 schedule_work(&up->qos_work);
529 else
530 gpio_set_value(up->DTR_gpio,
531 up->DTR_active != up->DTR_inverted);
532 }
510} 533}
511 534
512static void serial_omap_break_ctl(struct uart_port *port, int break_state) 535static void serial_omap_break_ctl(struct uart_port *port, int break_state)
513{ 536{
514 struct uart_omap_port *up = (struct uart_omap_port *)port; 537 struct uart_omap_port *up = to_uart_omap_port(port);
515 unsigned long flags = 0; 538 unsigned long flags = 0;
516 539
517 dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line); 540 dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line);
518 pm_runtime_get_sync(&up->pdev->dev); 541 pm_runtime_get_sync(up->dev);
519 spin_lock_irqsave(&up->port.lock, flags); 542 spin_lock_irqsave(&up->port.lock, flags);
520 if (break_state == -1) 543 if (break_state == -1)
521 up->lcr |= UART_LCR_SBC; 544 up->lcr |= UART_LCR_SBC;
@@ -523,12 +546,13 @@ static void serial_omap_break_ctl(struct uart_port *port, int break_state)
523 up->lcr &= ~UART_LCR_SBC; 546 up->lcr &= ~UART_LCR_SBC;
524 serial_out(up, UART_LCR, up->lcr); 547 serial_out(up, UART_LCR, up->lcr);
525 spin_unlock_irqrestore(&up->port.lock, flags); 548 spin_unlock_irqrestore(&up->port.lock, flags);
526 pm_runtime_put(&up->pdev->dev); 549 pm_runtime_mark_last_busy(up->dev);
550 pm_runtime_put_autosuspend(up->dev);
527} 551}
528 552
529static int serial_omap_startup(struct uart_port *port) 553static int serial_omap_startup(struct uart_port *port)
530{ 554{
531 struct uart_omap_port *up = (struct uart_omap_port *)port; 555 struct uart_omap_port *up = to_uart_omap_port(port);
532 unsigned long flags = 0; 556 unsigned long flags = 0;
533 int retval; 557 int retval;
534 558
@@ -542,7 +566,7 @@ static int serial_omap_startup(struct uart_port *port)
542 566
543 dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line); 567 dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line);
544 568
545 pm_runtime_get_sync(&up->pdev->dev); 569 pm_runtime_get_sync(up->dev);
546 /* 570 /*
547 * Clear the FIFO buffers and disable them. 571 * Clear the FIFO buffers and disable them.
548 * (they will be reenabled in set_termios()) 572 * (they will be reenabled in set_termios())
@@ -573,20 +597,6 @@ static int serial_omap_startup(struct uart_port *port)
573 spin_unlock_irqrestore(&up->port.lock, flags); 597 spin_unlock_irqrestore(&up->port.lock, flags);
574 598
575 up->msr_saved_flags = 0; 599 up->msr_saved_flags = 0;
576 if (up->use_dma) {
577 free_page((unsigned long)up->port.state->xmit.buf);
578 up->port.state->xmit.buf = dma_alloc_coherent(NULL,
579 UART_XMIT_SIZE,
580 (dma_addr_t *)&(up->uart_dma.tx_buf_dma_phys),
581 0);
582 init_timer(&(up->uart_dma.rx_timer));
583 up->uart_dma.rx_timer.function = serial_omap_rxdma_poll;
584 up->uart_dma.rx_timer.data = up->port.line;
585 /* Currently the buffer size is 4KB. Can increase it */
586 up->uart_dma.rx_buf = dma_alloc_coherent(NULL,
587 up->uart_dma.rx_buf_size,
588 (dma_addr_t *)&(up->uart_dma.rx_buf_dma_phys), 0);
589 }
590 /* 600 /*
591 * Finally, enable interrupts. Note: Modem status interrupts 601 * Finally, enable interrupts. Note: Modem status interrupts
592 * are set via set_termios(), which will be occurring imminently 602 * are set via set_termios(), which will be occurring imminently
@@ -598,20 +608,20 @@ static int serial_omap_startup(struct uart_port *port)
598 /* Enable module level wake up */ 608 /* Enable module level wake up */
599 serial_out(up, UART_OMAP_WER, OMAP_UART_WER_MOD_WKUP); 609 serial_out(up, UART_OMAP_WER, OMAP_UART_WER_MOD_WKUP);
600 610
601 pm_runtime_mark_last_busy(&up->pdev->dev); 611 pm_runtime_mark_last_busy(up->dev);
602 pm_runtime_put_autosuspend(&up->pdev->dev); 612 pm_runtime_put_autosuspend(up->dev);
603 up->port_activity = jiffies; 613 up->port_activity = jiffies;
604 return 0; 614 return 0;
605} 615}
606 616
607static void serial_omap_shutdown(struct uart_port *port) 617static void serial_omap_shutdown(struct uart_port *port)
608{ 618{
609 struct uart_omap_port *up = (struct uart_omap_port *)port; 619 struct uart_omap_port *up = to_uart_omap_port(port);
610 unsigned long flags = 0; 620 unsigned long flags = 0;
611 621
612 dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line); 622 dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line);
613 623
614 pm_runtime_get_sync(&up->pdev->dev); 624 pm_runtime_get_sync(up->dev);
615 /* 625 /*
616 * Disable interrupts from this port 626 * Disable interrupts from this port
617 */ 627 */
@@ -634,19 +644,9 @@ static void serial_omap_shutdown(struct uart_port *port)
634 */ 644 */
635 if (serial_in(up, UART_LSR) & UART_LSR_DR) 645 if (serial_in(up, UART_LSR) & UART_LSR_DR)
636 (void) serial_in(up, UART_RX); 646 (void) serial_in(up, UART_RX);
637 if (up->use_dma) {
638 dma_free_coherent(up->port.dev,
639 UART_XMIT_SIZE, up->port.state->xmit.buf,
640 up->uart_dma.tx_buf_dma_phys);
641 up->port.state->xmit.buf = NULL;
642 serial_omap_stop_rx(port);
643 dma_free_coherent(up->port.dev,
644 up->uart_dma.rx_buf_size, up->uart_dma.rx_buf,
645 up->uart_dma.rx_buf_dma_phys);
646 up->uart_dma.rx_buf = NULL;
647 }
648 647
649 pm_runtime_put(&up->pdev->dev); 648 pm_runtime_mark_last_busy(up->dev);
649 pm_runtime_put_autosuspend(up->dev);
650 free_irq(up->port.irq, up); 650 free_irq(up->port.irq, up);
651} 651}
652 652
@@ -667,19 +667,19 @@ serial_omap_configure_xonxoff
667 667
668 /* 668 /*
669 * IXON Flag: 669 * IXON Flag:
670 * Enable XON/XOFF flow control on output. 670 * Flow control for OMAP.TX
671 * Transmit XON1, XOFF1 671 * OMAP.RX should listen for XON/XOFF
672 */ 672 */
673 if (termios->c_iflag & IXON) 673 if (termios->c_iflag & IXON)
674 up->efr |= OMAP_UART_SW_TX; 674 up->efr |= OMAP_UART_SW_RX;
675 675
676 /* 676 /*
677 * IXOFF Flag: 677 * IXOFF Flag:
678 * Enable XON/XOFF flow control on input. 678 * Flow control for OMAP.RX
679 * Receiver compares XON1, XOFF1. 679 * OMAP.TX should send XON/XOFF
680 */ 680 */
681 if (termios->c_iflag & IXOFF) 681 if (termios->c_iflag & IXOFF)
682 up->efr |= OMAP_UART_SW_RX; 682 up->efr |= OMAP_UART_SW_TX;
683 683
684 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); 684 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
685 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); 685 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
@@ -715,13 +715,16 @@ static void serial_omap_uart_qos_work(struct work_struct *work)
715 qos_work); 715 qos_work);
716 716
717 pm_qos_update_request(&up->pm_qos_request, up->latency); 717 pm_qos_update_request(&up->pm_qos_request, up->latency);
718 if (gpio_is_valid(up->DTR_gpio))
719 gpio_set_value_cansleep(up->DTR_gpio,
720 up->DTR_active != up->DTR_inverted);
718} 721}
719 722
720static void 723static void
721serial_omap_set_termios(struct uart_port *port, struct ktermios *termios, 724serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
722 struct ktermios *old) 725 struct ktermios *old)
723{ 726{
724 struct uart_omap_port *up = (struct uart_omap_port *)port; 727 struct uart_omap_port *up = to_uart_omap_port(port);
725 unsigned char cval = 0; 728 unsigned char cval = 0;
726 unsigned char efr = 0; 729 unsigned char efr = 0;
727 unsigned long flags = 0; 730 unsigned long flags = 0;
@@ -768,14 +771,12 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
768 771
769 up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | 772 up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 |
770 UART_FCR_ENABLE_FIFO; 773 UART_FCR_ENABLE_FIFO;
771 if (up->use_dma)
772 up->fcr |= UART_FCR_DMA_SELECT;
773 774
774 /* 775 /*
775 * Ok, we're now changing the port state. Do it with 776 * Ok, we're now changing the port state. Do it with
776 * interrupts disabled. 777 * interrupts disabled.
777 */ 778 */
778 pm_runtime_get_sync(&up->pdev->dev); 779 pm_runtime_get_sync(up->dev);
779 spin_lock_irqsave(&up->port.lock, flags); 780 spin_lock_irqsave(&up->port.lock, flags);
780 781
781 /* 782 /*
@@ -845,14 +846,13 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
845 846
846 up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK; 847 up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK;
847 848
848 if (up->use_dma) { 849 /* Set receive FIFO threshold to 16 characters and
849 serial_out(up, UART_TI752_TLR, 0); 850 * transmit FIFO threshold to 16 spaces
850 up->scr |= UART_FCR_TRIGGER_4; 851 */
851 } else { 852 up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK;
852 /* Set receive FIFO threshold to 1 byte */ 853 up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK;
853 up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; 854 up->fcr |= UART_FCR6_R_TRIGGER_16 | UART_FCR6_T_TRIGGER_24 |
854 up->fcr |= (0x1 << OMAP_UART_FCR_RX_FIFO_TRIG_SHIFT); 855 UART_FCR_ENABLE_FIFO;
855 }
856 856
857 serial_out(up, UART_FCR, up->fcr); 857 serial_out(up, UART_FCR, up->fcr);
858 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 858 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
@@ -924,20 +924,30 @@ serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
924 serial_omap_configure_xonxoff(up, termios); 924 serial_omap_configure_xonxoff(up, termios);
925 925
926 spin_unlock_irqrestore(&up->port.lock, flags); 926 spin_unlock_irqrestore(&up->port.lock, flags);
927 pm_runtime_put(&up->pdev->dev); 927 pm_runtime_mark_last_busy(up->dev);
928 pm_runtime_put_autosuspend(up->dev);
928 dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line); 929 dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line);
929} 930}
930 931
932static int serial_omap_set_wake(struct uart_port *port, unsigned int state)
933{
934 struct uart_omap_port *up = to_uart_omap_port(port);
935
936 serial_omap_enable_wakeup(up, state);
937
938 return 0;
939}
940
931static void 941static void
932serial_omap_pm(struct uart_port *port, unsigned int state, 942serial_omap_pm(struct uart_port *port, unsigned int state,
933 unsigned int oldstate) 943 unsigned int oldstate)
934{ 944{
935 struct uart_omap_port *up = (struct uart_omap_port *)port; 945 struct uart_omap_port *up = to_uart_omap_port(port);
936 unsigned char efr; 946 unsigned char efr;
937 947
938 dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line); 948 dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line);
939 949
940 pm_runtime_get_sync(&up->pdev->dev); 950 pm_runtime_get_sync(up->dev);
941 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); 951 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
942 efr = serial_in(up, UART_EFR); 952 efr = serial_in(up, UART_EFR);
943 serial_out(up, UART_EFR, efr | UART_EFR_ECB); 953 serial_out(up, UART_EFR, efr | UART_EFR_ECB);
@@ -948,14 +958,15 @@ serial_omap_pm(struct uart_port *port, unsigned int state,
948 serial_out(up, UART_EFR, efr); 958 serial_out(up, UART_EFR, efr);
949 serial_out(up, UART_LCR, 0); 959 serial_out(up, UART_LCR, 0);
950 960
951 if (!device_may_wakeup(&up->pdev->dev)) { 961 if (!device_may_wakeup(up->dev)) {
952 if (!state) 962 if (!state)
953 pm_runtime_forbid(&up->pdev->dev); 963 pm_runtime_forbid(up->dev);
954 else 964 else
955 pm_runtime_allow(&up->pdev->dev); 965 pm_runtime_allow(up->dev);
956 } 966 }
957 967
958 pm_runtime_put(&up->pdev->dev); 968 pm_runtime_mark_last_busy(up->dev);
969 pm_runtime_put_autosuspend(up->dev);
959} 970}
960 971
961static void serial_omap_release_port(struct uart_port *port) 972static void serial_omap_release_port(struct uart_port *port)
@@ -971,7 +982,7 @@ static int serial_omap_request_port(struct uart_port *port)
971 982
972static void serial_omap_config_port(struct uart_port *port, int flags) 983static void serial_omap_config_port(struct uart_port *port, int flags)
973{ 984{
974 struct uart_omap_port *up = (struct uart_omap_port *)port; 985 struct uart_omap_port *up = to_uart_omap_port(port);
975 986
976 dev_dbg(up->port.dev, "serial_omap_config_port+%d\n", 987 dev_dbg(up->port.dev, "serial_omap_config_port+%d\n",
977 up->port.line); 988 up->port.line);
@@ -989,7 +1000,7 @@ serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser)
989static const char * 1000static const char *
990serial_omap_type(struct uart_port *port) 1001serial_omap_type(struct uart_port *port)
991{ 1002{
992 struct uart_omap_port *up = (struct uart_omap_port *)port; 1003 struct uart_omap_port *up = to_uart_omap_port(port);
993 1004
994 dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line); 1005 dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line);
995 return up->name; 1006 return up->name;
@@ -1032,26 +1043,33 @@ static inline void wait_for_xmitr(struct uart_omap_port *up)
1032 1043
1033static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch) 1044static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch)
1034{ 1045{
1035 struct uart_omap_port *up = (struct uart_omap_port *)port; 1046 struct uart_omap_port *up = to_uart_omap_port(port);
1036 1047
1037 pm_runtime_get_sync(&up->pdev->dev); 1048 pm_runtime_get_sync(up->dev);
1038 wait_for_xmitr(up); 1049 wait_for_xmitr(up);
1039 serial_out(up, UART_TX, ch); 1050 serial_out(up, UART_TX, ch);
1040 pm_runtime_put(&up->pdev->dev); 1051 pm_runtime_mark_last_busy(up->dev);
1052 pm_runtime_put_autosuspend(up->dev);
1041} 1053}
1042 1054
1043static int serial_omap_poll_get_char(struct uart_port *port) 1055static int serial_omap_poll_get_char(struct uart_port *port)
1044{ 1056{
1045 struct uart_omap_port *up = (struct uart_omap_port *)port; 1057 struct uart_omap_port *up = to_uart_omap_port(port);
1046 unsigned int status; 1058 unsigned int status;
1047 1059
1048 pm_runtime_get_sync(&up->pdev->dev); 1060 pm_runtime_get_sync(up->dev);
1049 status = serial_in(up, UART_LSR); 1061 status = serial_in(up, UART_LSR);
1050 if (!(status & UART_LSR_DR)) 1062 if (!(status & UART_LSR_DR)) {
1051 return NO_POLL_CHAR; 1063 status = NO_POLL_CHAR;
1064 goto out;
1065 }
1052 1066
1053 status = serial_in(up, UART_RX); 1067 status = serial_in(up, UART_RX);
1054 pm_runtime_put(&up->pdev->dev); 1068
1069out:
1070 pm_runtime_mark_last_busy(up->dev);
1071 pm_runtime_put_autosuspend(up->dev);
1072
1055 return status; 1073 return status;
1056} 1074}
1057 1075
@@ -1065,7 +1083,7 @@ static struct uart_driver serial_omap_reg;
1065 1083
1066static void serial_omap_console_putchar(struct uart_port *port, int ch) 1084static void serial_omap_console_putchar(struct uart_port *port, int ch)
1067{ 1085{
1068 struct uart_omap_port *up = (struct uart_omap_port *)port; 1086 struct uart_omap_port *up = to_uart_omap_port(port);
1069 1087
1070 wait_for_xmitr(up); 1088 wait_for_xmitr(up);
1071 serial_out(up, UART_TX, ch); 1089 serial_out(up, UART_TX, ch);
@@ -1080,7 +1098,7 @@ serial_omap_console_write(struct console *co, const char *s,
1080 unsigned int ier; 1098 unsigned int ier;
1081 int locked = 1; 1099 int locked = 1;
1082 1100
1083 pm_runtime_get_sync(&up->pdev->dev); 1101 pm_runtime_get_sync(up->dev);
1084 1102
1085 local_irq_save(flags); 1103 local_irq_save(flags);
1086 if (up->port.sysrq) 1104 if (up->port.sysrq)
@@ -1114,8 +1132,8 @@ serial_omap_console_write(struct console *co, const char *s,
1114 if (up->msr_saved_flags) 1132 if (up->msr_saved_flags)
1115 check_modem_status(up); 1133 check_modem_status(up);
1116 1134
1117 pm_runtime_mark_last_busy(&up->pdev->dev); 1135 pm_runtime_mark_last_busy(up->dev);
1118 pm_runtime_put_autosuspend(&up->pdev->dev); 1136 pm_runtime_put_autosuspend(up->dev);
1119 if (locked) 1137 if (locked)
1120 spin_unlock(&up->port.lock); 1138 spin_unlock(&up->port.lock);
1121 local_irq_restore(flags); 1139 local_irq_restore(flags);
@@ -1179,6 +1197,7 @@ static struct uart_ops serial_omap_pops = {
1179 .shutdown = serial_omap_shutdown, 1197 .shutdown = serial_omap_shutdown,
1180 .set_termios = serial_omap_set_termios, 1198 .set_termios = serial_omap_set_termios,
1181 .pm = serial_omap_pm, 1199 .pm = serial_omap_pm,
1200 .set_wake = serial_omap_set_wake,
1182 .type = serial_omap_type, 1201 .type = serial_omap_type,
1183 .release_port = serial_omap_release_port, 1202 .release_port = serial_omap_release_port,
1184 .request_port = serial_omap_request_port, 1203 .request_port = serial_omap_request_port,
@@ -1221,150 +1240,7 @@ static int serial_omap_resume(struct device *dev)
1221} 1240}
1222#endif 1241#endif
1223 1242
1224static void serial_omap_rxdma_poll(unsigned long uart_no) 1243static void __devinit omap_serial_fill_features_erratas(struct uart_omap_port *up)
1225{
1226 struct uart_omap_port *up = ui[uart_no];
1227 unsigned int curr_dma_pos, curr_transmitted_size;
1228 int ret = 0;
1229
1230 curr_dma_pos = omap_get_dma_dst_pos(up->uart_dma.rx_dma_channel);
1231 if ((curr_dma_pos == up->uart_dma.prev_rx_dma_pos) ||
1232 (curr_dma_pos == 0)) {
1233 if (jiffies_to_msecs(jiffies - up->port_activity) <
1234 up->uart_dma.rx_timeout) {
1235 mod_timer(&up->uart_dma.rx_timer, jiffies +
1236 usecs_to_jiffies(up->uart_dma.rx_poll_rate));
1237 } else {
1238 serial_omap_stop_rxdma(up);
1239 up->ier |= (UART_IER_RDI | UART_IER_RLSI);
1240 serial_out(up, UART_IER, up->ier);
1241 }
1242 return;
1243 }
1244
1245 curr_transmitted_size = curr_dma_pos -
1246 up->uart_dma.prev_rx_dma_pos;
1247 up->port.icount.rx += curr_transmitted_size;
1248 tty_insert_flip_string(up->port.state->port.tty,
1249 up->uart_dma.rx_buf +
1250 (up->uart_dma.prev_rx_dma_pos -
1251 up->uart_dma.rx_buf_dma_phys),
1252 curr_transmitted_size);
1253 tty_flip_buffer_push(up->port.state->port.tty);
1254 up->uart_dma.prev_rx_dma_pos = curr_dma_pos;
1255 if (up->uart_dma.rx_buf_size +
1256 up->uart_dma.rx_buf_dma_phys == curr_dma_pos) {
1257 ret = serial_omap_start_rxdma(up);
1258 if (ret < 0) {
1259 serial_omap_stop_rxdma(up);
1260 up->ier |= (UART_IER_RDI | UART_IER_RLSI);
1261 serial_out(up, UART_IER, up->ier);
1262 }
1263 } else {
1264 mod_timer(&up->uart_dma.rx_timer, jiffies +
1265 usecs_to_jiffies(up->uart_dma.rx_poll_rate));
1266 }
1267 up->port_activity = jiffies;
1268}
1269
1270static void uart_rx_dma_callback(int lch, u16 ch_status, void *data)
1271{
1272 return;
1273}
1274
1275static int serial_omap_start_rxdma(struct uart_omap_port *up)
1276{
1277 int ret = 0;
1278
1279 if (up->uart_dma.rx_dma_channel == -1) {
1280 pm_runtime_get_sync(&up->pdev->dev);
1281 ret = omap_request_dma(up->uart_dma.uart_dma_rx,
1282 "UART Rx DMA",
1283 (void *)uart_rx_dma_callback, up,
1284 &(up->uart_dma.rx_dma_channel));
1285 if (ret < 0)
1286 return ret;
1287
1288 omap_set_dma_src_params(up->uart_dma.rx_dma_channel, 0,
1289 OMAP_DMA_AMODE_CONSTANT,
1290 up->uart_dma.uart_base, 0, 0);
1291 omap_set_dma_dest_params(up->uart_dma.rx_dma_channel, 0,
1292 OMAP_DMA_AMODE_POST_INC,
1293 up->uart_dma.rx_buf_dma_phys, 0, 0);
1294 omap_set_dma_transfer_params(up->uart_dma.rx_dma_channel,
1295 OMAP_DMA_DATA_TYPE_S8,
1296 up->uart_dma.rx_buf_size, 1,
1297 OMAP_DMA_SYNC_ELEMENT,
1298 up->uart_dma.uart_dma_rx, 0);
1299 }
1300 up->uart_dma.prev_rx_dma_pos = up->uart_dma.rx_buf_dma_phys;
1301 /* FIXME: Cache maintenance needed here? */
1302 omap_start_dma(up->uart_dma.rx_dma_channel);
1303 mod_timer(&up->uart_dma.rx_timer, jiffies +
1304 usecs_to_jiffies(up->uart_dma.rx_poll_rate));
1305 up->uart_dma.rx_dma_used = true;
1306 return ret;
1307}
1308
1309static void serial_omap_continue_tx(struct uart_omap_port *up)
1310{
1311 struct circ_buf *xmit = &up->port.state->xmit;
1312 unsigned int start = up->uart_dma.tx_buf_dma_phys
1313 + (xmit->tail & (UART_XMIT_SIZE - 1));
1314
1315 if (uart_circ_empty(xmit))
1316 return;
1317
1318 up->uart_dma.tx_buf_size = uart_circ_chars_pending(xmit);
1319 /*
1320 * It is a circular buffer. See if the buffer has wounded back.
1321 * If yes it will have to be transferred in two separate dma
1322 * transfers
1323 */
1324 if (start + up->uart_dma.tx_buf_size >=
1325 up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE)
1326 up->uart_dma.tx_buf_size =
1327 (up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE) - start;
1328 omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
1329 OMAP_DMA_AMODE_CONSTANT,
1330 up->uart_dma.uart_base, 0, 0);
1331 omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
1332 OMAP_DMA_AMODE_POST_INC, start, 0, 0);
1333 omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
1334 OMAP_DMA_DATA_TYPE_S8,
1335 up->uart_dma.tx_buf_size, 1,
1336 OMAP_DMA_SYNC_ELEMENT,
1337 up->uart_dma.uart_dma_tx, 0);
1338 /* FIXME: Cache maintenance needed here? */
1339 omap_start_dma(up->uart_dma.tx_dma_channel);
1340}
1341
1342static void uart_tx_dma_callback(int lch, u16 ch_status, void *data)
1343{
1344 struct uart_omap_port *up = (struct uart_omap_port *)data;
1345 struct circ_buf *xmit = &up->port.state->xmit;
1346
1347 xmit->tail = (xmit->tail + up->uart_dma.tx_buf_size) & \
1348 (UART_XMIT_SIZE - 1);
1349 up->port.icount.tx += up->uart_dma.tx_buf_size;
1350
1351 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1352 uart_write_wakeup(&up->port);
1353
1354 if (uart_circ_empty(xmit)) {
1355 spin_lock(&(up->uart_dma.tx_lock));
1356 serial_omap_stop_tx(&up->port);
1357 up->uart_dma.tx_dma_used = false;
1358 spin_unlock(&(up->uart_dma.tx_lock));
1359 } else {
1360 omap_stop_dma(up->uart_dma.tx_dma_channel);
1361 serial_omap_continue_tx(up);
1362 }
1363 up->port_activity = jiffies;
1364 return;
1365}
1366
1367static void omap_serial_fill_features_erratas(struct uart_omap_port *up)
1368{ 1244{
1369 u32 mvr, scheme; 1245 u32 mvr, scheme;
1370 u16 revision, major, minor; 1246 u16 revision, major, minor;
@@ -1389,7 +1265,7 @@ static void omap_serial_fill_features_erratas(struct uart_omap_port *up)
1389 minor = (mvr & OMAP_UART_MVR_MIN_MASK); 1265 minor = (mvr & OMAP_UART_MVR_MIN_MASK);
1390 break; 1266 break;
1391 default: 1267 default:
1392 dev_warn(&up->pdev->dev, 1268 dev_warn(up->dev,
1393 "Unknown %s revision, defaulting to highest\n", 1269 "Unknown %s revision, defaulting to highest\n",
1394 up->name); 1270 up->name);
1395 /* highest possible revision */ 1271 /* highest possible revision */
@@ -1417,7 +1293,7 @@ static void omap_serial_fill_features_erratas(struct uart_omap_port *up)
1417 } 1293 }
1418} 1294}
1419 1295
1420static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev) 1296static __devinit struct omap_uart_port_info *of_get_uart_port_info(struct device *dev)
1421{ 1297{
1422 struct omap_uart_port_info *omap_up_info; 1298 struct omap_uart_port_info *omap_up_info;
1423 1299
@@ -1430,12 +1306,12 @@ static struct omap_uart_port_info *of_get_uart_port_info(struct device *dev)
1430 return omap_up_info; 1306 return omap_up_info;
1431} 1307}
1432 1308
1433static int serial_omap_probe(struct platform_device *pdev) 1309static int __devinit serial_omap_probe(struct platform_device *pdev)
1434{ 1310{
1435 struct uart_omap_port *up; 1311 struct uart_omap_port *up;
1436 struct resource *mem, *irq, *dma_tx, *dma_rx; 1312 struct resource *mem, *irq;
1437 struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data; 1313 struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data;
1438 int ret = -ENOSPC; 1314 int ret;
1439 1315
1440 if (pdev->dev.of_node) 1316 if (pdev->dev.of_node)
1441 omap_up_info = of_get_uart_port_info(&pdev->dev); 1317 omap_up_info = of_get_uart_port_info(&pdev->dev);
@@ -1458,19 +1334,30 @@ static int serial_omap_probe(struct platform_device *pdev)
1458 return -EBUSY; 1334 return -EBUSY;
1459 } 1335 }
1460 1336
1461 dma_rx = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx"); 1337 if (gpio_is_valid(omap_up_info->DTR_gpio) &&
1462 if (!dma_rx) 1338 omap_up_info->DTR_present) {
1463 return -ENXIO; 1339 ret = gpio_request(omap_up_info->DTR_gpio, "omap-serial");
1464 1340 if (ret < 0)
1465 dma_tx = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx"); 1341 return ret;
1466 if (!dma_tx) 1342 ret = gpio_direction_output(omap_up_info->DTR_gpio,
1467 return -ENXIO; 1343 omap_up_info->DTR_inverted);
1344 if (ret < 0)
1345 return ret;
1346 }
1468 1347
1469 up = devm_kzalloc(&pdev->dev, sizeof(*up), GFP_KERNEL); 1348 up = devm_kzalloc(&pdev->dev, sizeof(*up), GFP_KERNEL);
1470 if (!up) 1349 if (!up)
1471 return -ENOMEM; 1350 return -ENOMEM;
1472 1351
1473 up->pdev = pdev; 1352 if (gpio_is_valid(omap_up_info->DTR_gpio) &&
1353 omap_up_info->DTR_present) {
1354 up->DTR_gpio = omap_up_info->DTR_gpio;
1355 up->DTR_inverted = omap_up_info->DTR_inverted;
1356 } else
1357 up->DTR_gpio = -EINVAL;
1358 up->DTR_active = 0;
1359
1360 up->dev = &pdev->dev;
1474 up->port.dev = &pdev->dev; 1361 up->port.dev = &pdev->dev;
1475 up->port.type = PORT_OMAP; 1362 up->port.type = PORT_OMAP;
1476 up->port.iotype = UPIO_MEM; 1363 up->port.iotype = UPIO_MEM;
@@ -1492,6 +1379,13 @@ static int serial_omap_probe(struct platform_device *pdev)
1492 goto err_port_line; 1379 goto err_port_line;
1493 } 1380 }
1494 1381
1382 up->pins = devm_pinctrl_get_select_default(&pdev->dev);
1383 if (IS_ERR(up->pins)) {
1384 dev_warn(&pdev->dev, "did not get pins for uart%i error: %li\n",
1385 up->port.line, PTR_ERR(up->pins));
1386 up->pins = NULL;
1387 }
1388
1495 sprintf(up->name, "OMAP UART%d", up->port.line); 1389 sprintf(up->name, "OMAP UART%d", up->port.line);
1496 up->port.mapbase = mem->start; 1390 up->port.mapbase = mem->start;
1497 up->port.membase = devm_ioremap(&pdev->dev, mem->start, 1391 up->port.membase = devm_ioremap(&pdev->dev, mem->start,
@@ -1509,20 +1403,6 @@ static int serial_omap_probe(struct platform_device *pdev)
1509 dev_warn(&pdev->dev, "No clock speed specified: using default:" 1403 dev_warn(&pdev->dev, "No clock speed specified: using default:"
1510 "%d\n", DEFAULT_CLK_SPEED); 1404 "%d\n", DEFAULT_CLK_SPEED);
1511 } 1405 }
1512 up->uart_dma.uart_base = mem->start;
1513
1514 if (omap_up_info->dma_enabled) {
1515 up->uart_dma.uart_dma_tx = dma_tx->start;
1516 up->uart_dma.uart_dma_rx = dma_rx->start;
1517 up->use_dma = 1;
1518 up->uart_dma.rx_buf_size = omap_up_info->dma_rx_buf_size;
1519 up->uart_dma.rx_timeout = omap_up_info->dma_rx_timeout;
1520 up->uart_dma.rx_poll_rate = omap_up_info->dma_rx_poll_rate;
1521 spin_lock_init(&(up->uart_dma.tx_lock));
1522 spin_lock_init(&(up->uart_dma.rx_lock));
1523 up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
1524 up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
1525 }
1526 1406
1527 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 1407 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
1528 up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 1408 up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
@@ -1531,12 +1411,13 @@ static int serial_omap_probe(struct platform_device *pdev)
1531 serial_omap_uart_wq = create_singlethread_workqueue(up->name); 1411 serial_omap_uart_wq = create_singlethread_workqueue(up->name);
1532 INIT_WORK(&up->qos_work, serial_omap_uart_qos_work); 1412 INIT_WORK(&up->qos_work, serial_omap_uart_qos_work);
1533 1413
1414 platform_set_drvdata(pdev, up);
1415 pm_runtime_enable(&pdev->dev);
1534 pm_runtime_use_autosuspend(&pdev->dev); 1416 pm_runtime_use_autosuspend(&pdev->dev);
1535 pm_runtime_set_autosuspend_delay(&pdev->dev, 1417 pm_runtime_set_autosuspend_delay(&pdev->dev,
1536 omap_up_info->autosuspend_timeout); 1418 omap_up_info->autosuspend_timeout);
1537 1419
1538 pm_runtime_irq_safe(&pdev->dev); 1420 pm_runtime_irq_safe(&pdev->dev);
1539 pm_runtime_enable(&pdev->dev);
1540 pm_runtime_get_sync(&pdev->dev); 1421 pm_runtime_get_sync(&pdev->dev);
1541 1422
1542 omap_serial_fill_features_erratas(up); 1423 omap_serial_fill_features_erratas(up);
@@ -1548,8 +1429,8 @@ static int serial_omap_probe(struct platform_device *pdev)
1548 if (ret != 0) 1429 if (ret != 0)
1549 goto err_add_port; 1430 goto err_add_port;
1550 1431
1551 pm_runtime_put(&pdev->dev); 1432 pm_runtime_mark_last_busy(up->dev);
1552 platform_set_drvdata(pdev, up); 1433 pm_runtime_put_autosuspend(up->dev);
1553 return 0; 1434 return 0;
1554 1435
1555err_add_port: 1436err_add_port:
@@ -1562,17 +1443,15 @@ err_port_line:
1562 return ret; 1443 return ret;
1563} 1444}
1564 1445
1565static int serial_omap_remove(struct platform_device *dev) 1446static int __devexit serial_omap_remove(struct platform_device *dev)
1566{ 1447{
1567 struct uart_omap_port *up = platform_get_drvdata(dev); 1448 struct uart_omap_port *up = platform_get_drvdata(dev);
1568 1449
1569 if (up) { 1450 pm_runtime_put_sync(up->dev);
1570 pm_runtime_disable(&up->pdev->dev); 1451 pm_runtime_disable(up->dev);
1571 uart_remove_one_port(&serial_omap_reg, &up->port); 1452 uart_remove_one_port(&serial_omap_reg, &up->port);
1572 pm_qos_remove_request(&up->pm_qos_request); 1453 pm_qos_remove_request(&up->pm_qos_request);
1573 }
1574 1454
1575 platform_set_drvdata(dev, NULL);
1576 return 0; 1455 return 0;
1577} 1456}
1578 1457
@@ -1602,7 +1481,7 @@ static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1)
1602 timeout--; 1481 timeout--;
1603 if (!timeout) { 1482 if (!timeout) {
1604 /* Should *never* happen. we warn and carry on */ 1483 /* Should *never* happen. we warn and carry on */
1605 dev_crit(&up->pdev->dev, "Errata i202: timedout %x\n", 1484 dev_crit(up->dev, "Errata i202: timedout %x\n",
1606 serial_in(up, UART_LSR)); 1485 serial_in(up, UART_LSR));
1607 break; 1486 break;
1608 } 1487 }
@@ -1648,29 +1527,23 @@ static int serial_omap_runtime_suspend(struct device *dev)
1648 if (!up) 1527 if (!up)
1649 return -EINVAL; 1528 return -EINVAL;
1650 1529
1651 if (!pdata || !pdata->enable_wakeup) 1530 if (!pdata)
1652 return 0; 1531 return 0;
1653 1532
1654 if (pdata->get_context_loss_count) 1533 up->context_loss_cnt = serial_omap_get_context_loss_count(up);
1655 up->context_loss_cnt = pdata->get_context_loss_count(dev);
1656 1534
1657 if (device_may_wakeup(dev)) { 1535 if (device_may_wakeup(dev)) {
1658 if (!up->wakeups_enabled) { 1536 if (!up->wakeups_enabled) {
1659 pdata->enable_wakeup(up->pdev, true); 1537 serial_omap_enable_wakeup(up, true);
1660 up->wakeups_enabled = true; 1538 up->wakeups_enabled = true;
1661 } 1539 }
1662 } else { 1540 } else {
1663 if (up->wakeups_enabled) { 1541 if (up->wakeups_enabled) {
1664 pdata->enable_wakeup(up->pdev, false); 1542 serial_omap_enable_wakeup(up, false);
1665 up->wakeups_enabled = false; 1543 up->wakeups_enabled = false;
1666 } 1544 }
1667 } 1545 }
1668 1546
1669 /* Errata i291 */
1670 if (up->use_dma && pdata->set_forceidle &&
1671 (up->errata & UART_ERRATA_i291_DMA_FORCEIDLE))
1672 pdata->set_forceidle(up->pdev);
1673
1674 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; 1547 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE;
1675 schedule_work(&up->qos_work); 1548 schedule_work(&up->qos_work);
1676 1549
@@ -1683,17 +1556,10 @@ static int serial_omap_runtime_resume(struct device *dev)
1683 struct omap_uart_port_info *pdata = dev->platform_data; 1556 struct omap_uart_port_info *pdata = dev->platform_data;
1684 1557
1685 if (up && pdata) { 1558 if (up && pdata) {
1686 if (pdata->get_context_loss_count) { 1559 u32 loss_cnt = serial_omap_get_context_loss_count(up);
1687 u32 loss_cnt = pdata->get_context_loss_count(dev);
1688 1560
1689 if (up->context_loss_cnt != loss_cnt) 1561 if (up->context_loss_cnt != loss_cnt)
1690 serial_omap_restore_context(up); 1562 serial_omap_restore_context(up);
1691 }
1692
1693 /* Errata i291 */
1694 if (up->use_dma && pdata->set_noidle &&
1695 (up->errata & UART_ERRATA_i291_DMA_FORCEIDLE))
1696 pdata->set_noidle(up->pdev);
1697 1563
1698 up->latency = up->calc_latency; 1564 up->latency = up->calc_latency;
1699 schedule_work(&up->qos_work); 1565 schedule_work(&up->qos_work);
@@ -1721,7 +1587,7 @@ MODULE_DEVICE_TABLE(of, omap_serial_of_match);
1721 1587
1722static struct platform_driver serial_omap_driver = { 1588static struct platform_driver serial_omap_driver = {
1723 .probe = serial_omap_probe, 1589 .probe = serial_omap_probe,
1724 .remove = serial_omap_remove, 1590 .remove = __devexit_p(serial_omap_remove),
1725 .driver = { 1591 .driver = {
1726 .name = DRIVER_NAME, 1592 .name = DRIVER_NAME,
1727 .pm = &serial_omap_dev_pm_ops, 1593 .pm = &serial_omap_dev_pm_ops,