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Diffstat (limited to 'drivers/tty/serial/8250/8250.c')
-rw-r--r--drivers/tty/serial/8250/8250.c312
1 files changed, 150 insertions, 162 deletions
diff --git a/drivers/tty/serial/8250/8250.c b/drivers/tty/serial/8250/8250.c
index 5c27f7e6c9f1..47d061b9ad4d 100644
--- a/drivers/tty/serial/8250/8250.c
+++ b/drivers/tty/serial/8250/8250.c
@@ -284,7 +284,20 @@ static const struct serial8250_config uart_config[] = {
284 }, 284 },
285}; 285};
286 286
287#if defined(CONFIG_MIPS_ALCHEMY) 287/* Uart divisor latch read */
288static int default_serial_dl_read(struct uart_8250_port *up)
289{
290 return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8;
291}
292
293/* Uart divisor latch write */
294static void default_serial_dl_write(struct uart_8250_port *up, int value)
295{
296 serial_out(up, UART_DLL, value & 0xff);
297 serial_out(up, UART_DLM, value >> 8 & 0xff);
298}
299
300#ifdef CONFIG_MIPS_ALCHEMY
288 301
289/* Au1x00 UART hardware has a weird register layout */ 302/* Au1x00 UART hardware has a weird register layout */
290static const u8 au_io_in_map[] = { 303static const u8 au_io_in_map[] = {
@@ -305,22 +318,32 @@ static const u8 au_io_out_map[] = {
305 [UART_MCR] = 6, 318 [UART_MCR] = 6,
306}; 319};
307 320
308/* sane hardware needs no mapping */ 321static unsigned int au_serial_in(struct uart_port *p, int offset)
309static inline int map_8250_in_reg(struct uart_port *p, int offset) 322{
323 offset = au_io_in_map[offset] << p->regshift;
324 return __raw_readl(p->membase + offset);
325}
326
327static void au_serial_out(struct uart_port *p, int offset, int value)
328{
329 offset = au_io_out_map[offset] << p->regshift;
330 __raw_writel(value, p->membase + offset);
331}
332
333/* Au1x00 haven't got a standard divisor latch */
334static int au_serial_dl_read(struct uart_8250_port *up)
310{ 335{
311 if (p->iotype != UPIO_AU) 336 return __raw_readl(up->port.membase + 0x28);
312 return offset;
313 return au_io_in_map[offset];
314} 337}
315 338
316static inline int map_8250_out_reg(struct uart_port *p, int offset) 339static void au_serial_dl_write(struct uart_8250_port *up, int value)
317{ 340{
318 if (p->iotype != UPIO_AU) 341 __raw_writel(value, up->port.membase + 0x28);
319 return offset;
320 return au_io_out_map[offset];
321} 342}
322 343
323#elif defined(CONFIG_SERIAL_8250_RM9K) 344#endif
345
346#ifdef CONFIG_SERIAL_8250_RM9K
324 347
325static const u8 348static const u8
326 regmap_in[8] = { 349 regmap_in[8] = {
@@ -344,87 +367,79 @@ static const u8
344 [UART_SCR] = 0x2c 367 [UART_SCR] = 0x2c
345 }; 368 };
346 369
347static inline int map_8250_in_reg(struct uart_port *p, int offset) 370static unsigned int rm9k_serial_in(struct uart_port *p, int offset)
348{ 371{
349 if (p->iotype != UPIO_RM9000) 372 offset = regmap_in[offset] << p->regshift;
350 return offset; 373 return readl(p->membase + offset);
351 return regmap_in[offset];
352} 374}
353 375
354static inline int map_8250_out_reg(struct uart_port *p, int offset) 376static void rm9k_serial_out(struct uart_port *p, int offset, int value)
355{ 377{
356 if (p->iotype != UPIO_RM9000) 378 offset = regmap_out[offset] << p->regshift;
357 return offset; 379 writel(value, p->membase + offset);
358 return regmap_out[offset];
359} 380}
360 381
361#else 382static int rm9k_serial_dl_read(struct uart_8250_port *up)
383{
384 return ((__raw_readl(up->port.membase + 0x10) << 8) |
385 (__raw_readl(up->port.membase + 0x08) & 0xff)) & 0xffff;
386}
362 387
363/* sane hardware needs no mapping */ 388static void rm9k_serial_dl_write(struct uart_8250_port *up, int value)
364#define map_8250_in_reg(up, offset) (offset) 389{
365#define map_8250_out_reg(up, offset) (offset) 390 __raw_writel(value, up->port.membase + 0x08);
391 __raw_writel(value >> 8, up->port.membase + 0x10);
392}
366 393
367#endif 394#endif
368 395
369static unsigned int hub6_serial_in(struct uart_port *p, int offset) 396static unsigned int hub6_serial_in(struct uart_port *p, int offset)
370{ 397{
371 offset = map_8250_in_reg(p, offset) << p->regshift; 398 offset = offset << p->regshift;
372 outb(p->hub6 - 1 + offset, p->iobase); 399 outb(p->hub6 - 1 + offset, p->iobase);
373 return inb(p->iobase + 1); 400 return inb(p->iobase + 1);
374} 401}
375 402
376static void hub6_serial_out(struct uart_port *p, int offset, int value) 403static void hub6_serial_out(struct uart_port *p, int offset, int value)
377{ 404{
378 offset = map_8250_out_reg(p, offset) << p->regshift; 405 offset = offset << p->regshift;
379 outb(p->hub6 - 1 + offset, p->iobase); 406 outb(p->hub6 - 1 + offset, p->iobase);
380 outb(value, p->iobase + 1); 407 outb(value, p->iobase + 1);
381} 408}
382 409
383static unsigned int mem_serial_in(struct uart_port *p, int offset) 410static unsigned int mem_serial_in(struct uart_port *p, int offset)
384{ 411{
385 offset = map_8250_in_reg(p, offset) << p->regshift; 412 offset = offset << p->regshift;
386 return readb(p->membase + offset); 413 return readb(p->membase + offset);
387} 414}
388 415
389static void mem_serial_out(struct uart_port *p, int offset, int value) 416static void mem_serial_out(struct uart_port *p, int offset, int value)
390{ 417{
391 offset = map_8250_out_reg(p, offset) << p->regshift; 418 offset = offset << p->regshift;
392 writeb(value, p->membase + offset); 419 writeb(value, p->membase + offset);
393} 420}
394 421
395static void mem32_serial_out(struct uart_port *p, int offset, int value) 422static void mem32_serial_out(struct uart_port *p, int offset, int value)
396{ 423{
397 offset = map_8250_out_reg(p, offset) << p->regshift; 424 offset = offset << p->regshift;
398 writel(value, p->membase + offset); 425 writel(value, p->membase + offset);
399} 426}
400 427
401static unsigned int mem32_serial_in(struct uart_port *p, int offset) 428static unsigned int mem32_serial_in(struct uart_port *p, int offset)
402{ 429{
403 offset = map_8250_in_reg(p, offset) << p->regshift; 430 offset = offset << p->regshift;
404 return readl(p->membase + offset); 431 return readl(p->membase + offset);
405} 432}
406 433
407static unsigned int au_serial_in(struct uart_port *p, int offset)
408{
409 offset = map_8250_in_reg(p, offset) << p->regshift;
410 return __raw_readl(p->membase + offset);
411}
412
413static void au_serial_out(struct uart_port *p, int offset, int value)
414{
415 offset = map_8250_out_reg(p, offset) << p->regshift;
416 __raw_writel(value, p->membase + offset);
417}
418
419static unsigned int io_serial_in(struct uart_port *p, int offset) 434static unsigned int io_serial_in(struct uart_port *p, int offset)
420{ 435{
421 offset = map_8250_in_reg(p, offset) << p->regshift; 436 offset = offset << p->regshift;
422 return inb(p->iobase + offset); 437 return inb(p->iobase + offset);
423} 438}
424 439
425static void io_serial_out(struct uart_port *p, int offset, int value) 440static void io_serial_out(struct uart_port *p, int offset, int value)
426{ 441{
427 offset = map_8250_out_reg(p, offset) << p->regshift; 442 offset = offset << p->regshift;
428 outb(value, p->iobase + offset); 443 outb(value, p->iobase + offset);
429} 444}
430 445
@@ -434,6 +449,10 @@ static void set_io_from_upio(struct uart_port *p)
434{ 449{
435 struct uart_8250_port *up = 450 struct uart_8250_port *up =
436 container_of(p, struct uart_8250_port, port); 451 container_of(p, struct uart_8250_port, port);
452
453 up->dl_read = default_serial_dl_read;
454 up->dl_write = default_serial_dl_write;
455
437 switch (p->iotype) { 456 switch (p->iotype) {
438 case UPIO_HUB6: 457 case UPIO_HUB6:
439 p->serial_in = hub6_serial_in; 458 p->serial_in = hub6_serial_in;
@@ -445,16 +464,28 @@ static void set_io_from_upio(struct uart_port *p)
445 p->serial_out = mem_serial_out; 464 p->serial_out = mem_serial_out;
446 break; 465 break;
447 466
448 case UPIO_RM9000:
449 case UPIO_MEM32: 467 case UPIO_MEM32:
450 p->serial_in = mem32_serial_in; 468 p->serial_in = mem32_serial_in;
451 p->serial_out = mem32_serial_out; 469 p->serial_out = mem32_serial_out;
452 break; 470 break;
453 471
472#ifdef CONFIG_SERIAL_8250_RM9K
473 case UPIO_RM9000:
474 p->serial_in = rm9k_serial_in;
475 p->serial_out = rm9k_serial_out;
476 up->dl_read = rm9k_serial_dl_read;
477 up->dl_write = rm9k_serial_dl_write;
478 break;
479#endif
480
481#ifdef CONFIG_MIPS_ALCHEMY
454 case UPIO_AU: 482 case UPIO_AU:
455 p->serial_in = au_serial_in; 483 p->serial_in = au_serial_in;
456 p->serial_out = au_serial_out; 484 p->serial_out = au_serial_out;
485 up->dl_read = au_serial_dl_read;
486 up->dl_write = au_serial_dl_write;
457 break; 487 break;
488#endif
458 489
459 default: 490 default:
460 p->serial_in = io_serial_in; 491 p->serial_in = io_serial_in;
@@ -481,59 +512,6 @@ serial_port_out_sync(struct uart_port *p, int offset, int value)
481 } 512 }
482} 513}
483 514
484/* Uart divisor latch read */
485static inline int _serial_dl_read(struct uart_8250_port *up)
486{
487 return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8;
488}
489
490/* Uart divisor latch write */
491static inline void _serial_dl_write(struct uart_8250_port *up, int value)
492{
493 serial_out(up, UART_DLL, value & 0xff);
494 serial_out(up, UART_DLM, value >> 8 & 0xff);
495}
496
497#if defined(CONFIG_MIPS_ALCHEMY)
498/* Au1x00 haven't got a standard divisor latch */
499static int serial_dl_read(struct uart_8250_port *up)
500{
501 if (up->port.iotype == UPIO_AU)
502 return __raw_readl(up->port.membase + 0x28);
503 else
504 return _serial_dl_read(up);
505}
506
507static void serial_dl_write(struct uart_8250_port *up, int value)
508{
509 if (up->port.iotype == UPIO_AU)
510 __raw_writel(value, up->port.membase + 0x28);
511 else
512 _serial_dl_write(up, value);
513}
514#elif defined(CONFIG_SERIAL_8250_RM9K)
515static int serial_dl_read(struct uart_8250_port *up)
516{
517 return (up->port.iotype == UPIO_RM9000) ?
518 (((__raw_readl(up->port.membase + 0x10) << 8) |
519 (__raw_readl(up->port.membase + 0x08) & 0xff)) & 0xffff) :
520 _serial_dl_read(up);
521}
522
523static void serial_dl_write(struct uart_8250_port *up, int value)
524{
525 if (up->port.iotype == UPIO_RM9000) {
526 __raw_writel(value, up->port.membase + 0x08);
527 __raw_writel(value >> 8, up->port.membase + 0x10);
528 } else {
529 _serial_dl_write(up, value);
530 }
531}
532#else
533#define serial_dl_read(up) _serial_dl_read(up)
534#define serial_dl_write(up, value) _serial_dl_write(up, value)
535#endif
536
537/* 515/*
538 * For the 16C950 516 * For the 16C950
539 */ 517 */
@@ -568,6 +546,16 @@ static void serial8250_clear_fifos(struct uart_8250_port *p)
568 } 546 }
569} 547}
570 548
549void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p)
550{
551 unsigned char fcr;
552
553 serial8250_clear_fifos(p);
554 fcr = uart_config[p->port.type].fcr;
555 serial_out(p, UART_FCR, fcr);
556}
557EXPORT_SYMBOL_GPL(serial8250_clear_and_reinit_fifos);
558
571/* 559/*
572 * IER sleep support. UARTs which have EFRs need the "extended 560 * IER sleep support. UARTs which have EFRs need the "extended
573 * capability" bit enabled. Note that on XR16C850s, we need to 561 * capability" bit enabled. Note that on XR16C850s, we need to
@@ -1332,27 +1320,6 @@ static void serial8250_enable_ms(struct uart_port *port)
1332} 1320}
1333 1321
1334/* 1322/*
1335 * Clear the Tegra rx fifo after a break
1336 *
1337 * FIXME: This needs to become a port specific callback once we have a
1338 * framework for this
1339 */
1340static void clear_rx_fifo(struct uart_8250_port *up)
1341{
1342 unsigned int status, tmout = 10000;
1343 do {
1344 status = serial_in(up, UART_LSR);
1345 if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
1346 status = serial_in(up, UART_RX);
1347 else
1348 break;
1349 if (--tmout == 0)
1350 break;
1351 udelay(1);
1352 } while (1);
1353}
1354
1355/*
1356 * serial8250_rx_chars: processes according to the passed in LSR 1323 * serial8250_rx_chars: processes according to the passed in LSR
1357 * value, and returns the remaining LSR bits not handled 1324 * value, and returns the remaining LSR bits not handled
1358 * by this Rx routine. 1325 * by this Rx routine.
@@ -1386,20 +1353,10 @@ serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1386 up->lsr_saved_flags = 0; 1353 up->lsr_saved_flags = 0;
1387 1354
1388 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) { 1355 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
1389 /*
1390 * For statistics only
1391 */
1392 if (lsr & UART_LSR_BI) { 1356 if (lsr & UART_LSR_BI) {
1393 lsr &= ~(UART_LSR_FE | UART_LSR_PE); 1357 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1394 port->icount.brk++; 1358 port->icount.brk++;
1395 /* 1359 /*
1396 * If tegra port then clear the rx fifo to
1397 * accept another break/character.
1398 */
1399 if (port->type == PORT_TEGRA)
1400 clear_rx_fifo(up);
1401
1402 /*
1403 * We do the SysRQ and SAK checking 1360 * We do the SysRQ and SAK checking
1404 * here because otherwise the break 1361 * here because otherwise the break
1405 * may get masked by ignore_status_mask 1362 * may get masked by ignore_status_mask
@@ -2280,10 +2237,11 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2280 quot++; 2237 quot++;
2281 2238
2282 if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) { 2239 if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) {
2283 if (baud < 2400) 2240 fcr = uart_config[port->type].fcr;
2284 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1; 2241 if (baud < 2400) {
2285 else 2242 fcr &= ~UART_FCR_TRIGGER_MASK;
2286 fcr = uart_config[port->type].fcr; 2243 fcr |= UART_FCR_TRIGGER_1;
2244 }
2287 } 2245 }
2288 2246
2289 /* 2247 /*
@@ -3037,6 +2995,7 @@ static int __devinit serial8250_probe(struct platform_device *dev)
3037 port.serial_in = p->serial_in; 2995 port.serial_in = p->serial_in;
3038 port.serial_out = p->serial_out; 2996 port.serial_out = p->serial_out;
3039 port.handle_irq = p->handle_irq; 2997 port.handle_irq = p->handle_irq;
2998 port.handle_break = p->handle_break;
3040 port.set_termios = p->set_termios; 2999 port.set_termios = p->set_termios;
3041 port.pm = p->pm; 3000 port.pm = p->pm;
3042 port.dev = &dev->dev; 3001 port.dev = &dev->dev;
@@ -3153,7 +3112,7 @@ static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *
3153} 3112}
3154 3113
3155/** 3114/**
3156 * serial8250_register_port - register a serial port 3115 * serial8250_register_8250_port - register a serial port
3157 * @port: serial port template 3116 * @port: serial port template
3158 * 3117 *
3159 * Configure the serial port specified by the request. If the 3118 * Configure the serial port specified by the request. If the
@@ -3165,50 +3124,56 @@ static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *
3165 * 3124 *
3166 * On success the port is ready to use and the line number is returned. 3125 * On success the port is ready to use and the line number is returned.
3167 */ 3126 */
3168int serial8250_register_port(struct uart_port *port) 3127int serial8250_register_8250_port(struct uart_8250_port *up)
3169{ 3128{
3170 struct uart_8250_port *uart; 3129 struct uart_8250_port *uart;
3171 int ret = -ENOSPC; 3130 int ret = -ENOSPC;
3172 3131
3173 if (port->uartclk == 0) 3132 if (up->port.uartclk == 0)
3174 return -EINVAL; 3133 return -EINVAL;
3175 3134
3176 mutex_lock(&serial_mutex); 3135 mutex_lock(&serial_mutex);
3177 3136
3178 uart = serial8250_find_match_or_unused(port); 3137 uart = serial8250_find_match_or_unused(&up->port);
3179 if (uart) { 3138 if (uart) {
3180 uart_remove_one_port(&serial8250_reg, &uart->port); 3139 uart_remove_one_port(&serial8250_reg, &uart->port);
3181 3140
3182 uart->port.iobase = port->iobase; 3141 uart->port.iobase = up->port.iobase;
3183 uart->port.membase = port->membase; 3142 uart->port.membase = up->port.membase;
3184 uart->port.irq = port->irq; 3143 uart->port.irq = up->port.irq;
3185 uart->port.irqflags = port->irqflags; 3144 uart->port.irqflags = up->port.irqflags;
3186 uart->port.uartclk = port->uartclk; 3145 uart->port.uartclk = up->port.uartclk;
3187 uart->port.fifosize = port->fifosize; 3146 uart->port.fifosize = up->port.fifosize;
3188 uart->port.regshift = port->regshift; 3147 uart->port.regshift = up->port.regshift;
3189 uart->port.iotype = port->iotype; 3148 uart->port.iotype = up->port.iotype;
3190 uart->port.flags = port->flags | UPF_BOOT_AUTOCONF; 3149 uart->port.flags = up->port.flags | UPF_BOOT_AUTOCONF;
3191 uart->port.mapbase = port->mapbase; 3150 uart->port.mapbase = up->port.mapbase;
3192 uart->port.private_data = port->private_data; 3151 uart->port.private_data = up->port.private_data;
3193 if (port->dev) 3152 if (up->port.dev)
3194 uart->port.dev = port->dev; 3153 uart->port.dev = up->port.dev;
3195 3154
3196 if (port->flags & UPF_FIXED_TYPE) 3155 if (up->port.flags & UPF_FIXED_TYPE)
3197 serial8250_init_fixed_type_port(uart, port->type); 3156 serial8250_init_fixed_type_port(uart, up->port.type);
3198 3157
3199 set_io_from_upio(&uart->port); 3158 set_io_from_upio(&uart->port);
3200 /* Possibly override default I/O functions. */ 3159 /* Possibly override default I/O functions. */
3201 if (port->serial_in) 3160 if (up->port.serial_in)
3202 uart->port.serial_in = port->serial_in; 3161 uart->port.serial_in = up->port.serial_in;
3203 if (port->serial_out) 3162 if (up->port.serial_out)
3204 uart->port.serial_out = port->serial_out; 3163 uart->port.serial_out = up->port.serial_out;
3205 if (port->handle_irq) 3164 if (up->port.handle_irq)
3206 uart->port.handle_irq = port->handle_irq; 3165 uart->port.handle_irq = up->port.handle_irq;
3207 /* Possibly override set_termios call */ 3166 /* Possibly override set_termios call */
3208 if (port->set_termios) 3167 if (up->port.set_termios)
3209 uart->port.set_termios = port->set_termios; 3168 uart->port.set_termios = up->port.set_termios;
3210 if (port->pm) 3169 if (up->port.pm)
3211 uart->port.pm = port->pm; 3170 uart->port.pm = up->port.pm;
3171 if (up->port.handle_break)
3172 uart->port.handle_break = up->port.handle_break;
3173 if (up->dl_read)
3174 uart->dl_read = up->dl_read;
3175 if (up->dl_write)
3176 uart->dl_write = up->dl_write;
3212 3177
3213 if (serial8250_isa_config != NULL) 3178 if (serial8250_isa_config != NULL)
3214 serial8250_isa_config(0, &uart->port, 3179 serial8250_isa_config(0, &uart->port,
@@ -3222,6 +3187,29 @@ int serial8250_register_port(struct uart_port *port)
3222 3187
3223 return ret; 3188 return ret;
3224} 3189}
3190EXPORT_SYMBOL(serial8250_register_8250_port);
3191
3192/**
3193 * serial8250_register_port - register a serial port
3194 * @port: serial port template
3195 *
3196 * Configure the serial port specified by the request. If the
3197 * port exists and is in use, it is hung up and unregistered
3198 * first.
3199 *
3200 * The port is then probed and if necessary the IRQ is autodetected
3201 * If this fails an error is returned.
3202 *
3203 * On success the port is ready to use and the line number is returned.
3204 */
3205int serial8250_register_port(struct uart_port *port)
3206{
3207 struct uart_8250_port up;
3208
3209 memset(&up, 0, sizeof(up));
3210 memcpy(&up.port, port, sizeof(*port));
3211 return serial8250_register_8250_port(&up);
3212}
3225EXPORT_SYMBOL(serial8250_register_port); 3213EXPORT_SYMBOL(serial8250_register_port);
3226 3214
3227/** 3215/**