diff options
Diffstat (limited to 'drivers/ssb/driver_pcicore.c')
-rw-r--r-- | drivers/ssb/driver_pcicore.c | 29 |
1 files changed, 0 insertions, 29 deletions
diff --git a/drivers/ssb/driver_pcicore.c b/drivers/ssb/driver_pcicore.c index f1dcd7969a5c..0e8d35224614 100644 --- a/drivers/ssb/driver_pcicore.c +++ b/drivers/ssb/driver_pcicore.c | |||
@@ -246,20 +246,12 @@ static struct pci_controller ssb_pcicore_controller = { | |||
246 | .pci_ops = &ssb_pcicore_pciops, | 246 | .pci_ops = &ssb_pcicore_pciops, |
247 | .io_resource = &ssb_pcicore_io_resource, | 247 | .io_resource = &ssb_pcicore_io_resource, |
248 | .mem_resource = &ssb_pcicore_mem_resource, | 248 | .mem_resource = &ssb_pcicore_mem_resource, |
249 | .mem_offset = 0x24000000, | ||
250 | }; | 249 | }; |
251 | 250 | ||
252 | static u32 ssb_pcicore_pcibus_iobase = 0x100; | ||
253 | static u32 ssb_pcicore_pcibus_membase = SSB_PCI_DMA; | ||
254 | |||
255 | /* This function is called when doing a pci_enable_device(). | 251 | /* This function is called when doing a pci_enable_device(). |
256 | * We must first check if the device is a device on the PCI-core bridge. */ | 252 | * We must first check if the device is a device on the PCI-core bridge. */ |
257 | int ssb_pcicore_plat_dev_init(struct pci_dev *d) | 253 | int ssb_pcicore_plat_dev_init(struct pci_dev *d) |
258 | { | 254 | { |
259 | struct resource *res; | ||
260 | int pos, size; | ||
261 | u32 *base; | ||
262 | |||
263 | if (d->bus->ops != &ssb_pcicore_pciops) { | 255 | if (d->bus->ops != &ssb_pcicore_pciops) { |
264 | /* This is not a device on the PCI-core bridge. */ | 256 | /* This is not a device on the PCI-core bridge. */ |
265 | return -ENODEV; | 257 | return -ENODEV; |
@@ -268,27 +260,6 @@ int ssb_pcicore_plat_dev_init(struct pci_dev *d) | |||
268 | ssb_printk(KERN_INFO "PCI: Fixing up device %s\n", | 260 | ssb_printk(KERN_INFO "PCI: Fixing up device %s\n", |
269 | pci_name(d)); | 261 | pci_name(d)); |
270 | 262 | ||
271 | /* Fix up resource bases */ | ||
272 | for (pos = 0; pos < 6; pos++) { | ||
273 | res = &d->resource[pos]; | ||
274 | if (res->flags & IORESOURCE_IO) | ||
275 | base = &ssb_pcicore_pcibus_iobase; | ||
276 | else | ||
277 | base = &ssb_pcicore_pcibus_membase; | ||
278 | res->flags |= IORESOURCE_PCI_FIXED; | ||
279 | if (res->end) { | ||
280 | size = res->end - res->start + 1; | ||
281 | if (*base & (size - 1)) | ||
282 | *base = (*base + size) & ~(size - 1); | ||
283 | res->start = *base; | ||
284 | res->end = res->start + size - 1; | ||
285 | *base += size; | ||
286 | pci_write_config_dword(d, PCI_BASE_ADDRESS_0 + (pos << 2), res->start); | ||
287 | } | ||
288 | /* Fix up PCI bridge BAR0 only */ | ||
289 | if (d->bus->number == 0 && PCI_SLOT(d->devfn) == 0) | ||
290 | break; | ||
291 | } | ||
292 | /* Fix up interrupt lines */ | 263 | /* Fix up interrupt lines */ |
293 | d->irq = ssb_mips_irq(extpci_core->dev) + 2; | 264 | d->irq = ssb_mips_irq(extpci_core->dev) + 2; |
294 | pci_write_config_byte(d, PCI_INTERRUPT_LINE, d->irq); | 265 | pci_write_config_byte(d, PCI_INTERRUPT_LINE, d->irq); |