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-rw-r--r--drivers/spi/omap_uwire.c4
-rw-r--r--drivers/spi/spi_bitbang.c2
-rw-r--r--drivers/spi/spi_mpc83xx.c2
-rw-r--r--drivers/spi/spi_s3c24xx.c2
-rw-r--r--drivers/spi/xilinx_spi.c8
5 files changed, 9 insertions, 9 deletions
diff --git a/drivers/spi/omap_uwire.c b/drivers/spi/omap_uwire.c
index 5f00bd6500ef..d9ae111c27ae 100644
--- a/drivers/spi/omap_uwire.c
+++ b/drivers/spi/omap_uwire.c
@@ -151,7 +151,7 @@ static int wait_uwire_csr_flag(u16 mask, u16 val, int might_not_catch)
151 if (time_after(jiffies, max_jiffies)) { 151 if (time_after(jiffies, max_jiffies)) {
152 printk(KERN_ERR "%s: timeout. reg=%#06x " 152 printk(KERN_ERR "%s: timeout. reg=%#06x "
153 "mask=%#06x val=%#06x\n", 153 "mask=%#06x val=%#06x\n",
154 __FUNCTION__, w, mask, val); 154 __func__, w, mask, val);
155 return -1; 155 return -1;
156 } 156 }
157 c++; 157 c++;
@@ -437,7 +437,7 @@ static int uwire_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
437 } 437 }
438 omap_uwire_configure_mode(spi->chip_select, flags); 438 omap_uwire_configure_mode(spi->chip_select, flags);
439 pr_debug("%s: uwire flags %02x, armxor %lu KHz, SCK %lu KHz\n", 439 pr_debug("%s: uwire flags %02x, armxor %lu KHz, SCK %lu KHz\n",
440 __FUNCTION__, flags, 440 __func__, flags,
441 clk_get_rate(uwire->ck) / 1000, 441 clk_get_rate(uwire->ck) / 1000,
442 rate / 1000); 442 rate / 1000);
443 status = 0; 443 status = 0;
diff --git a/drivers/spi/spi_bitbang.c b/drivers/spi/spi_bitbang.c
index 71e881419cdd..96cc39ecb6e2 100644
--- a/drivers/spi/spi_bitbang.c
+++ b/drivers/spi/spi_bitbang.c
@@ -214,7 +214,7 @@ int spi_bitbang_setup(struct spi_device *spi)
214 return retval; 214 return retval;
215 215
216 dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec/bit\n", 216 dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec/bit\n",
217 __FUNCTION__, spi->mode & (SPI_CPOL | SPI_CPHA), 217 __func__, spi->mode & (SPI_CPOL | SPI_CPHA),
218 spi->bits_per_word, 2 * cs->nsecs); 218 spi->bits_per_word, 2 * cs->nsecs);
219 219
220 /* NOTE we _need_ to call chipselect() early, ideally with adapter 220 /* NOTE we _need_ to call chipselect() early, ideally with adapter
diff --git a/drivers/spi/spi_mpc83xx.c b/drivers/spi/spi_mpc83xx.c
index be15a6213205..189f706b9e4b 100644
--- a/drivers/spi/spi_mpc83xx.c
+++ b/drivers/spi/spi_mpc83xx.c
@@ -310,7 +310,7 @@ static int mpc83xx_spi_setup(struct spi_device *spi)
310 return retval; 310 return retval;
311 311
312 dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec\n", 312 dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec\n",
313 __FUNCTION__, spi->mode & (SPI_CPOL | SPI_CPHA), 313 __func__, spi->mode & (SPI_CPOL | SPI_CPHA),
314 spi->bits_per_word, 2 * mpc83xx_spi->nsecs); 314 spi->bits_per_word, 2 * mpc83xx_spi->nsecs);
315 315
316 /* NOTE we _need_ to call chipselect() early, ideally with adapter 316 /* NOTE we _need_ to call chipselect() early, ideally with adapter
diff --git a/drivers/spi/spi_s3c24xx.c b/drivers/spi/spi_s3c24xx.c
index b7476b888197..34bfb7dd7764 100644
--- a/drivers/spi/spi_s3c24xx.c
+++ b/drivers/spi/spi_s3c24xx.c
@@ -169,7 +169,7 @@ static int s3c24xx_spi_setup(struct spi_device *spi)
169 } 169 }
170 170
171 dev_dbg(&spi->dev, "%s: mode %d, %u bpw, %d hz\n", 171 dev_dbg(&spi->dev, "%s: mode %d, %u bpw, %d hz\n",
172 __FUNCTION__, spi->mode, spi->bits_per_word, 172 __func__, spi->mode, spi->bits_per_word,
173 spi->max_speed_hz); 173 spi->max_speed_hz);
174 174
175 return 0; 175 return 0;
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
index cf6aef34fe25..113a0468ffcb 100644
--- a/drivers/spi/xilinx_spi.c
+++ b/drivers/spi/xilinx_spi.c
@@ -151,13 +151,13 @@ static int xilinx_spi_setup_transfer(struct spi_device *spi,
151 hz = (t) ? t->speed_hz : spi->max_speed_hz; 151 hz = (t) ? t->speed_hz : spi->max_speed_hz;
152 if (bits_per_word != 8) { 152 if (bits_per_word != 8) {
153 dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n", 153 dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n",
154 __FUNCTION__, bits_per_word); 154 __func__, bits_per_word);
155 return -EINVAL; 155 return -EINVAL;
156 } 156 }
157 157
158 if (hz && xspi->speed_hz > hz) { 158 if (hz && xspi->speed_hz > hz) {
159 dev_err(&spi->dev, "%s, unsupported clock rate %uHz\n", 159 dev_err(&spi->dev, "%s, unsupported clock rate %uHz\n",
160 __FUNCTION__, hz); 160 __func__, hz);
161 return -EINVAL; 161 return -EINVAL;
162 } 162 }
163 163
@@ -181,7 +181,7 @@ static int xilinx_spi_setup(struct spi_device *spi)
181 181
182 if (spi->mode & ~MODEBITS) { 182 if (spi->mode & ~MODEBITS) {
183 dev_err(&spi->dev, "%s, unsupported mode bits %x\n", 183 dev_err(&spi->dev, "%s, unsupported mode bits %x\n",
184 __FUNCTION__, spi->mode & ~MODEBITS); 184 __func__, spi->mode & ~MODEBITS);
185 return -EINVAL; 185 return -EINVAL;
186 } 186 }
187 187
@@ -190,7 +190,7 @@ static int xilinx_spi_setup(struct spi_device *spi)
190 return retval; 190 return retval;
191 191
192 dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec/bit\n", 192 dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec/bit\n",
193 __FUNCTION__, spi->mode & MODEBITS, spi->bits_per_word, 0); 193 __func__, spi->mode & MODEBITS, spi->bits_per_word, 0);
194 194
195 return 0; 195 return 0;
196} 196}