diff options
Diffstat (limited to 'drivers/spi/spi-sirf.c')
-rw-r--r-- | drivers/spi/spi-sirf.c | 114 |
1 files changed, 48 insertions, 66 deletions
diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c index 95ac276eaafe..39e2c0a55a28 100644 --- a/drivers/spi/spi-sirf.c +++ b/drivers/spi/spi-sirf.c | |||
@@ -62,15 +62,15 @@ | |||
62 | #define SIRFSOC_SPI_TRAN_DAT_FORMAT_12 (1 << 26) | 62 | #define SIRFSOC_SPI_TRAN_DAT_FORMAT_12 (1 << 26) |
63 | #define SIRFSOC_SPI_TRAN_DAT_FORMAT_16 (2 << 26) | 63 | #define SIRFSOC_SPI_TRAN_DAT_FORMAT_16 (2 << 26) |
64 | #define SIRFSOC_SPI_TRAN_DAT_FORMAT_32 (3 << 26) | 64 | #define SIRFSOC_SPI_TRAN_DAT_FORMAT_32 (3 << 26) |
65 | #define SIRFSOC_SPI_CMD_BYTE_NUM(x) ((x & 3) << 28) | 65 | #define SIRFSOC_SPI_CMD_BYTE_NUM(x) ((x & 3) << 28) |
66 | #define SIRFSOC_SPI_ENA_AUTO_CLR BIT(30) | 66 | #define SIRFSOC_SPI_ENA_AUTO_CLR BIT(30) |
67 | #define SIRFSOC_SPI_MUL_DAT_MODE BIT(31) | 67 | #define SIRFSOC_SPI_MUL_DAT_MODE BIT(31) |
68 | 68 | ||
69 | /* Interrupt Enable */ | 69 | /* Interrupt Enable */ |
70 | #define SIRFSOC_SPI_RX_DONE_INT_EN BIT(0) | 70 | #define SIRFSOC_SPI_RX_DONE_INT_EN BIT(0) |
71 | #define SIRFSOC_SPI_TX_DONE_INT_EN BIT(1) | 71 | #define SIRFSOC_SPI_TX_DONE_INT_EN BIT(1) |
72 | #define SIRFSOC_SPI_RX_OFLOW_INT_EN BIT(2) | 72 | #define SIRFSOC_SPI_RX_OFLOW_INT_EN BIT(2) |
73 | #define SIRFSOC_SPI_TX_UFLOW_INT_EN BIT(3) | 73 | #define SIRFSOC_SPI_TX_UFLOW_INT_EN BIT(3) |
74 | #define SIRFSOC_SPI_RX_IO_DMA_INT_EN BIT(4) | 74 | #define SIRFSOC_SPI_RX_IO_DMA_INT_EN BIT(4) |
75 | #define SIRFSOC_SPI_TX_IO_DMA_INT_EN BIT(5) | 75 | #define SIRFSOC_SPI_TX_IO_DMA_INT_EN BIT(5) |
76 | #define SIRFSOC_SPI_RXFIFO_FULL_INT_EN BIT(6) | 76 | #define SIRFSOC_SPI_RXFIFO_FULL_INT_EN BIT(6) |
@@ -79,7 +79,7 @@ | |||
79 | #define SIRFSOC_SPI_TXFIFO_THD_INT_EN BIT(9) | 79 | #define SIRFSOC_SPI_TXFIFO_THD_INT_EN BIT(9) |
80 | #define SIRFSOC_SPI_FRM_END_INT_EN BIT(10) | 80 | #define SIRFSOC_SPI_FRM_END_INT_EN BIT(10) |
81 | 81 | ||
82 | #define SIRFSOC_SPI_INT_MASK_ALL 0x1FFF | 82 | #define SIRFSOC_SPI_INT_MASK_ALL 0x1FFF |
83 | 83 | ||
84 | /* Interrupt status */ | 84 | /* Interrupt status */ |
85 | #define SIRFSOC_SPI_RX_DONE BIT(0) | 85 | #define SIRFSOC_SPI_RX_DONE BIT(0) |
@@ -170,8 +170,7 @@ struct sirfsoc_spi { | |||
170 | * command model | 170 | * command model |
171 | */ | 171 | */ |
172 | bool tx_by_cmd; | 172 | bool tx_by_cmd; |
173 | 173 | bool hw_cs; | |
174 | int chipselect[0]; | ||
175 | }; | 174 | }; |
176 | 175 | ||
177 | static void spi_sirfsoc_rx_word_u8(struct sirfsoc_spi *sspi) | 176 | static void spi_sirfsoc_rx_word_u8(struct sirfsoc_spi *sspi) |
@@ -304,7 +303,7 @@ static void spi_sirfsoc_dma_fini_callback(void *data) | |||
304 | complete(dma_complete); | 303 | complete(dma_complete); |
305 | } | 304 | } |
306 | 305 | ||
307 | static int spi_sirfsoc_cmd_transfer(struct spi_device *spi, | 306 | static void spi_sirfsoc_cmd_transfer(struct spi_device *spi, |
308 | struct spi_transfer *t) | 307 | struct spi_transfer *t) |
309 | { | 308 | { |
310 | struct sirfsoc_spi *sspi; | 309 | struct sirfsoc_spi *sspi; |
@@ -312,6 +311,8 @@ static int spi_sirfsoc_cmd_transfer(struct spi_device *spi, | |||
312 | u32 cmd; | 311 | u32 cmd; |
313 | 312 | ||
314 | sspi = spi_master_get_devdata(spi->master); | 313 | sspi = spi_master_get_devdata(spi->master); |
314 | writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + SIRFSOC_SPI_TXFIFO_OP); | ||
315 | writel(SIRFSOC_SPI_FIFO_START, sspi->base + SIRFSOC_SPI_TXFIFO_OP); | ||
315 | memcpy(&cmd, sspi->tx, t->len); | 316 | memcpy(&cmd, sspi->tx, t->len); |
316 | if (sspi->word_width == 1 && !(spi->mode & SPI_LSB_FIRST)) | 317 | if (sspi->word_width == 1 && !(spi->mode & SPI_LSB_FIRST)) |
317 | cmd = cpu_to_be32(cmd) >> | 318 | cmd = cpu_to_be32(cmd) >> |
@@ -326,10 +327,9 @@ static int spi_sirfsoc_cmd_transfer(struct spi_device *spi, | |||
326 | sspi->base + SIRFSOC_SPI_TX_RX_EN); | 327 | sspi->base + SIRFSOC_SPI_TX_RX_EN); |
327 | if (wait_for_completion_timeout(&sspi->tx_done, timeout) == 0) { | 328 | if (wait_for_completion_timeout(&sspi->tx_done, timeout) == 0) { |
328 | dev_err(&spi->dev, "cmd transfer timeout\n"); | 329 | dev_err(&spi->dev, "cmd transfer timeout\n"); |
329 | return 0; | 330 | return; |
330 | } | 331 | } |
331 | 332 | sspi->left_rx_word -= t->len; | |
332 | return t->len; | ||
333 | } | 333 | } |
334 | 334 | ||
335 | static void spi_sirfsoc_dma_transfer(struct spi_device *spi, | 335 | static void spi_sirfsoc_dma_transfer(struct spi_device *spi, |
@@ -438,7 +438,8 @@ static void spi_sirfsoc_pio_transfer(struct spi_device *spi, | |||
438 | sspi->tx_word(sspi); | 438 | sspi->tx_word(sspi); |
439 | writel(SIRFSOC_SPI_TXFIFO_EMPTY_INT_EN | | 439 | writel(SIRFSOC_SPI_TXFIFO_EMPTY_INT_EN | |
440 | SIRFSOC_SPI_TX_UFLOW_INT_EN | | 440 | SIRFSOC_SPI_TX_UFLOW_INT_EN | |
441 | SIRFSOC_SPI_RX_OFLOW_INT_EN, | 441 | SIRFSOC_SPI_RX_OFLOW_INT_EN | |
442 | SIRFSOC_SPI_RX_IO_DMA_INT_EN, | ||
442 | sspi->base + SIRFSOC_SPI_INT_EN); | 443 | sspi->base + SIRFSOC_SPI_INT_EN); |
443 | writel(SIRFSOC_SPI_RX_EN | SIRFSOC_SPI_TX_EN, | 444 | writel(SIRFSOC_SPI_RX_EN | SIRFSOC_SPI_TX_EN, |
444 | sspi->base + SIRFSOC_SPI_TX_RX_EN); | 445 | sspi->base + SIRFSOC_SPI_TX_RX_EN); |
@@ -484,7 +485,7 @@ static void spi_sirfsoc_chipselect(struct spi_device *spi, int value) | |||
484 | { | 485 | { |
485 | struct sirfsoc_spi *sspi = spi_master_get_devdata(spi->master); | 486 | struct sirfsoc_spi *sspi = spi_master_get_devdata(spi->master); |
486 | 487 | ||
487 | if (sspi->chipselect[spi->chip_select] == 0) { | 488 | if (sspi->hw_cs) { |
488 | u32 regval = readl(sspi->base + SIRFSOC_SPI_CTRL); | 489 | u32 regval = readl(sspi->base + SIRFSOC_SPI_CTRL); |
489 | switch (value) { | 490 | switch (value) { |
490 | case BITBANG_CS_ACTIVE: | 491 | case BITBANG_CS_ACTIVE: |
@@ -502,14 +503,13 @@ static void spi_sirfsoc_chipselect(struct spi_device *spi, int value) | |||
502 | } | 503 | } |
503 | writel(regval, sspi->base + SIRFSOC_SPI_CTRL); | 504 | writel(regval, sspi->base + SIRFSOC_SPI_CTRL); |
504 | } else { | 505 | } else { |
505 | int gpio = sspi->chipselect[spi->chip_select]; | ||
506 | switch (value) { | 506 | switch (value) { |
507 | case BITBANG_CS_ACTIVE: | 507 | case BITBANG_CS_ACTIVE: |
508 | gpio_direction_output(gpio, | 508 | gpio_direction_output(spi->cs_gpio, |
509 | spi->mode & SPI_CS_HIGH ? 1 : 0); | 509 | spi->mode & SPI_CS_HIGH ? 1 : 0); |
510 | break; | 510 | break; |
511 | case BITBANG_CS_INACTIVE: | 511 | case BITBANG_CS_INACTIVE: |
512 | gpio_direction_output(gpio, | 512 | gpio_direction_output(spi->cs_gpio, |
513 | spi->mode & SPI_CS_HIGH ? 0 : 1); | 513 | spi->mode & SPI_CS_HIGH ? 0 : 1); |
514 | break; | 514 | break; |
515 | } | 515 | } |
@@ -603,8 +603,8 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t) | |||
603 | sspi->tx_by_cmd = false; | 603 | sspi->tx_by_cmd = false; |
604 | } | 604 | } |
605 | /* | 605 | /* |
606 | * set spi controller in RISC chipselect mode, we are controlling CS by | 606 | * it should never set to hardware cs mode because in hardware cs mode, |
607 | * software BITBANG_CS_ACTIVE and BITBANG_CS_INACTIVE. | 607 | * cs signal can't controlled by driver. |
608 | */ | 608 | */ |
609 | regval |= SIRFSOC_SPI_CS_IO_MODE; | 609 | regval |= SIRFSOC_SPI_CS_IO_MODE; |
610 | writel(regval, sspi->base + SIRFSOC_SPI_CTRL); | 610 | writel(regval, sspi->base + SIRFSOC_SPI_CTRL); |
@@ -627,9 +627,17 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t) | |||
627 | 627 | ||
628 | static int spi_sirfsoc_setup(struct spi_device *spi) | 628 | static int spi_sirfsoc_setup(struct spi_device *spi) |
629 | { | 629 | { |
630 | struct sirfsoc_spi *sspi; | ||
631 | |||
630 | if (!spi->max_speed_hz) | 632 | if (!spi->max_speed_hz) |
631 | return -EINVAL; | 633 | return -EINVAL; |
632 | 634 | ||
635 | sspi = spi_master_get_devdata(spi->master); | ||
636 | |||
637 | if (spi->cs_gpio == -ENOENT) | ||
638 | sspi->hw_cs = true; | ||
639 | else | ||
640 | sspi->hw_cs = false; | ||
633 | return spi_sirfsoc_setup_transfer(spi, NULL); | 641 | return spi_sirfsoc_setup_transfer(spi, NULL); |
634 | } | 642 | } |
635 | 643 | ||
@@ -638,19 +646,10 @@ static int spi_sirfsoc_probe(struct platform_device *pdev) | |||
638 | struct sirfsoc_spi *sspi; | 646 | struct sirfsoc_spi *sspi; |
639 | struct spi_master *master; | 647 | struct spi_master *master; |
640 | struct resource *mem_res; | 648 | struct resource *mem_res; |
641 | int num_cs, cs_gpio, irq; | 649 | int irq; |
642 | int i; | 650 | int i, ret; |
643 | int ret; | ||
644 | 651 | ||
645 | ret = of_property_read_u32(pdev->dev.of_node, | 652 | master = spi_alloc_master(&pdev->dev, sizeof(*sspi)); |
646 | "sirf,spi-num-chipselects", &num_cs); | ||
647 | if (ret < 0) { | ||
648 | dev_err(&pdev->dev, "Unable to get chip select number\n"); | ||
649 | goto err_cs; | ||
650 | } | ||
651 | |||
652 | master = spi_alloc_master(&pdev->dev, | ||
653 | sizeof(*sspi) + sizeof(int) * num_cs); | ||
654 | if (!master) { | 653 | if (!master) { |
655 | dev_err(&pdev->dev, "Unable to allocate SPI master\n"); | 654 | dev_err(&pdev->dev, "Unable to allocate SPI master\n"); |
656 | return -ENOMEM; | 655 | return -ENOMEM; |
@@ -658,32 +657,6 @@ static int spi_sirfsoc_probe(struct platform_device *pdev) | |||
658 | platform_set_drvdata(pdev, master); | 657 | platform_set_drvdata(pdev, master); |
659 | sspi = spi_master_get_devdata(master); | 658 | sspi = spi_master_get_devdata(master); |
660 | 659 | ||
661 | master->num_chipselect = num_cs; | ||
662 | |||
663 | for (i = 0; i < master->num_chipselect; i++) { | ||
664 | cs_gpio = of_get_named_gpio(pdev->dev.of_node, "cs-gpios", i); | ||
665 | if (cs_gpio < 0) { | ||
666 | dev_err(&pdev->dev, "can't get cs gpio from DT\n"); | ||
667 | ret = -ENODEV; | ||
668 | goto free_master; | ||
669 | } | ||
670 | |||
671 | sspi->chipselect[i] = cs_gpio; | ||
672 | if (cs_gpio == 0) | ||
673 | continue; /* use cs from spi controller */ | ||
674 | |||
675 | ret = gpio_request(cs_gpio, DRIVER_NAME); | ||
676 | if (ret) { | ||
677 | while (i > 0) { | ||
678 | i--; | ||
679 | if (sspi->chipselect[i] > 0) | ||
680 | gpio_free(sspi->chipselect[i]); | ||
681 | } | ||
682 | dev_err(&pdev->dev, "fail to request cs gpios\n"); | ||
683 | goto free_master; | ||
684 | } | ||
685 | } | ||
686 | |||
687 | mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 660 | mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
688 | sspi->base = devm_ioremap_resource(&pdev->dev, mem_res); | 661 | sspi->base = devm_ioremap_resource(&pdev->dev, mem_res); |
689 | if (IS_ERR(sspi->base)) { | 662 | if (IS_ERR(sspi->base)) { |
@@ -753,7 +726,21 @@ static int spi_sirfsoc_probe(struct platform_device *pdev) | |||
753 | ret = spi_bitbang_start(&sspi->bitbang); | 726 | ret = spi_bitbang_start(&sspi->bitbang); |
754 | if (ret) | 727 | if (ret) |
755 | goto free_dummypage; | 728 | goto free_dummypage; |
756 | 729 | for (i = 0; master->cs_gpios && i < master->num_chipselect; i++) { | |
730 | if (master->cs_gpios[i] == -ENOENT) | ||
731 | continue; | ||
732 | if (!gpio_is_valid(master->cs_gpios[i])) { | ||
733 | dev_err(&pdev->dev, "no valid gpio\n"); | ||
734 | ret = -EINVAL; | ||
735 | goto free_dummypage; | ||
736 | } | ||
737 | ret = devm_gpio_request(&pdev->dev, | ||
738 | master->cs_gpios[i], DRIVER_NAME); | ||
739 | if (ret) { | ||
740 | dev_err(&pdev->dev, "failed to request gpio\n"); | ||
741 | goto free_dummypage; | ||
742 | } | ||
743 | } | ||
757 | dev_info(&pdev->dev, "registerred, bus number = %d\n", master->bus_num); | 744 | dev_info(&pdev->dev, "registerred, bus number = %d\n", master->bus_num); |
758 | 745 | ||
759 | return 0; | 746 | return 0; |
@@ -768,7 +755,7 @@ free_rx_dma: | |||
768 | dma_release_channel(sspi->rx_chan); | 755 | dma_release_channel(sspi->rx_chan); |
769 | free_master: | 756 | free_master: |
770 | spi_master_put(master); | 757 | spi_master_put(master); |
771 | err_cs: | 758 | |
772 | return ret; | 759 | return ret; |
773 | } | 760 | } |
774 | 761 | ||
@@ -776,16 +763,11 @@ static int spi_sirfsoc_remove(struct platform_device *pdev) | |||
776 | { | 763 | { |
777 | struct spi_master *master; | 764 | struct spi_master *master; |
778 | struct sirfsoc_spi *sspi; | 765 | struct sirfsoc_spi *sspi; |
779 | int i; | ||
780 | 766 | ||
781 | master = platform_get_drvdata(pdev); | 767 | master = platform_get_drvdata(pdev); |
782 | sspi = spi_master_get_devdata(master); | 768 | sspi = spi_master_get_devdata(master); |
783 | 769 | ||
784 | spi_bitbang_stop(&sspi->bitbang); | 770 | spi_bitbang_stop(&sspi->bitbang); |
785 | for (i = 0; i < master->num_chipselect; i++) { | ||
786 | if (sspi->chipselect[i] > 0) | ||
787 | gpio_free(sspi->chipselect[i]); | ||
788 | } | ||
789 | kfree(sspi->dummypage); | 771 | kfree(sspi->dummypage); |
790 | clk_disable_unprepare(sspi->clk); | 772 | clk_disable_unprepare(sspi->clk); |
791 | clk_put(sspi->clk); | 773 | clk_put(sspi->clk); |