1 files changed, 96 insertions, 148 deletions

diff --git a/drivers/spi/dw_spi.c b/drivers/spi/dw_spi.c
index 56247853c298..919fa9d9e16b 100644
--- a/drivers/spi/dw_spi.c
+++ b/drivers/spi/dw_spi.c
@@ -22,10 +22,10 @@
 #include <linux/highmem.h>
 #include <linux/delay.h>
 #include <linux/slab.h>
-
-#include <linux/spi/dw_spi.h>
 #include <linux/spi/spi.h>
 
+#include "dw_spi.h"
+
 #ifdef CONFIG_DEBUG_FS
 #include <linux/debugfs.h>
 #endif
@@ -58,8 +58,6 @@ struct chip_data {
         u8 bits_per_word;
         u16 clk_div;            /* baud rate divider */
         u32 speed_hz;           /* baud rate */
-        int (*write)(struct dw_spi *dws);
-        int (*read)(struct dw_spi *dws);
         void (*cs_control)(u32 command);
 };
 
@@ -131,6 +129,7 @@ static const struct file_operations mrst_spi_regs_ops = {
         .owner          = THIS_MODULE,
         .open           = spi_show_regs_open,
         .read           = spi_show_regs,
+        .llseek         = default_llseek,
 };
 
 static int mrst_spi_debugfs_init(struct dw_spi *dws)
@@ -161,104 +160,70 @@ static inline void mrst_spi_debugfs_remove(struct dw_spi *dws)
 }
 #endif /* CONFIG_DEBUG_FS */
 
-static void wait_till_not_busy(struct dw_spi *dws)
-{
-        unsigned long end = jiffies + 1 + usecs_to_jiffies(1000);
-
-        while (time_before(jiffies, end)) {
-                if (!(dw_readw(dws, sr) & SR_BUSY))
-                        return;
-        }
-        dev_err(&dws->master->dev,
-                "DW SPI: Status keeps busy for 1000us after a read/write!\n");
-}
-
-static void flush(struct dw_spi *dws)
+/* Return the max entries we can fill into tx fifo */
+static inline u32 tx_max(struct dw_spi *dws)
 {
-        while (dw_readw(dws, sr) & SR_RF_NOT_EMPT)
-                dw_readw(dws, dr);
-
-        wait_till_not_busy(dws);
-}
+        u32 tx_left, tx_room, rxtx_gap;
 
-static int null_writer(struct dw_spi *dws)
-{
-        u8 n_bytes = dws->n_bytes;
+        tx_left = (dws->tx_end - dws->tx) / dws->n_bytes;
+        tx_room = dws->fifo_len - dw_readw(dws, txflr);
 
-        if (!(dw_readw(dws, sr) & SR_TF_NOT_FULL)
-                || (dws->tx == dws->tx_end))
-                return 0;
-        dw_writew(dws, dr, 0);
-        dws->tx += n_bytes;
+        /*
+         * Another concern is about the tx/rx mismatch, we
+         * though to use (dws->fifo_len - rxflr - txflr) as
+         * one maximum value for tx, but it doesn't cover the
+         * data which is out of tx/rx fifo and inside the
+         * shift registers. So a control from sw point of
+         * view is taken.
+         */
+        rxtx_gap =  ((dws->rx_end - dws->rx) - (dws->tx_end - dws->tx))
+                        / dws->n_bytes;
 
-        wait_till_not_busy(dws);
-        return 1;
+        return min3(tx_left, tx_room, (u32) (dws->fifo_len - rxtx_gap));
 }
 
-static int null_reader(struct dw_spi *dws)
+/* Return the max entries we should read out of rx fifo */
+static inline u32 rx_max(struct dw_spi *dws)
 {
-        u8 n_bytes = dws->n_bytes;
+        u32 rx_left = (dws->rx_end - dws->rx) / dws->n_bytes;
 
-        while ((dw_readw(dws, sr) & SR_RF_NOT_EMPT)
-                && (dws->rx < dws->rx_end)) {
-                dw_readw(dws, dr);
-                dws->rx += n_bytes;
-        }
-        wait_till_not_busy(dws);
-        return dws->rx == dws->rx_end;
+        return min(rx_left, (u32)dw_readw(dws, rxflr));
 }
 
-static int u8_writer(struct dw_spi *dws)
+static void dw_writer(struct dw_spi *dws)
 {
-        if (!(dw_readw(dws, sr) & SR_TF_NOT_FULL)
-                || (dws->tx == dws->tx_end))
-                return 0;
-
-        dw_writew(dws, dr, *(u8 *)(dws->tx));
-        ++dws->tx;
-
-        wait_till_not_busy(dws);
-        return 1;
-}
+        u32 max = tx_max(dws);
+        u16 txw = 0;
 
-static int u8_reader(struct dw_spi *dws)
-{
-        while ((dw_readw(dws, sr) & SR_RF_NOT_EMPT)
-                && (dws->rx < dws->rx_end)) {
-                *(u8 *)(dws->rx) = dw_readw(dws, dr);
-                ++dws->rx;
+        while (max--) {
+                /* Set the tx word if the transfer's original "tx" is not null */
+                if (dws->tx_end - dws->len) {
+                        if (dws->n_bytes == 1)
+                                txw = *(u8 *)(dws->tx);
+                        else
+                                txw = *(u16 *)(dws->tx);
+                }
+                dw_writew(dws, dr, txw);
+                dws->tx += dws->n_bytes;
         }
-
-        wait_till_not_busy(dws);
-        return dws->rx == dws->rx_end;
-}
-
-static int u16_writer(struct dw_spi *dws)
-{
-        if (!(dw_readw(dws, sr) & SR_TF_NOT_FULL)
-                || (dws->tx == dws->tx_end))
-                return 0;
-
-        dw_writew(dws, dr, *(u16 *)(dws->tx));
-        dws->tx += 2;
-
-        wait_till_not_busy(dws);
-        return 1;
 }
 
-static int u16_reader(struct dw_spi *dws)
+static void dw_reader(struct dw_spi *dws)
 {
-        u16 temp;
+        u32 max = rx_max(dws);
+        u16 rxw;
 
-        while ((dw_readw(dws, sr) & SR_RF_NOT_EMPT)
-                && (dws->rx < dws->rx_end)) {
-                temp = dw_readw(dws, dr);
-                *(u16 *)(dws->rx) = temp;
-                dws->rx += 2;
+        while (max--) {
+                rxw = dw_readw(dws, dr);
+                /* Care rx only if the transfer's original "rx" is not null */
+                if (dws->rx_end - dws->len) {
+                        if (dws->n_bytes == 1)
+                                *(u8 *)(dws->rx) = rxw;
+                        else
+                                *(u16 *)(dws->rx) = rxw;
+                }
+                dws->rx += dws->n_bytes;
         }
-
-        wait_till_not_busy(dws);
-        return dws->rx == dws->rx_end;
 }
 
 static void *next_transfer(struct dw_spi *dws)
@@ -284,8 +249,10 @@ static void *next_transfer(struct dw_spi *dws)
  */
 static int map_dma_buffers(struct dw_spi *dws)
 {
-        if (!dws->cur_msg->is_dma_mapped || !dws->dma_inited
-                || !dws->cur_chip->enable_dma)
+        if (!dws->cur_msg->is_dma_mapped
+                || !dws->dma_inited
+                || !dws->cur_chip->enable_dma
+                || !dws->dma_ops)
                 return 0;
 
         if (dws->cur_transfer->tx_dma)
@@ -328,8 +295,7 @@ static void giveback(struct dw_spi *dws)
 
 static void int_error_stop(struct dw_spi *dws, const char *msg)
 {
-        /* Stop and reset hw */
-        flush(dws);
+        /* Stop the hw */
         spi_enable_chip(dws, 0);
 
         dev_err(&dws->master->dev, "%s\n", msg);
@@ -337,9 +303,9 @@ static void int_error_stop(struct dw_spi *dws, const char *msg)
         tasklet_schedule(&dws->pump_transfers);
 }
 
-static void transfer_complete(struct dw_spi *dws)
+void dw_spi_xfer_done(struct dw_spi *dws)
 {
-        /* Update total byte transfered return count actual bytes read */
+        /* Update total byte transferred return count actual bytes read */
         dws->cur_msg->actual_length += dws->len;
 
         /* Move to next transfer */
@@ -352,38 +318,32 @@ static void transfer_complete(struct dw_spi *dws)
         } else
                 tasklet_schedule(&dws->pump_transfers);
 }
+EXPORT_SYMBOL_GPL(dw_spi_xfer_done);
 
 static irqreturn_t interrupt_transfer(struct dw_spi *dws)
 {
-        u16 irq_status, irq_mask = 0x3f;
-        u32 int_level = dws->fifo_len / 2;
-        u32 left;
+        u16 irq_status = dw_readw(dws, isr);
 
-        irq_status = dw_readw(dws, isr) & irq_mask;
         /* Error handling */
         if (irq_status & (SPI_INT_TXOI | SPI_INT_RXOI | SPI_INT_RXUI)) {
                 dw_readw(dws, txoicr);
                 dw_readw(dws, rxoicr);
                 dw_readw(dws, rxuicr);
-                int_error_stop(dws, "interrupt_transfer: fifo overrun");
+                int_error_stop(dws, "interrupt_transfer: fifo overrun/underrun");
                 return IRQ_HANDLED;
         }
 
+        dw_reader(dws);
+        if (dws->rx_end == dws->rx) {
+                spi_mask_intr(dws, SPI_INT_TXEI);
+                dw_spi_xfer_done(dws);
+                return IRQ_HANDLED;
+        }
         if (irq_status & SPI_INT_TXEI) {
                 spi_mask_intr(dws, SPI_INT_TXEI);
-
-                left = (dws->tx_end - dws->tx) / dws->n_bytes;
-                left = (left > int_level) ? int_level : left;
-
-                while (left--)
-                        dws->write(dws);
-                dws->read(dws);
-
-                /* Re-enable the IRQ if there is still data left to tx */
-                if (dws->tx_end > dws->tx)
-                        spi_umask_intr(dws, SPI_INT_TXEI);
-                else
-                        transfer_complete(dws);
+                dw_writer(dws);
+                /* Enable TX irq always, it will be disabled when RX finished */
+                spi_umask_intr(dws, SPI_INT_TXEI);
         }
 
         return IRQ_HANDLED;
@@ -392,15 +352,13 @@ static irqreturn_t interrupt_transfer(struct dw_spi *dws)
 static irqreturn_t dw_spi_irq(int irq, void *dev_id)
 {
         struct dw_spi *dws = dev_id;
-        u16 irq_status, irq_mask = 0x3f;
+        u16 irq_status = dw_readw(dws, isr) & 0x3f;
 
-        irq_status = dw_readw(dws, isr) & irq_mask;
         if (!irq_status)
                 return IRQ_NONE;
 
         if (!dws->cur_msg) {
                 spi_mask_intr(dws, SPI_INT_TXEI);
-                /* Never fail */
                 return IRQ_HANDLED;
         }
 
@@ -410,14 +368,13 @@ static irqreturn_t dw_spi_irq(int irq, void *dev_id)
 /* Must be called inside pump_transfers() */
 static void poll_transfer(struct dw_spi *dws)
 {
-        while (dws->write(dws))
-                dws->read(dws);
+        do {
+                dw_writer(dws);
+                dw_reader(dws);
+                cpu_relax();
+        } while (dws->rx_end > dws->rx);
 
-        transfer_complete(dws);
-}
-
-static void dma_transfer(struct dw_spi *dws, int cs_change)
-{
+        dw_spi_xfer_done(dws);
 }
 
 static void pump_transfers(unsigned long data)
@@ -475,8 +432,6 @@ static void pump_transfers(unsigned long data)
         dws->tx_end = dws->tx + transfer->len;
         dws->rx = transfer->rx_buf;
         dws->rx_end = dws->rx + transfer->len;
-        dws->write = dws->tx ? chip->write : null_writer;
-        dws->read = dws->rx ? chip->read : null_reader;
         dws->cs_change = transfer->cs_change;
         dws->len = dws->cur_transfer->len;
         if (chip != dws->prev_chip)
@@ -510,20 +465,8 @@ static void pump_transfers(unsigned long data)
 
                 switch (bits) {
                 case 8:
-                        dws->n_bytes = 1;
-                        dws->dma_width = 1;
-                        dws->read = (dws->read != null_reader) ?
-                                        u8_reader : null_reader;
-                        dws->write = (dws->write != null_writer) ?
-                                        u8_writer : null_writer;
-                        break;
                 case 16:
-                        dws->n_bytes = 2;
-                        dws->dma_width = 2;
-                        dws->read = (dws->read != null_reader) ?
-                                        u16_reader : null_reader;
-                        dws->write = (dws->write != null_writer) ?
-                                        u16_writer : null_writer;
+                        dws->n_bytes = dws->dma_width = bits >> 3;
                         break;
                 default:
                         printk(KERN_ERR "MRST SPI0: unsupported bits:"
@@ -567,7 +510,7 @@ static void pump_transfers(unsigned long data)
                 txint_level = dws->fifo_len / 2;
                 txint_level = (templen > txint_level) ? txint_level : templen;
 
-                imask |= SPI_INT_TXEI;
+                imask |= SPI_INT_TXEI | SPI_INT_TXOI | SPI_INT_RXUI | SPI_INT_RXOI;
                 dws->transfer_handler = interrupt_transfer;
         }
 
@@ -586,7 +529,7 @@ static void pump_transfers(unsigned long data)
                 spi_set_clk(dws, clk_div ? clk_div : chip->clk_div);
                 spi_chip_sel(dws, spi->chip_select);
 
-                /* Set the interrupt mask, for poll mode just diable all int */
+                /* Set the interrupt mask, for poll mode just disable all int */
                 spi_mask_intr(dws, 0xff);
                 if (imask)
                         spi_umask_intr(dws, imask);
@@ -599,7 +542,7 @@ static void pump_transfers(unsigned long data)
         }
 
         if (dws->dma_mapped)
-                dma_transfer(dws, cs_change);
+                dws->dma_ops->dma_transfer(dws, cs_change);
 
         if (chip->poll_mode)
                 poll_transfer(dws);
@@ -725,13 +668,9 @@ static int dw_spi_setup(struct spi_device *spi)
         if (spi->bits_per_word <= 8) {
                 chip->n_bytes = 1;
                 chip->dma_width = 1;
-                chip->read = u8_reader;
-                chip->write = u8_writer;
         } else if (spi->bits_per_word <= 16) {
                 chip->n_bytes = 2;
                 chip->dma_width = 2;
-                chip->read = u16_reader;
-                chip->write = u16_writer;
         } else {
                 /* Never take >16b case for MRST SPIC */
                 dev_err(&spi->dev, "invalid wordsize\n");
@@ -813,7 +752,7 @@ static int stop_queue(struct dw_spi *dws)
 
         spin_lock_irqsave(&dws->lock, flags);
         dws->run = QUEUE_STOPPED;
-        while (!list_empty(&dws->queue) && dws->busy && limit--) {
+        while ((!list_empty(&dws->queue) || dws->busy) && limit--) {
                 spin_unlock_irqrestore(&dws->lock, flags);
                 msleep(10);
                 spin_lock_irqsave(&dws->lock, flags);
@@ -843,7 +782,6 @@ static void spi_hw_init(struct dw_spi *dws)
         spi_enable_chip(dws, 0);
         spi_mask_intr(dws, 0xff);
         spi_enable_chip(dws, 1);
-        flush(dws);
 
         /*
          * Try to detect the FIFO depth if not set by interface driver,
@@ -895,11 +833,17 @@ int __devinit dw_spi_add_host(struct dw_spi *dws)
         master->setup = dw_spi_setup;
         master->transfer = dw_spi_transfer;
 
-        dws->dma_inited = 0;
-
         /* Basic HW init */
         spi_hw_init(dws);
 
+        if (dws->dma_ops && dws->dma_ops->dma_init) {
+                ret = dws->dma_ops->dma_init(dws);
+                if (ret) {
+                        dev_warn(&master->dev, "DMA init failed\n");
+                        dws->dma_inited = 0;
+                }
+        }
+
         /* Initial and start queue */
         ret = init_queue(dws);
         if (ret) {
@@ -924,6 +868,8 @@ int __devinit dw_spi_add_host(struct dw_spi *dws)
 
 err_queue_alloc:
         destroy_queue(dws);
+        if (dws->dma_ops && dws->dma_ops->dma_exit)
+                dws->dma_ops->dma_exit(dws);
 err_diable_hw:
         spi_enable_chip(dws, 0);
         free_irq(dws->irq, dws);
@@ -932,7 +878,7 @@ err_free_master:
 exit:
         return ret;
 }
-EXPORT_SYMBOL(dw_spi_add_host);
+EXPORT_SYMBOL_GPL(dw_spi_add_host);
 
 void __devexit dw_spi_remove_host(struct dw_spi *dws)
 {
@@ -948,6 +894,8 @@ void __devexit dw_spi_remove_host(struct dw_spi *dws)
                 dev_err(&dws->master->dev, "dw_spi_remove: workqueue will not "
                         "complete, message memory not freed\n");
 
+        if (dws->dma_ops && dws->dma_ops->dma_exit)
+                dws->dma_ops->dma_exit(dws);
         spi_enable_chip(dws, 0);
         /* Disable clk */
         spi_set_clk(dws, 0);
@@ -956,7 +904,7 @@ void __devexit dw_spi_remove_host(struct dw_spi *dws)
         /* Disconnect from the SPI framework */
         spi_unregister_master(dws->master);
 }
-EXPORT_SYMBOL(dw_spi_remove_host);
+EXPORT_SYMBOL_GPL(dw_spi_remove_host);
 
 int dw_spi_suspend_host(struct dw_spi *dws)
 {
@@ -969,7 +917,7 @@ int dw_spi_suspend_host(struct dw_spi *dws)
         spi_set_clk(dws, 0);
         return ret;
 }
-EXPORT_SYMBOL(dw_spi_suspend_host);
+EXPORT_SYMBOL_GPL(dw_spi_suspend_host);
 
 int dw_spi_resume_host(struct dw_spi *dws)
 {
@@ -981,7 +929,7 @@ int dw_spi_resume_host(struct dw_spi *dws)
                 dev_err(&dws->master->dev, "fail to start queue (%d)\n", ret);
         return ret;
 }
-EXPORT_SYMBOL(dw_spi_resume_host);
+EXPORT_SYMBOL_GPL(dw_spi_resume_host);
 
 MODULE_AUTHOR("Feng Tang <feng.tang@intel.com>");
 MODULE_DESCRIPTION("Driver for DesignWare SPI controller core");