diff options
Diffstat (limited to 'drivers/serial')
-rw-r--r-- | drivers/serial/sh-sci.c | 22 | ||||
-rw-r--r-- | drivers/serial/sh-sci.h | 14 |
2 files changed, 36 insertions, 0 deletions
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index 9031b57f12dd..c53b69610a51 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c | |||
@@ -319,6 +319,28 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) | |||
319 | 319 | ||
320 | sci_out(port, SCFCR, fcr_val); | 320 | sci_out(port, SCFCR, fcr_val); |
321 | } | 321 | } |
322 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) | ||
323 | static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) | ||
324 | { | ||
325 | unsigned int fcr_val = 0; | ||
326 | |||
327 | if (cflag & CRTSCTS) { | ||
328 | fcr_val |= SCFCR_MCE; | ||
329 | |||
330 | ctrl_outw(0x0000, PORT_PSCR); | ||
331 | } else { | ||
332 | unsigned short data; | ||
333 | |||
334 | data = ctrl_inw(PORT_PSCR); | ||
335 | data &= 0x033f; | ||
336 | data |= 0x0400; | ||
337 | ctrl_outw(data, PORT_PSCR); | ||
338 | |||
339 | ctrl_outw(ctrl_inw(SCSPTR0) & 0x17, SCSPTR0); | ||
340 | } | ||
341 | |||
342 | sci_out(port, SCFCR, fcr_val); | ||
343 | } | ||
322 | #else | 344 | #else |
323 | /* For SH7750 */ | 345 | /* For SH7750 */ |
324 | static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) | 346 | static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) |
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index d84c1f9f8a39..77f7d6351ab1 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h | |||
@@ -90,6 +90,13 @@ | |||
90 | # define SCSPTR3 0xffe30010 /* 16 bit SCIF */ | 90 | # define SCSPTR3 0xffe30010 /* 16 bit SCIF */ |
91 | # define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */ | 91 | # define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0,CKE=1 */ |
92 | # define SCIF_ONLY | 92 | # define SCIF_ONLY |
93 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) | ||
94 | # define SCPDR0 0xA405013E /* 16 bit SCIF0 PSDR */ | ||
95 | # define SCSPTR0 SCPDR0 | ||
96 | # define SCIF_ORER 0x0001 /* overrun error bit */ | ||
97 | # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | ||
98 | # define SCIF_ONLY | ||
99 | # define PORT_PSCR 0xA405011E | ||
93 | #elif defined(CONFIG_CPU_SUBTYPE_SH4_202) | 100 | #elif defined(CONFIG_CPU_SUBTYPE_SH4_202) |
94 | # define SCSPTR2 0xffe80020 /* 16 bit SCIF */ | 101 | # define SCSPTR2 0xffe80020 /* 16 bit SCIF */ |
95 | # define SCIF_ORER 0x0001 /* overrun error bit */ | 102 | # define SCIF_ORER 0x0001 /* overrun error bit */ |
@@ -522,6 +529,13 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
522 | return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ | 529 | return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ |
523 | return 1; | 530 | return 1; |
524 | } | 531 | } |
532 | #elif defined(CONFIG_CPU_SUBTYPE_SH7722) | ||
533 | static inline int sci_rxd_in(struct uart_port *port) | ||
534 | { | ||
535 | if (port->mapbase == 0xffe00000) | ||
536 | return ctrl_inb(SCPDR0) & 0x0001 ? 1 : 0; /* SCIF0 */ | ||
537 | return 1; | ||
538 | } | ||
525 | #elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) | 539 | #elif defined(CONFIG_CPU_SUBTYPE_ST40STB1) |
526 | static inline int sci_rxd_in(struct uart_port *port) | 540 | static inline int sci_rxd_in(struct uart_port *port) |
527 | { | 541 | { |