aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/scsi/qla2xxx/qla_sup.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_sup.c')
-rw-r--r--drivers/scsi/qla2xxx/qla_sup.c554
1 files changed, 292 insertions, 262 deletions
diff --git a/drivers/scsi/qla2xxx/qla_sup.c b/drivers/scsi/qla2xxx/qla_sup.c
index e4af678eb2d6..c538ee1b1a31 100644
--- a/drivers/scsi/qla2xxx/qla_sup.c
+++ b/drivers/scsi/qla2xxx/qla_sup.c
@@ -10,10 +10,6 @@
10#include <linux/vmalloc.h> 10#include <linux/vmalloc.h>
11#include <asm/uaccess.h> 11#include <asm/uaccess.h>
12 12
13static uint16_t qla2x00_nvram_request(scsi_qla_host_t *, uint32_t);
14static void qla2x00_nv_deselect(scsi_qla_host_t *);
15static void qla2x00_nv_write(scsi_qla_host_t *, uint16_t);
16
17/* 13/*
18 * NVRAM support routines 14 * NVRAM support routines
19 */ 15 */
@@ -23,7 +19,7 @@ static void qla2x00_nv_write(scsi_qla_host_t *, uint16_t);
23 * @ha: HA context 19 * @ha: HA context
24 */ 20 */
25static void 21static void
26qla2x00_lock_nvram_access(scsi_qla_host_t *ha) 22qla2x00_lock_nvram_access(struct qla_hw_data *ha)
27{ 23{
28 uint16_t data; 24 uint16_t data;
29 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 25 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
@@ -56,7 +52,7 @@ qla2x00_lock_nvram_access(scsi_qla_host_t *ha)
56 * @ha: HA context 52 * @ha: HA context
57 */ 53 */
58static void 54static void
59qla2x00_unlock_nvram_access(scsi_qla_host_t *ha) 55qla2x00_unlock_nvram_access(struct qla_hw_data *ha)
60{ 56{
61 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 57 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
62 58
@@ -67,6 +63,84 @@ qla2x00_unlock_nvram_access(scsi_qla_host_t *ha)
67} 63}
68 64
69/** 65/**
66 * qla2x00_nv_write() - Prepare for NVRAM read/write operation.
67 * @ha: HA context
68 * @data: Serial interface selector
69 */
70static void
71qla2x00_nv_write(struct qla_hw_data *ha, uint16_t data)
72{
73 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
74
75 WRT_REG_WORD(&reg->nvram, data | NVR_SELECT | NVR_WRT_ENABLE);
76 RD_REG_WORD(&reg->nvram); /* PCI Posting. */
77 NVRAM_DELAY();
78 WRT_REG_WORD(&reg->nvram, data | NVR_SELECT | NVR_CLOCK |
79 NVR_WRT_ENABLE);
80 RD_REG_WORD(&reg->nvram); /* PCI Posting. */
81 NVRAM_DELAY();
82 WRT_REG_WORD(&reg->nvram, data | NVR_SELECT | NVR_WRT_ENABLE);
83 RD_REG_WORD(&reg->nvram); /* PCI Posting. */
84 NVRAM_DELAY();
85}
86
87/**
88 * qla2x00_nvram_request() - Sends read command to NVRAM and gets data from
89 * NVRAM.
90 * @ha: HA context
91 * @nv_cmd: NVRAM command
92 *
93 * Bit definitions for NVRAM command:
94 *
95 * Bit 26 = start bit
96 * Bit 25, 24 = opcode
97 * Bit 23-16 = address
98 * Bit 15-0 = write data
99 *
100 * Returns the word read from nvram @addr.
101 */
102static uint16_t
103qla2x00_nvram_request(struct qla_hw_data *ha, uint32_t nv_cmd)
104{
105 uint8_t cnt;
106 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
107 uint16_t data = 0;
108 uint16_t reg_data;
109
110 /* Send command to NVRAM. */
111 nv_cmd <<= 5;
112 for (cnt = 0; cnt < 11; cnt++) {
113 if (nv_cmd & BIT_31)
114 qla2x00_nv_write(ha, NVR_DATA_OUT);
115 else
116 qla2x00_nv_write(ha, 0);
117 nv_cmd <<= 1;
118 }
119
120 /* Read data from NVRAM. */
121 for (cnt = 0; cnt < 16; cnt++) {
122 WRT_REG_WORD(&reg->nvram, NVR_SELECT | NVR_CLOCK);
123 RD_REG_WORD(&reg->nvram); /* PCI Posting. */
124 NVRAM_DELAY();
125 data <<= 1;
126 reg_data = RD_REG_WORD(&reg->nvram);
127 if (reg_data & NVR_DATA_IN)
128 data |= BIT_0;
129 WRT_REG_WORD(&reg->nvram, NVR_SELECT);
130 RD_REG_WORD(&reg->nvram); /* PCI Posting. */
131 NVRAM_DELAY();
132 }
133
134 /* Deselect chip. */
135 WRT_REG_WORD(&reg->nvram, NVR_DESELECT);
136 RD_REG_WORD(&reg->nvram); /* PCI Posting. */
137 NVRAM_DELAY();
138
139 return data;
140}
141
142
143/**
70 * qla2x00_get_nvram_word() - Calculates word position in NVRAM and calls the 144 * qla2x00_get_nvram_word() - Calculates word position in NVRAM and calls the
71 * request routine to get the word from NVRAM. 145 * request routine to get the word from NVRAM.
72 * @ha: HA context 146 * @ha: HA context
@@ -75,7 +149,7 @@ qla2x00_unlock_nvram_access(scsi_qla_host_t *ha)
75 * Returns the word read from nvram @addr. 149 * Returns the word read from nvram @addr.
76 */ 150 */
77static uint16_t 151static uint16_t
78qla2x00_get_nvram_word(scsi_qla_host_t *ha, uint32_t addr) 152qla2x00_get_nvram_word(struct qla_hw_data *ha, uint32_t addr)
79{ 153{
80 uint16_t data; 154 uint16_t data;
81 uint32_t nv_cmd; 155 uint32_t nv_cmd;
@@ -88,13 +162,27 @@ qla2x00_get_nvram_word(scsi_qla_host_t *ha, uint32_t addr)
88} 162}
89 163
90/** 164/**
165 * qla2x00_nv_deselect() - Deselect NVRAM operations.
166 * @ha: HA context
167 */
168static void
169qla2x00_nv_deselect(struct qla_hw_data *ha)
170{
171 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
172
173 WRT_REG_WORD(&reg->nvram, NVR_DESELECT);
174 RD_REG_WORD(&reg->nvram); /* PCI Posting. */
175 NVRAM_DELAY();
176}
177
178/**
91 * qla2x00_write_nvram_word() - Write NVRAM data. 179 * qla2x00_write_nvram_word() - Write NVRAM data.
92 * @ha: HA context 180 * @ha: HA context
93 * @addr: Address in NVRAM to write 181 * @addr: Address in NVRAM to write
94 * @data: word to program 182 * @data: word to program
95 */ 183 */
96static void 184static void
97qla2x00_write_nvram_word(scsi_qla_host_t *ha, uint32_t addr, uint16_t data) 185qla2x00_write_nvram_word(struct qla_hw_data *ha, uint32_t addr, uint16_t data)
98{ 186{
99 int count; 187 int count;
100 uint16_t word; 188 uint16_t word;
@@ -132,7 +220,7 @@ qla2x00_write_nvram_word(scsi_qla_host_t *ha, uint32_t addr, uint16_t data)
132 do { 220 do {
133 if (!--wait_cnt) { 221 if (!--wait_cnt) {
134 DEBUG9_10(printk("%s(%ld): NVRAM didn't go ready...\n", 222 DEBUG9_10(printk("%s(%ld): NVRAM didn't go ready...\n",
135 __func__, ha->host_no)); 223 __func__, vha->host_no));
136 break; 224 break;
137 } 225 }
138 NVRAM_DELAY(); 226 NVRAM_DELAY();
@@ -150,8 +238,8 @@ qla2x00_write_nvram_word(scsi_qla_host_t *ha, uint32_t addr, uint16_t data)
150} 238}
151 239
152static int 240static int
153qla2x00_write_nvram_word_tmo(scsi_qla_host_t *ha, uint32_t addr, uint16_t data, 241qla2x00_write_nvram_word_tmo(struct qla_hw_data *ha, uint32_t addr,
154 uint32_t tmo) 242 uint16_t data, uint32_t tmo)
155{ 243{
156 int ret, count; 244 int ret, count;
157 uint16_t word; 245 uint16_t word;
@@ -209,102 +297,11 @@ qla2x00_write_nvram_word_tmo(scsi_qla_host_t *ha, uint32_t addr, uint16_t data,
209} 297}
210 298
211/** 299/**
212 * qla2x00_nvram_request() - Sends read command to NVRAM and gets data from
213 * NVRAM.
214 * @ha: HA context
215 * @nv_cmd: NVRAM command
216 *
217 * Bit definitions for NVRAM command:
218 *
219 * Bit 26 = start bit
220 * Bit 25, 24 = opcode
221 * Bit 23-16 = address
222 * Bit 15-0 = write data
223 *
224 * Returns the word read from nvram @addr.
225 */
226static uint16_t
227qla2x00_nvram_request(scsi_qla_host_t *ha, uint32_t nv_cmd)
228{
229 uint8_t cnt;
230 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
231 uint16_t data = 0;
232 uint16_t reg_data;
233
234 /* Send command to NVRAM. */
235 nv_cmd <<= 5;
236 for (cnt = 0; cnt < 11; cnt++) {
237 if (nv_cmd & BIT_31)
238 qla2x00_nv_write(ha, NVR_DATA_OUT);
239 else
240 qla2x00_nv_write(ha, 0);
241 nv_cmd <<= 1;
242 }
243
244 /* Read data from NVRAM. */
245 for (cnt = 0; cnt < 16; cnt++) {
246 WRT_REG_WORD(&reg->nvram, NVR_SELECT | NVR_CLOCK);
247 RD_REG_WORD(&reg->nvram); /* PCI Posting. */
248 NVRAM_DELAY();
249 data <<= 1;
250 reg_data = RD_REG_WORD(&reg->nvram);
251 if (reg_data & NVR_DATA_IN)
252 data |= BIT_0;
253 WRT_REG_WORD(&reg->nvram, NVR_SELECT);
254 RD_REG_WORD(&reg->nvram); /* PCI Posting. */
255 NVRAM_DELAY();
256 }
257
258 /* Deselect chip. */
259 WRT_REG_WORD(&reg->nvram, NVR_DESELECT);
260 RD_REG_WORD(&reg->nvram); /* PCI Posting. */
261 NVRAM_DELAY();
262
263 return (data);
264}
265
266/**
267 * qla2x00_nv_write() - Clean NVRAM operations.
268 * @ha: HA context
269 */
270static void
271qla2x00_nv_deselect(scsi_qla_host_t *ha)
272{
273 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
274
275 WRT_REG_WORD(&reg->nvram, NVR_DESELECT);
276 RD_REG_WORD(&reg->nvram); /* PCI Posting. */
277 NVRAM_DELAY();
278}
279
280/**
281 * qla2x00_nv_write() - Prepare for NVRAM read/write operation.
282 * @ha: HA context
283 * @data: Serial interface selector
284 */
285static void
286qla2x00_nv_write(scsi_qla_host_t *ha, uint16_t data)
287{
288 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
289
290 WRT_REG_WORD(&reg->nvram, data | NVR_SELECT | NVR_WRT_ENABLE);
291 RD_REG_WORD(&reg->nvram); /* PCI Posting. */
292 NVRAM_DELAY();
293 WRT_REG_WORD(&reg->nvram, data | NVR_SELECT| NVR_CLOCK |
294 NVR_WRT_ENABLE);
295 RD_REG_WORD(&reg->nvram); /* PCI Posting. */
296 NVRAM_DELAY();
297 WRT_REG_WORD(&reg->nvram, data | NVR_SELECT | NVR_WRT_ENABLE);
298 RD_REG_WORD(&reg->nvram); /* PCI Posting. */
299 NVRAM_DELAY();
300}
301
302/**
303 * qla2x00_clear_nvram_protection() - 300 * qla2x00_clear_nvram_protection() -
304 * @ha: HA context 301 * @ha: HA context
305 */ 302 */
306static int 303static int
307qla2x00_clear_nvram_protection(scsi_qla_host_t *ha) 304qla2x00_clear_nvram_protection(struct qla_hw_data *ha)
308{ 305{
309 int ret, stat; 306 int ret, stat;
310 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 307 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
@@ -352,9 +349,8 @@ qla2x00_clear_nvram_protection(scsi_qla_host_t *ha)
352 wait_cnt = NVR_WAIT_CNT; 349 wait_cnt = NVR_WAIT_CNT;
353 do { 350 do {
354 if (!--wait_cnt) { 351 if (!--wait_cnt) {
355 DEBUG9_10(printk("%s(%ld): NVRAM didn't go " 352 DEBUG9_10(qla_printk(
356 "ready...\n", __func__, 353 "NVRAM didn't go ready...\n"));
357 ha->host_no));
358 break; 354 break;
359 } 355 }
360 NVRAM_DELAY(); 356 NVRAM_DELAY();
@@ -370,7 +366,7 @@ qla2x00_clear_nvram_protection(scsi_qla_host_t *ha)
370} 366}
371 367
372static void 368static void
373qla2x00_set_nvram_protection(scsi_qla_host_t *ha, int stat) 369qla2x00_set_nvram_protection(struct qla_hw_data *ha, int stat)
374{ 370{
375 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 371 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
376 uint32_t word, wait_cnt; 372 uint32_t word, wait_cnt;
@@ -412,8 +408,7 @@ qla2x00_set_nvram_protection(scsi_qla_host_t *ha, int stat)
412 wait_cnt = NVR_WAIT_CNT; 408 wait_cnt = NVR_WAIT_CNT;
413 do { 409 do {
414 if (!--wait_cnt) { 410 if (!--wait_cnt) {
415 DEBUG9_10(printk("%s(%ld): NVRAM didn't go ready...\n", 411 DEBUG9_10(qla_printk("NVRAM didn't go ready...\n"));
416 __func__, ha->host_no));
417 break; 412 break;
418 } 413 }
419 NVRAM_DELAY(); 414 NVRAM_DELAY();
@@ -454,7 +449,7 @@ nvram_data_to_access_addr(uint32_t naddr)
454} 449}
455 450
456static uint32_t 451static uint32_t
457qla24xx_read_flash_dword(scsi_qla_host_t *ha, uint32_t addr) 452qla24xx_read_flash_dword(struct qla_hw_data *ha, uint32_t addr)
458{ 453{
459 int rval; 454 int rval;
460 uint32_t cnt, data; 455 uint32_t cnt, data;
@@ -482,21 +477,20 @@ qla24xx_read_flash_dword(scsi_qla_host_t *ha, uint32_t addr)
482} 477}
483 478
484uint32_t * 479uint32_t *
485qla24xx_read_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr, 480qla24xx_read_flash_data(scsi_qla_host_t *vha, uint32_t *dwptr, uint32_t faddr,
486 uint32_t dwords) 481 uint32_t dwords)
487{ 482{
488 uint32_t i; 483 uint32_t i;
489
490 /* Dword reads to flash. */ 484 /* Dword reads to flash. */
491 for (i = 0; i < dwords; i++, faddr++) 485 for (i = 0; i < dwords; i++, faddr++)
492 dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(ha, 486 dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(vha->hw,
493 flash_data_to_access_addr(faddr))); 487 flash_data_to_access_addr(faddr)));
494 488
495 return dwptr; 489 return dwptr;
496} 490}
497 491
498static int 492static int
499qla24xx_write_flash_dword(scsi_qla_host_t *ha, uint32_t addr, uint32_t data) 493qla24xx_write_flash_dword(struct qla_hw_data *ha, uint32_t addr, uint32_t data)
500{ 494{
501 int rval; 495 int rval;
502 uint32_t cnt; 496 uint32_t cnt;
@@ -519,7 +513,7 @@ qla24xx_write_flash_dword(scsi_qla_host_t *ha, uint32_t addr, uint32_t data)
519} 513}
520 514
521static void 515static void
522qla24xx_get_flash_manufacturer(scsi_qla_host_t *ha, uint8_t *man_id, 516qla24xx_get_flash_manufacturer(struct qla_hw_data *ha, uint8_t *man_id,
523 uint8_t *flash_id) 517 uint8_t *flash_id)
524{ 518{
525 uint32_t ids; 519 uint32_t ids;
@@ -544,7 +538,7 @@ qla24xx_get_flash_manufacturer(scsi_qla_host_t *ha, uint8_t *man_id,
544} 538}
545 539
546static int 540static int
547qla2xxx_find_flt_start(scsi_qla_host_t *ha, uint32_t *start) 541qla2xxx_find_flt_start(scsi_qla_host_t *vha, uint32_t *start)
548{ 542{
549 const char *loc, *locations[] = { "DEF", "PCI" }; 543 const char *loc, *locations[] = { "DEF", "PCI" };
550 uint32_t pcihdr, pcids; 544 uint32_t pcihdr, pcids;
@@ -552,6 +546,8 @@ qla2xxx_find_flt_start(scsi_qla_host_t *ha, uint32_t *start)
552 uint8_t *buf, *bcode, last_image; 546 uint8_t *buf, *bcode, last_image;
553 uint16_t cnt, chksum, *wptr; 547 uint16_t cnt, chksum, *wptr;
554 struct qla_flt_location *fltl; 548 struct qla_flt_location *fltl;
549 struct qla_hw_data *ha = vha->hw;
550 struct req_que *req = ha->req_q_map[0];
555 551
556 /* 552 /*
557 * FLT-location structure resides after the last PCI region. 553 * FLT-location structure resides after the last PCI region.
@@ -563,20 +559,20 @@ qla2xxx_find_flt_start(scsi_qla_host_t *ha, uint32_t *start)
563 FA_FLASH_LAYOUT_ADDR; 559 FA_FLASH_LAYOUT_ADDR;
564 560
565 /* Begin with first PCI expansion ROM header. */ 561 /* Begin with first PCI expansion ROM header. */
566 buf = (uint8_t *)ha->request_ring; 562 buf = (uint8_t *)req->ring;
567 dcode = (uint32_t *)ha->request_ring; 563 dcode = (uint32_t *)req->ring;
568 pcihdr = 0; 564 pcihdr = 0;
569 last_image = 1; 565 last_image = 1;
570 do { 566 do {
571 /* Verify PCI expansion ROM header. */ 567 /* Verify PCI expansion ROM header. */
572 qla24xx_read_flash_data(ha, dcode, pcihdr >> 2, 0x20); 568 qla24xx_read_flash_data(vha, dcode, pcihdr >> 2, 0x20);
573 bcode = buf + (pcihdr % 4); 569 bcode = buf + (pcihdr % 4);
574 if (bcode[0x0] != 0x55 || bcode[0x1] != 0xaa) 570 if (bcode[0x0] != 0x55 || bcode[0x1] != 0xaa)
575 goto end; 571 goto end;
576 572
577 /* Locate PCI data structure. */ 573 /* Locate PCI data structure. */
578 pcids = pcihdr + ((bcode[0x19] << 8) | bcode[0x18]); 574 pcids = pcihdr + ((bcode[0x19] << 8) | bcode[0x18]);
579 qla24xx_read_flash_data(ha, dcode, pcids >> 2, 0x20); 575 qla24xx_read_flash_data(vha, dcode, pcids >> 2, 0x20);
580 bcode = buf + (pcihdr % 4); 576 bcode = buf + (pcihdr % 4);
581 577
582 /* Validate signature of PCI data structure. */ 578 /* Validate signature of PCI data structure. */
@@ -591,14 +587,14 @@ qla2xxx_find_flt_start(scsi_qla_host_t *ha, uint32_t *start)
591 } while (!last_image); 587 } while (!last_image);
592 588
593 /* Now verify FLT-location structure. */ 589 /* Now verify FLT-location structure. */
594 fltl = (struct qla_flt_location *)ha->request_ring; 590 fltl = (struct qla_flt_location *)req->ring;
595 qla24xx_read_flash_data(ha, dcode, pcihdr >> 2, 591 qla24xx_read_flash_data(vha, dcode, pcihdr >> 2,
596 sizeof(struct qla_flt_location) >> 2); 592 sizeof(struct qla_flt_location) >> 2);
597 if (fltl->sig[0] != 'Q' || fltl->sig[1] != 'F' || 593 if (fltl->sig[0] != 'Q' || fltl->sig[1] != 'F' ||
598 fltl->sig[2] != 'L' || fltl->sig[3] != 'T') 594 fltl->sig[2] != 'L' || fltl->sig[3] != 'T')
599 goto end; 595 goto end;
600 596
601 wptr = (uint16_t *)ha->request_ring; 597 wptr = (uint16_t *)req->ring;
602 cnt = sizeof(struct qla_flt_location) >> 1; 598 cnt = sizeof(struct qla_flt_location) >> 1;
603 for (chksum = 0; cnt; cnt--) 599 for (chksum = 0; cnt; cnt--)
604 chksum += le16_to_cpu(*wptr++); 600 chksum += le16_to_cpu(*wptr++);
@@ -619,7 +615,7 @@ end:
619} 615}
620 616
621static void 617static void
622qla2xxx_get_flt_info(scsi_qla_host_t *ha, uint32_t flt_addr) 618qla2xxx_get_flt_info(scsi_qla_host_t *vha, uint32_t flt_addr)
623{ 619{
624 const char *loc, *locations[] = { "DEF", "FLT" }; 620 const char *loc, *locations[] = { "DEF", "FLT" };
625 uint16_t *wptr; 621 uint16_t *wptr;
@@ -627,12 +623,14 @@ qla2xxx_get_flt_info(scsi_qla_host_t *ha, uint32_t flt_addr)
627 uint32_t start; 623 uint32_t start;
628 struct qla_flt_header *flt; 624 struct qla_flt_header *flt;
629 struct qla_flt_region *region; 625 struct qla_flt_region *region;
626 struct qla_hw_data *ha = vha->hw;
627 struct req_que *req = ha->req_q_map[0];
630 628
631 ha->flt_region_flt = flt_addr; 629 ha->flt_region_flt = flt_addr;
632 wptr = (uint16_t *)ha->request_ring; 630 wptr = (uint16_t *)req->ring;
633 flt = (struct qla_flt_header *)ha->request_ring; 631 flt = (struct qla_flt_header *)req->ring;
634 region = (struct qla_flt_region *)&flt[1]; 632 region = (struct qla_flt_region *)&flt[1];
635 ha->isp_ops->read_optrom(ha, (uint8_t *)ha->request_ring, 633 ha->isp_ops->read_optrom(vha, (uint8_t *)req->ring,
636 flt_addr << 2, OPTROM_BURST_SIZE); 634 flt_addr << 2, OPTROM_BURST_SIZE);
637 if (*wptr == __constant_cpu_to_le16(0xffff)) 635 if (*wptr == __constant_cpu_to_le16(0xffff))
638 goto no_flash_data; 636 goto no_flash_data;
@@ -720,7 +718,7 @@ done:
720} 718}
721 719
722static void 720static void
723qla2xxx_get_fdt_info(scsi_qla_host_t *ha) 721qla2xxx_get_fdt_info(scsi_qla_host_t *vha)
724{ 722{
725#define FLASH_BLK_SIZE_4K 0x1000 723#define FLASH_BLK_SIZE_4K 0x1000
726#define FLASH_BLK_SIZE_32K 0x8000 724#define FLASH_BLK_SIZE_32K 0x8000
@@ -731,10 +729,12 @@ qla2xxx_get_fdt_info(scsi_qla_host_t *ha)
731 struct qla_fdt_layout *fdt; 729 struct qla_fdt_layout *fdt;
732 uint8_t man_id, flash_id; 730 uint8_t man_id, flash_id;
733 uint16_t mid, fid; 731 uint16_t mid, fid;
732 struct qla_hw_data *ha = vha->hw;
733 struct req_que *req = ha->req_q_map[0];
734 734
735 wptr = (uint16_t *)ha->request_ring; 735 wptr = (uint16_t *)req->ring;
736 fdt = (struct qla_fdt_layout *)ha->request_ring; 736 fdt = (struct qla_fdt_layout *)req->ring;
737 ha->isp_ops->read_optrom(ha, (uint8_t *)ha->request_ring, 737 ha->isp_ops->read_optrom(vha, (uint8_t *)req->ring,
738 ha->flt_region_fdt << 2, OPTROM_BURST_SIZE); 738 ha->flt_region_fdt << 2, OPTROM_BURST_SIZE);
739 if (*wptr == __constant_cpu_to_le16(0xffff)) 739 if (*wptr == __constant_cpu_to_le16(0xffff))
740 goto no_flash_data; 740 goto no_flash_data;
@@ -807,38 +807,41 @@ done:
807} 807}
808 808
809int 809int
810qla2xxx_get_flash_info(scsi_qla_host_t *ha) 810qla2xxx_get_flash_info(scsi_qla_host_t *vha)
811{ 811{
812 int ret; 812 int ret;
813 uint32_t flt_addr; 813 uint32_t flt_addr;
814 struct qla_hw_data *ha = vha->hw;
814 815
815 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha)) 816 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
816 return QLA_SUCCESS; 817 return QLA_SUCCESS;
817 818
818 ret = qla2xxx_find_flt_start(ha, &flt_addr); 819 ret = qla2xxx_find_flt_start(vha, &flt_addr);
819 if (ret != QLA_SUCCESS) 820 if (ret != QLA_SUCCESS)
820 return ret; 821 return ret;
821 822
822 qla2xxx_get_flt_info(ha, flt_addr); 823 qla2xxx_get_flt_info(vha, flt_addr);
823 qla2xxx_get_fdt_info(ha); 824 qla2xxx_get_fdt_info(vha);
824 825
825 return QLA_SUCCESS; 826 return QLA_SUCCESS;
826} 827}
827 828
828void 829void
829qla2xxx_flash_npiv_conf(scsi_qla_host_t *ha) 830qla2xxx_flash_npiv_conf(scsi_qla_host_t *vha)
830{ 831{
831#define NPIV_CONFIG_SIZE (16*1024) 832#define NPIV_CONFIG_SIZE (16*1024)
832 void *data; 833 void *data;
833 uint16_t *wptr; 834 uint16_t *wptr;
834 uint16_t cnt, chksum; 835 uint16_t cnt, chksum;
836 int i;
835 struct qla_npiv_header hdr; 837 struct qla_npiv_header hdr;
836 struct qla_npiv_entry *entry; 838 struct qla_npiv_entry *entry;
839 struct qla_hw_data *ha = vha->hw;
837 840
838 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha)) 841 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
839 return; 842 return;
840 843
841 ha->isp_ops->read_optrom(ha, (uint8_t *)&hdr, 844 ha->isp_ops->read_optrom(vha, (uint8_t *)&hdr,
842 ha->flt_region_npiv_conf << 2, sizeof(struct qla_npiv_header)); 845 ha->flt_region_npiv_conf << 2, sizeof(struct qla_npiv_header));
843 if (hdr.version == __constant_cpu_to_le16(0xffff)) 846 if (hdr.version == __constant_cpu_to_le16(0xffff))
844 return; 847 return;
@@ -857,7 +860,7 @@ qla2xxx_flash_npiv_conf(scsi_qla_host_t *ha)
857 return; 860 return;
858 } 861 }
859 862
860 ha->isp_ops->read_optrom(ha, (uint8_t *)data, 863 ha->isp_ops->read_optrom(vha, (uint8_t *)data,
861 ha->flt_region_npiv_conf << 2, NPIV_CONFIG_SIZE); 864 ha->flt_region_npiv_conf << 2, NPIV_CONFIG_SIZE);
862 865
863 cnt = (sizeof(struct qla_npiv_header) + le16_to_cpu(hdr.entries) * 866 cnt = (sizeof(struct qla_npiv_header) + le16_to_cpu(hdr.entries) *
@@ -874,7 +877,7 @@ qla2xxx_flash_npiv_conf(scsi_qla_host_t *ha)
874 877
875 entry = data + sizeof(struct qla_npiv_header); 878 entry = data + sizeof(struct qla_npiv_header);
876 cnt = le16_to_cpu(hdr.entries); 879 cnt = le16_to_cpu(hdr.entries);
877 for ( ; cnt; cnt--, entry++) { 880 for (i = 0; cnt; cnt--, entry++, i++) {
878 uint16_t flags; 881 uint16_t flags;
879 struct fc_vport_identifiers vid; 882 struct fc_vport_identifiers vid;
880 struct fc_vport *vport; 883 struct fc_vport *vport;
@@ -892,25 +895,29 @@ qla2xxx_flash_npiv_conf(scsi_qla_host_t *ha)
892 vid.port_name = wwn_to_u64(entry->port_name); 895 vid.port_name = wwn_to_u64(entry->port_name);
893 vid.node_name = wwn_to_u64(entry->node_name); 896 vid.node_name = wwn_to_u64(entry->node_name);
894 897
898 memcpy(&ha->npiv_info[i], entry, sizeof(struct qla_npiv_entry));
899
895 DEBUG2(qla_printk(KERN_DEBUG, ha, "NPIV[%02x]: wwpn=%llx " 900 DEBUG2(qla_printk(KERN_DEBUG, ha, "NPIV[%02x]: wwpn=%llx "
896 "wwnn=%llx vf_id=0x%x qos=0x%x.\n", cnt, 901 "wwnn=%llx vf_id=0x%x Q_qos=0x%x F_qos=0x%x.\n", cnt,
897 (unsigned long long)vid.port_name, 902 vid.port_name, vid.node_name, le16_to_cpu(entry->vf_id),
898 (unsigned long long)vid.node_name, 903 entry->q_qos, entry->f_qos));
899 le16_to_cpu(entry->vf_id), le16_to_cpu(entry->qos))); 904
900 905 if (i < QLA_PRECONFIG_VPORTS) {
901 vport = fc_vport_create(ha->host, 0, &vid); 906 vport = fc_vport_create(vha->host, 0, &vid);
902 if (!vport) 907 if (!vport)
903 qla_printk(KERN_INFO, ha, "NPIV-Config: Failed to " 908 qla_printk(KERN_INFO, ha,
904 "create vport [%02x]: wwpn=%llx wwnn=%llx.\n", cnt, 909 "NPIV-Config: Failed to create vport [%02x]: "
905 (unsigned long long)vid.port_name, 910 "wwpn=%llx wwnn=%llx.\n", cnt,
906 (unsigned long long)vid.node_name); 911 vid.port_name, vid.node_name);
912 }
907 } 913 }
908done: 914done:
909 kfree(data); 915 kfree(data);
916 ha->npiv_info = NULL;
910} 917}
911 918
912static void 919static void
913qla24xx_unprotect_flash(scsi_qla_host_t *ha) 920qla24xx_unprotect_flash(struct qla_hw_data *ha)
914{ 921{
915 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 922 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
916 923
@@ -929,7 +936,7 @@ qla24xx_unprotect_flash(scsi_qla_host_t *ha)
929} 936}
930 937
931static void 938static void
932qla24xx_protect_flash(scsi_qla_host_t *ha) 939qla24xx_protect_flash(struct qla_hw_data *ha)
933{ 940{
934 uint32_t cnt; 941 uint32_t cnt;
935 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 942 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
@@ -955,7 +962,7 @@ skip_wrt_protect:
955} 962}
956 963
957static int 964static int
958qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr, 965qla24xx_write_flash_data(scsi_qla_host_t *vha, uint32_t *dwptr, uint32_t faddr,
959 uint32_t dwords) 966 uint32_t dwords)
960{ 967{
961 int ret; 968 int ret;
@@ -965,6 +972,7 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr,
965 dma_addr_t optrom_dma; 972 dma_addr_t optrom_dma;
966 void *optrom = NULL; 973 void *optrom = NULL;
967 uint32_t *s, *d; 974 uint32_t *s, *d;
975 struct qla_hw_data *ha = vha->hw;
968 976
969 ret = QLA_SUCCESS; 977 ret = QLA_SUCCESS;
970 978
@@ -1002,9 +1010,8 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr,
1002 (fdata & 0xff00) |((fdata << 16) & 1010 (fdata & 0xff00) |((fdata << 16) &
1003 0xff0000) | ((fdata >> 16) & 0xff)); 1011 0xff0000) | ((fdata >> 16) & 0xff));
1004 if (ret != QLA_SUCCESS) { 1012 if (ret != QLA_SUCCESS) {
1005 DEBUG9(printk("%s(%ld) Unable to flash " 1013 DEBUG9(qla_printk("Unable to flash sector: "
1006 "sector: address=%x.\n", __func__, 1014 "address=%x.\n", faddr));
1007 ha->host_no, faddr));
1008 break; 1015 break;
1009 } 1016 }
1010 } 1017 }
@@ -1016,7 +1023,7 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr,
1016 miter < OPTROM_BURST_DWORDS; miter++, s++, d++) 1023 miter < OPTROM_BURST_DWORDS; miter++, s++, d++)
1017 *s = cpu_to_le32(*d); 1024 *s = cpu_to_le32(*d);
1018 1025
1019 ret = qla2x00_load_ram(ha, optrom_dma, 1026 ret = qla2x00_load_ram(vha, optrom_dma,
1020 flash_data_to_access_addr(faddr), 1027 flash_data_to_access_addr(faddr),
1021 OPTROM_BURST_DWORDS); 1028 OPTROM_BURST_DWORDS);
1022 if (ret != QLA_SUCCESS) { 1029 if (ret != QLA_SUCCESS) {
@@ -1044,7 +1051,7 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr,
1044 if (ret != QLA_SUCCESS) { 1051 if (ret != QLA_SUCCESS) {
1045 DEBUG9(printk("%s(%ld) Unable to program flash " 1052 DEBUG9(printk("%s(%ld) Unable to program flash "
1046 "address=%x data=%x.\n", __func__, 1053 "address=%x data=%x.\n", __func__,
1047 ha->host_no, faddr, *dwptr)); 1054 vha->host_no, faddr, *dwptr));
1048 break; 1055 break;
1049 } 1056 }
1050 1057
@@ -1067,11 +1074,12 @@ qla24xx_write_flash_data(scsi_qla_host_t *ha, uint32_t *dwptr, uint32_t faddr,
1067} 1074}
1068 1075
1069uint8_t * 1076uint8_t *
1070qla2x00_read_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr, 1077qla2x00_read_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr,
1071 uint32_t bytes) 1078 uint32_t bytes)
1072{ 1079{
1073 uint32_t i; 1080 uint32_t i;
1074 uint16_t *wptr; 1081 uint16_t *wptr;
1082 struct qla_hw_data *ha = vha->hw;
1075 1083
1076 /* Word reads to NVRAM via registers. */ 1084 /* Word reads to NVRAM via registers. */
1077 wptr = (uint16_t *)buf; 1085 wptr = (uint16_t *)buf;
@@ -1085,7 +1093,7 @@ qla2x00_read_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr,
1085} 1093}
1086 1094
1087uint8_t * 1095uint8_t *
1088qla24xx_read_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr, 1096qla24xx_read_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr,
1089 uint32_t bytes) 1097 uint32_t bytes)
1090{ 1098{
1091 uint32_t i; 1099 uint32_t i;
@@ -1094,20 +1102,21 @@ qla24xx_read_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr,
1094 /* Dword reads to flash. */ 1102 /* Dword reads to flash. */
1095 dwptr = (uint32_t *)buf; 1103 dwptr = (uint32_t *)buf;
1096 for (i = 0; i < bytes >> 2; i++, naddr++) 1104 for (i = 0; i < bytes >> 2; i++, naddr++)
1097 dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(ha, 1105 dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(vha->hw,
1098 nvram_data_to_access_addr(naddr))); 1106 nvram_data_to_access_addr(naddr)));
1099 1107
1100 return buf; 1108 return buf;
1101} 1109}
1102 1110
1103int 1111int
1104qla2x00_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr, 1112qla2x00_write_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr,
1105 uint32_t bytes) 1113 uint32_t bytes)
1106{ 1114{
1107 int ret, stat; 1115 int ret, stat;
1108 uint32_t i; 1116 uint32_t i;
1109 uint16_t *wptr; 1117 uint16_t *wptr;
1110 unsigned long flags; 1118 unsigned long flags;
1119 struct qla_hw_data *ha = vha->hw;
1111 1120
1112 ret = QLA_SUCCESS; 1121 ret = QLA_SUCCESS;
1113 1122
@@ -1134,12 +1143,13 @@ qla2x00_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr,
1134} 1143}
1135 1144
1136int 1145int
1137qla24xx_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr, 1146qla24xx_write_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr,
1138 uint32_t bytes) 1147 uint32_t bytes)
1139{ 1148{
1140 int ret; 1149 int ret;
1141 uint32_t i; 1150 uint32_t i;
1142 uint32_t *dwptr; 1151 uint32_t *dwptr;
1152 struct qla_hw_data *ha = vha->hw;
1143 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 1153 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1144 1154
1145 ret = QLA_SUCCESS; 1155 ret = QLA_SUCCESS;
@@ -1162,9 +1172,8 @@ qla24xx_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr,
1162 nvram_data_to_access_addr(naddr), 1172 nvram_data_to_access_addr(naddr),
1163 cpu_to_le32(*dwptr)); 1173 cpu_to_le32(*dwptr));
1164 if (ret != QLA_SUCCESS) { 1174 if (ret != QLA_SUCCESS) {
1165 DEBUG9(printk("%s(%ld) Unable to program " 1175 DEBUG9(qla_printk("Unable to program nvram address=%x "
1166 "nvram address=%x data=%x.\n", __func__, 1176 "data=%x.\n", naddr, *dwptr));
1167 ha->host_no, naddr, *dwptr));
1168 break; 1177 break;
1169 } 1178 }
1170 } 1179 }
@@ -1182,11 +1191,12 @@ qla24xx_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr,
1182} 1191}
1183 1192
1184uint8_t * 1193uint8_t *
1185qla25xx_read_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr, 1194qla25xx_read_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr,
1186 uint32_t bytes) 1195 uint32_t bytes)
1187{ 1196{
1188 uint32_t i; 1197 uint32_t i;
1189 uint32_t *dwptr; 1198 uint32_t *dwptr;
1199 struct qla_hw_data *ha = vha->hw;
1190 1200
1191 /* Dword reads to flash. */ 1201 /* Dword reads to flash. */
1192 dwptr = (uint32_t *)buf; 1202 dwptr = (uint32_t *)buf;
@@ -1199,19 +1209,20 @@ qla25xx_read_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr,
1199} 1209}
1200 1210
1201int 1211int
1202qla25xx_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr, 1212qla25xx_write_nvram_data(scsi_qla_host_t *vha, uint8_t *buf, uint32_t naddr,
1203 uint32_t bytes) 1213 uint32_t bytes)
1204{ 1214{
1215 struct qla_hw_data *ha = vha->hw;
1205#define RMW_BUFFER_SIZE (64 * 1024) 1216#define RMW_BUFFER_SIZE (64 * 1024)
1206 uint8_t *dbuf; 1217 uint8_t *dbuf;
1207 1218
1208 dbuf = vmalloc(RMW_BUFFER_SIZE); 1219 dbuf = vmalloc(RMW_BUFFER_SIZE);
1209 if (!dbuf) 1220 if (!dbuf)
1210 return QLA_MEMORY_ALLOC_FAILED; 1221 return QLA_MEMORY_ALLOC_FAILED;
1211 ha->isp_ops->read_optrom(ha, dbuf, ha->flt_region_vpd_nvram << 2, 1222 ha->isp_ops->read_optrom(vha, dbuf, ha->flt_region_vpd_nvram << 2,
1212 RMW_BUFFER_SIZE); 1223 RMW_BUFFER_SIZE);
1213 memcpy(dbuf + (naddr << 2), buf, bytes); 1224 memcpy(dbuf + (naddr << 2), buf, bytes);
1214 ha->isp_ops->write_optrom(ha, dbuf, ha->flt_region_vpd_nvram << 2, 1225 ha->isp_ops->write_optrom(vha, dbuf, ha->flt_region_vpd_nvram << 2,
1215 RMW_BUFFER_SIZE); 1226 RMW_BUFFER_SIZE);
1216 vfree(dbuf); 1227 vfree(dbuf);
1217 1228
@@ -1219,7 +1230,7 @@ qla25xx_write_nvram_data(scsi_qla_host_t *ha, uint8_t *buf, uint32_t naddr,
1219} 1230}
1220 1231
1221static inline void 1232static inline void
1222qla2x00_flip_colors(scsi_qla_host_t *ha, uint16_t *pflags) 1233qla2x00_flip_colors(struct qla_hw_data *ha, uint16_t *pflags)
1223{ 1234{
1224 if (IS_QLA2322(ha)) { 1235 if (IS_QLA2322(ha)) {
1225 /* Flip all colors. */ 1236 /* Flip all colors. */
@@ -1249,12 +1260,13 @@ qla2x00_flip_colors(scsi_qla_host_t *ha, uint16_t *pflags)
1249#define PIO_REG(h, r) ((h)->pio_address + offsetof(struct device_reg_2xxx, r)) 1260#define PIO_REG(h, r) ((h)->pio_address + offsetof(struct device_reg_2xxx, r))
1250 1261
1251void 1262void
1252qla2x00_beacon_blink(struct scsi_qla_host *ha) 1263qla2x00_beacon_blink(struct scsi_qla_host *vha)
1253{ 1264{
1254 uint16_t gpio_enable; 1265 uint16_t gpio_enable;
1255 uint16_t gpio_data; 1266 uint16_t gpio_data;
1256 uint16_t led_color = 0; 1267 uint16_t led_color = 0;
1257 unsigned long flags; 1268 unsigned long flags;
1269 struct qla_hw_data *ha = vha->hw;
1258 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1270 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1259 1271
1260 spin_lock_irqsave(&ha->hardware_lock, flags); 1272 spin_lock_irqsave(&ha->hardware_lock, flags);
@@ -1298,17 +1310,18 @@ qla2x00_beacon_blink(struct scsi_qla_host *ha)
1298} 1310}
1299 1311
1300int 1312int
1301qla2x00_beacon_on(struct scsi_qla_host *ha) 1313qla2x00_beacon_on(struct scsi_qla_host *vha)
1302{ 1314{
1303 uint16_t gpio_enable; 1315 uint16_t gpio_enable;
1304 uint16_t gpio_data; 1316 uint16_t gpio_data;
1305 unsigned long flags; 1317 unsigned long flags;
1318 struct qla_hw_data *ha = vha->hw;
1306 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1319 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1307 1320
1308 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 1321 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
1309 ha->fw_options[1] |= FO1_DISABLE_GPIO6_7; 1322 ha->fw_options[1] |= FO1_DISABLE_GPIO6_7;
1310 1323
1311 if (qla2x00_set_fw_options(ha, ha->fw_options) != QLA_SUCCESS) { 1324 if (qla2x00_set_fw_options(vha, ha->fw_options) != QLA_SUCCESS) {
1312 qla_printk(KERN_WARNING, ha, 1325 qla_printk(KERN_WARNING, ha,
1313 "Unable to update fw options (beacon on).\n"); 1326 "Unable to update fw options (beacon on).\n");
1314 return QLA_FUNCTION_FAILED; 1327 return QLA_FUNCTION_FAILED;
@@ -1354,9 +1367,10 @@ qla2x00_beacon_on(struct scsi_qla_host *ha)
1354} 1367}
1355 1368
1356int 1369int
1357qla2x00_beacon_off(struct scsi_qla_host *ha) 1370qla2x00_beacon_off(struct scsi_qla_host *vha)
1358{ 1371{
1359 int rval = QLA_SUCCESS; 1372 int rval = QLA_SUCCESS;
1373 struct qla_hw_data *ha = vha->hw;
1360 1374
1361 ha->beacon_blink_led = 0; 1375 ha->beacon_blink_led = 0;
1362 1376
@@ -1366,12 +1380,12 @@ qla2x00_beacon_off(struct scsi_qla_host *ha)
1366 else 1380 else
1367 ha->beacon_color_state = QLA_LED_GRN_ON; 1381 ha->beacon_color_state = QLA_LED_GRN_ON;
1368 1382
1369 ha->isp_ops->beacon_blink(ha); /* This turns green LED off */ 1383 ha->isp_ops->beacon_blink(vha); /* This turns green LED off */
1370 1384
1371 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 1385 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
1372 ha->fw_options[1] &= ~FO1_DISABLE_GPIO6_7; 1386 ha->fw_options[1] &= ~FO1_DISABLE_GPIO6_7;
1373 1387
1374 rval = qla2x00_set_fw_options(ha, ha->fw_options); 1388 rval = qla2x00_set_fw_options(vha, ha->fw_options);
1375 if (rval != QLA_SUCCESS) 1389 if (rval != QLA_SUCCESS)
1376 qla_printk(KERN_WARNING, ha, 1390 qla_printk(KERN_WARNING, ha,
1377 "Unable to update fw options (beacon off).\n"); 1391 "Unable to update fw options (beacon off).\n");
@@ -1380,7 +1394,7 @@ qla2x00_beacon_off(struct scsi_qla_host *ha)
1380 1394
1381 1395
1382static inline void 1396static inline void
1383qla24xx_flip_colors(scsi_qla_host_t *ha, uint16_t *pflags) 1397qla24xx_flip_colors(struct qla_hw_data *ha, uint16_t *pflags)
1384{ 1398{
1385 /* Flip all colors. */ 1399 /* Flip all colors. */
1386 if (ha->beacon_color_state == QLA_LED_ALL_ON) { 1400 if (ha->beacon_color_state == QLA_LED_ALL_ON) {
@@ -1395,11 +1409,12 @@ qla24xx_flip_colors(scsi_qla_host_t *ha, uint16_t *pflags)
1395} 1409}
1396 1410
1397void 1411void
1398qla24xx_beacon_blink(struct scsi_qla_host *ha) 1412qla24xx_beacon_blink(struct scsi_qla_host *vha)
1399{ 1413{
1400 uint16_t led_color = 0; 1414 uint16_t led_color = 0;
1401 uint32_t gpio_data; 1415 uint32_t gpio_data;
1402 unsigned long flags; 1416 unsigned long flags;
1417 struct qla_hw_data *ha = vha->hw;
1403 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 1418 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1404 1419
1405 /* Save the Original GPIOD. */ 1420 /* Save the Original GPIOD. */
@@ -1428,20 +1443,21 @@ qla24xx_beacon_blink(struct scsi_qla_host *ha)
1428} 1443}
1429 1444
1430int 1445int
1431qla24xx_beacon_on(struct scsi_qla_host *ha) 1446qla24xx_beacon_on(struct scsi_qla_host *vha)
1432{ 1447{
1433 uint32_t gpio_data; 1448 uint32_t gpio_data;
1434 unsigned long flags; 1449 unsigned long flags;
1450 struct qla_hw_data *ha = vha->hw;
1435 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 1451 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1436 1452
1437 if (ha->beacon_blink_led == 0) { 1453 if (ha->beacon_blink_led == 0) {
1438 /* Enable firmware for update */ 1454 /* Enable firmware for update */
1439 ha->fw_options[1] |= ADD_FO1_DISABLE_GPIO_LED_CTRL; 1455 ha->fw_options[1] |= ADD_FO1_DISABLE_GPIO_LED_CTRL;
1440 1456
1441 if (qla2x00_set_fw_options(ha, ha->fw_options) != QLA_SUCCESS) 1457 if (qla2x00_set_fw_options(vha, ha->fw_options) != QLA_SUCCESS)
1442 return QLA_FUNCTION_FAILED; 1458 return QLA_FUNCTION_FAILED;
1443 1459
1444 if (qla2x00_get_fw_options(ha, ha->fw_options) != 1460 if (qla2x00_get_fw_options(vha, ha->fw_options) !=
1445 QLA_SUCCESS) { 1461 QLA_SUCCESS) {
1446 qla_printk(KERN_WARNING, ha, 1462 qla_printk(KERN_WARNING, ha,
1447 "Unable to update fw options (beacon on).\n"); 1463 "Unable to update fw options (beacon on).\n");
@@ -1469,16 +1485,17 @@ qla24xx_beacon_on(struct scsi_qla_host *ha)
1469} 1485}
1470 1486
1471int 1487int
1472qla24xx_beacon_off(struct scsi_qla_host *ha) 1488qla24xx_beacon_off(struct scsi_qla_host *vha)
1473{ 1489{
1474 uint32_t gpio_data; 1490 uint32_t gpio_data;
1475 unsigned long flags; 1491 unsigned long flags;
1492 struct qla_hw_data *ha = vha->hw;
1476 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 1493 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1477 1494
1478 ha->beacon_blink_led = 0; 1495 ha->beacon_blink_led = 0;
1479 ha->beacon_color_state = QLA_LED_ALL_ON; 1496 ha->beacon_color_state = QLA_LED_ALL_ON;
1480 1497
1481 ha->isp_ops->beacon_blink(ha); /* Will flip to all off. */ 1498 ha->isp_ops->beacon_blink(vha); /* Will flip to all off. */
1482 1499
1483 /* Give control back to firmware. */ 1500 /* Give control back to firmware. */
1484 spin_lock_irqsave(&ha->hardware_lock, flags); 1501 spin_lock_irqsave(&ha->hardware_lock, flags);
@@ -1492,13 +1509,13 @@ qla24xx_beacon_off(struct scsi_qla_host *ha)
1492 1509
1493 ha->fw_options[1] &= ~ADD_FO1_DISABLE_GPIO_LED_CTRL; 1510 ha->fw_options[1] &= ~ADD_FO1_DISABLE_GPIO_LED_CTRL;
1494 1511
1495 if (qla2x00_set_fw_options(ha, ha->fw_options) != QLA_SUCCESS) { 1512 if (qla2x00_set_fw_options(vha, ha->fw_options) != QLA_SUCCESS) {
1496 qla_printk(KERN_WARNING, ha, 1513 qla_printk(KERN_WARNING, ha,
1497 "Unable to update fw options (beacon off).\n"); 1514 "Unable to update fw options (beacon off).\n");
1498 return QLA_FUNCTION_FAILED; 1515 return QLA_FUNCTION_FAILED;
1499 } 1516 }
1500 1517
1501 if (qla2x00_get_fw_options(ha, ha->fw_options) != QLA_SUCCESS) { 1518 if (qla2x00_get_fw_options(vha, ha->fw_options) != QLA_SUCCESS) {
1502 qla_printk(KERN_WARNING, ha, 1519 qla_printk(KERN_WARNING, ha,
1503 "Unable to get fw options (beacon off).\n"); 1520 "Unable to get fw options (beacon off).\n");
1504 return QLA_FUNCTION_FAILED; 1521 return QLA_FUNCTION_FAILED;
@@ -1517,7 +1534,7 @@ qla24xx_beacon_off(struct scsi_qla_host *ha)
1517 * @ha: HA context 1534 * @ha: HA context
1518 */ 1535 */
1519static void 1536static void
1520qla2x00_flash_enable(scsi_qla_host_t *ha) 1537qla2x00_flash_enable(struct qla_hw_data *ha)
1521{ 1538{
1522 uint16_t data; 1539 uint16_t data;
1523 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1540 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
@@ -1533,7 +1550,7 @@ qla2x00_flash_enable(scsi_qla_host_t *ha)
1533 * @ha: HA context 1550 * @ha: HA context
1534 */ 1551 */
1535static void 1552static void
1536qla2x00_flash_disable(scsi_qla_host_t *ha) 1553qla2x00_flash_disable(struct qla_hw_data *ha)
1537{ 1554{
1538 uint16_t data; 1555 uint16_t data;
1539 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1556 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
@@ -1554,7 +1571,7 @@ qla2x00_flash_disable(scsi_qla_host_t *ha)
1554 * Returns the byte read from flash @addr. 1571 * Returns the byte read from flash @addr.
1555 */ 1572 */
1556static uint8_t 1573static uint8_t
1557qla2x00_read_flash_byte(scsi_qla_host_t *ha, uint32_t addr) 1574qla2x00_read_flash_byte(struct qla_hw_data *ha, uint32_t addr)
1558{ 1575{
1559 uint16_t data; 1576 uint16_t data;
1560 uint16_t bank_select; 1577 uint16_t bank_select;
@@ -1615,7 +1632,7 @@ qla2x00_read_flash_byte(scsi_qla_host_t *ha, uint32_t addr)
1615 * @data: Data to write 1632 * @data: Data to write
1616 */ 1633 */
1617static void 1634static void
1618qla2x00_write_flash_byte(scsi_qla_host_t *ha, uint32_t addr, uint8_t data) 1635qla2x00_write_flash_byte(struct qla_hw_data *ha, uint32_t addr, uint8_t data)
1619{ 1636{
1620 uint16_t bank_select; 1637 uint16_t bank_select;
1621 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1638 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
@@ -1678,7 +1695,7 @@ qla2x00_write_flash_byte(scsi_qla_host_t *ha, uint32_t addr, uint8_t data)
1678 * Returns 0 on success, else non-zero. 1695 * Returns 0 on success, else non-zero.
1679 */ 1696 */
1680static int 1697static int
1681qla2x00_poll_flash(scsi_qla_host_t *ha, uint32_t addr, uint8_t poll_data, 1698qla2x00_poll_flash(struct qla_hw_data *ha, uint32_t addr, uint8_t poll_data,
1682 uint8_t man_id, uint8_t flash_id) 1699 uint8_t man_id, uint8_t flash_id)
1683{ 1700{
1684 int status; 1701 int status;
@@ -1718,8 +1735,8 @@ qla2x00_poll_flash(scsi_qla_host_t *ha, uint32_t addr, uint8_t poll_data,
1718 * Returns 0 on success, else non-zero. 1735 * Returns 0 on success, else non-zero.
1719 */ 1736 */
1720static int 1737static int
1721qla2x00_program_flash_address(scsi_qla_host_t *ha, uint32_t addr, uint8_t data, 1738qla2x00_program_flash_address(struct qla_hw_data *ha, uint32_t addr,
1722 uint8_t man_id, uint8_t flash_id) 1739 uint8_t data, uint8_t man_id, uint8_t flash_id)
1723{ 1740{
1724 /* Write Program Command Sequence. */ 1741 /* Write Program Command Sequence. */
1725 if (IS_OEM_001(ha)) { 1742 if (IS_OEM_001(ha)) {
@@ -1755,7 +1772,7 @@ qla2x00_program_flash_address(scsi_qla_host_t *ha, uint32_t addr, uint8_t data,
1755 * Returns 0 on success, else non-zero. 1772 * Returns 0 on success, else non-zero.
1756 */ 1773 */
1757static int 1774static int
1758qla2x00_erase_flash(scsi_qla_host_t *ha, uint8_t man_id, uint8_t flash_id) 1775qla2x00_erase_flash(struct qla_hw_data *ha, uint8_t man_id, uint8_t flash_id)
1759{ 1776{
1760 /* Individual Sector Erase Command Sequence */ 1777 /* Individual Sector Erase Command Sequence */
1761 if (IS_OEM_001(ha)) { 1778 if (IS_OEM_001(ha)) {
@@ -1791,7 +1808,7 @@ qla2x00_erase_flash(scsi_qla_host_t *ha, uint8_t man_id, uint8_t flash_id)
1791 * Returns 0 on success, else non-zero. 1808 * Returns 0 on success, else non-zero.
1792 */ 1809 */
1793static int 1810static int
1794qla2x00_erase_flash_sector(scsi_qla_host_t *ha, uint32_t addr, 1811qla2x00_erase_flash_sector(struct qla_hw_data *ha, uint32_t addr,
1795 uint32_t sec_mask, uint8_t man_id, uint8_t flash_id) 1812 uint32_t sec_mask, uint8_t man_id, uint8_t flash_id)
1796{ 1813{
1797 /* Individual Sector Erase Command Sequence */ 1814 /* Individual Sector Erase Command Sequence */
@@ -1817,7 +1834,7 @@ qla2x00_erase_flash_sector(scsi_qla_host_t *ha, uint32_t addr,
1817 * @flash_id: Flash ID 1834 * @flash_id: Flash ID
1818 */ 1835 */
1819static void 1836static void
1820qla2x00_get_flash_manufacturer(scsi_qla_host_t *ha, uint8_t *man_id, 1837qla2x00_get_flash_manufacturer(struct qla_hw_data *ha, uint8_t *man_id,
1821 uint8_t *flash_id) 1838 uint8_t *flash_id)
1822{ 1839{
1823 qla2x00_write_flash_byte(ha, 0x5555, 0xaa); 1840 qla2x00_write_flash_byte(ha, 0x5555, 0xaa);
@@ -1831,8 +1848,8 @@ qla2x00_get_flash_manufacturer(scsi_qla_host_t *ha, uint8_t *man_id,
1831} 1848}
1832 1849
1833static void 1850static void
1834qla2x00_read_flash_data(scsi_qla_host_t *ha, uint8_t *tmp_buf, uint32_t saddr, 1851qla2x00_read_flash_data(struct qla_hw_data *ha, uint8_t *tmp_buf,
1835 uint32_t length) 1852 uint32_t saddr, uint32_t length)
1836{ 1853{
1837 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1854 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1838 uint32_t midpoint, ilength; 1855 uint32_t midpoint, ilength;
@@ -1856,14 +1873,15 @@ qla2x00_read_flash_data(scsi_qla_host_t *ha, uint8_t *tmp_buf, uint32_t saddr,
1856} 1873}
1857 1874
1858static inline void 1875static inline void
1859qla2x00_suspend_hba(struct scsi_qla_host *ha) 1876qla2x00_suspend_hba(struct scsi_qla_host *vha)
1860{ 1877{
1861 int cnt; 1878 int cnt;
1862 unsigned long flags; 1879 unsigned long flags;
1880 struct qla_hw_data *ha = vha->hw;
1863 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1881 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1864 1882
1865 /* Suspend HBA. */ 1883 /* Suspend HBA. */
1866 scsi_block_requests(ha->host); 1884 scsi_block_requests(vha->host);
1867 ha->isp_ops->disable_intrs(ha); 1885 ha->isp_ops->disable_intrs(ha);
1868 set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); 1886 set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags);
1869 1887
@@ -1884,26 +1902,29 @@ qla2x00_suspend_hba(struct scsi_qla_host *ha)
1884} 1902}
1885 1903
1886static inline void 1904static inline void
1887qla2x00_resume_hba(struct scsi_qla_host *ha) 1905qla2x00_resume_hba(struct scsi_qla_host *vha)
1888{ 1906{
1907 struct qla_hw_data *ha = vha->hw;
1908
1889 /* Resume HBA. */ 1909 /* Resume HBA. */
1890 clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); 1910 clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags);
1891 set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags); 1911 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1892 qla2xxx_wake_dpc(ha); 1912 qla2xxx_wake_dpc(vha);
1893 qla2x00_wait_for_hba_online(ha); 1913 qla2x00_wait_for_hba_online(vha);
1894 scsi_unblock_requests(ha->host); 1914 scsi_unblock_requests(vha->host);
1895} 1915}
1896 1916
1897uint8_t * 1917uint8_t *
1898qla2x00_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf, 1918qla2x00_read_optrom_data(struct scsi_qla_host *vha, uint8_t *buf,
1899 uint32_t offset, uint32_t length) 1919 uint32_t offset, uint32_t length)
1900{ 1920{
1901 uint32_t addr, midpoint; 1921 uint32_t addr, midpoint;
1902 uint8_t *data; 1922 uint8_t *data;
1923 struct qla_hw_data *ha = vha->hw;
1903 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1924 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1904 1925
1905 /* Suspend HBA. */ 1926 /* Suspend HBA. */
1906 qla2x00_suspend_hba(ha); 1927 qla2x00_suspend_hba(vha);
1907 1928
1908 /* Go with read. */ 1929 /* Go with read. */
1909 midpoint = ha->optrom_size / 2; 1930 midpoint = ha->optrom_size / 2;
@@ -1922,13 +1943,13 @@ qla2x00_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf,
1922 qla2x00_flash_disable(ha); 1943 qla2x00_flash_disable(ha);
1923 1944
1924 /* Resume HBA. */ 1945 /* Resume HBA. */
1925 qla2x00_resume_hba(ha); 1946 qla2x00_resume_hba(vha);
1926 1947
1927 return buf; 1948 return buf;
1928} 1949}
1929 1950
1930int 1951int
1931qla2x00_write_optrom_data(struct scsi_qla_host *ha, uint8_t *buf, 1952qla2x00_write_optrom_data(struct scsi_qla_host *vha, uint8_t *buf,
1932 uint32_t offset, uint32_t length) 1953 uint32_t offset, uint32_t length)
1933{ 1954{
1934 1955
@@ -1936,10 +1957,11 @@ qla2x00_write_optrom_data(struct scsi_qla_host *ha, uint8_t *buf,
1936 uint8_t man_id, flash_id, sec_number, data; 1957 uint8_t man_id, flash_id, sec_number, data;
1937 uint16_t wd; 1958 uint16_t wd;
1938 uint32_t addr, liter, sec_mask, rest_addr; 1959 uint32_t addr, liter, sec_mask, rest_addr;
1960 struct qla_hw_data *ha = vha->hw;
1939 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1961 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1940 1962
1941 /* Suspend HBA. */ 1963 /* Suspend HBA. */
1942 qla2x00_suspend_hba(ha); 1964 qla2x00_suspend_hba(vha);
1943 1965
1944 rval = QLA_SUCCESS; 1966 rval = QLA_SUCCESS;
1945 sec_number = 0; 1967 sec_number = 0;
@@ -2139,55 +2161,58 @@ update_flash:
2139 qla2x00_flash_disable(ha); 2161 qla2x00_flash_disable(ha);
2140 2162
2141 /* Resume HBA. */ 2163 /* Resume HBA. */
2142 qla2x00_resume_hba(ha); 2164 qla2x00_resume_hba(vha);
2143 2165
2144 return rval; 2166 return rval;
2145} 2167}
2146 2168
2147uint8_t * 2169uint8_t *
2148qla24xx_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf, 2170qla24xx_read_optrom_data(struct scsi_qla_host *vha, uint8_t *buf,
2149 uint32_t offset, uint32_t length) 2171 uint32_t offset, uint32_t length)
2150{ 2172{
2173 struct qla_hw_data *ha = vha->hw;
2174
2151 /* Suspend HBA. */ 2175 /* Suspend HBA. */
2152 scsi_block_requests(ha->host); 2176 scsi_block_requests(vha->host);
2153 set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); 2177 set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags);
2154 2178
2155 /* Go with read. */ 2179 /* Go with read. */
2156 qla24xx_read_flash_data(ha, (uint32_t *)buf, offset >> 2, length >> 2); 2180 qla24xx_read_flash_data(vha, (uint32_t *)buf, offset >> 2, length >> 2);
2157 2181
2158 /* Resume HBA. */ 2182 /* Resume HBA. */
2159 clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); 2183 clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags);
2160 scsi_unblock_requests(ha->host); 2184 scsi_unblock_requests(vha->host);
2161 2185
2162 return buf; 2186 return buf;
2163} 2187}
2164 2188
2165int 2189int
2166qla24xx_write_optrom_data(struct scsi_qla_host *ha, uint8_t *buf, 2190qla24xx_write_optrom_data(struct scsi_qla_host *vha, uint8_t *buf,
2167 uint32_t offset, uint32_t length) 2191 uint32_t offset, uint32_t length)
2168{ 2192{
2169 int rval; 2193 int rval;
2194 struct qla_hw_data *ha = vha->hw;
2170 2195
2171 /* Suspend HBA. */ 2196 /* Suspend HBA. */
2172 scsi_block_requests(ha->host); 2197 scsi_block_requests(vha->host);
2173 set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); 2198 set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags);
2174 2199
2175 /* Go with write. */ 2200 /* Go with write. */
2176 rval = qla24xx_write_flash_data(ha, (uint32_t *)buf, offset >> 2, 2201 rval = qla24xx_write_flash_data(vha, (uint32_t *)buf, offset >> 2,
2177 length >> 2); 2202 length >> 2);
2178 2203
2179 /* Resume HBA -- RISC reset needed. */ 2204 /* Resume HBA -- RISC reset needed. */
2180 clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); 2205 clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags);
2181 set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags); 2206 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2182 qla2xxx_wake_dpc(ha); 2207 qla2xxx_wake_dpc(vha);
2183 qla2x00_wait_for_hba_online(ha); 2208 qla2x00_wait_for_hba_online(vha);
2184 scsi_unblock_requests(ha->host); 2209 scsi_unblock_requests(vha->host);
2185 2210
2186 return rval; 2211 return rval;
2187} 2212}
2188 2213
2189uint8_t * 2214uint8_t *
2190qla25xx_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf, 2215qla25xx_read_optrom_data(struct scsi_qla_host *vha, uint8_t *buf,
2191 uint32_t offset, uint32_t length) 2216 uint32_t offset, uint32_t length)
2192{ 2217{
2193 int rval; 2218 int rval;
@@ -2195,6 +2220,7 @@ qla25xx_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf,
2195 void *optrom; 2220 void *optrom;
2196 uint8_t *pbuf; 2221 uint8_t *pbuf;
2197 uint32_t faddr, left, burst; 2222 uint32_t faddr, left, burst;
2223 struct qla_hw_data *ha = vha->hw;
2198 2224
2199 if (offset & 0xfff) 2225 if (offset & 0xfff)
2200 goto slow_read; 2226 goto slow_read;
@@ -2219,7 +2245,7 @@ qla25xx_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf,
2219 if (burst > left) 2245 if (burst > left)
2220 burst = left; 2246 burst = left;
2221 2247
2222 rval = qla2x00_dump_ram(ha, optrom_dma, 2248 rval = qla2x00_dump_ram(vha, optrom_dma,
2223 flash_data_to_access_addr(faddr), burst); 2249 flash_data_to_access_addr(faddr), burst);
2224 if (rval) { 2250 if (rval) {
2225 qla_printk(KERN_WARNING, ha, 2251 qla_printk(KERN_WARNING, ha,
@@ -2248,7 +2274,7 @@ qla25xx_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf,
2248 return buf; 2274 return buf;
2249 2275
2250slow_read: 2276slow_read:
2251 return qla24xx_read_optrom_data(ha, buf, offset, length); 2277 return qla24xx_read_optrom_data(vha, buf, offset, length);
2252} 2278}
2253 2279
2254/** 2280/**
@@ -2270,7 +2296,7 @@ slow_read:
2270 * Returns QLA_SUCCESS on successful retrieval of version. 2296 * Returns QLA_SUCCESS on successful retrieval of version.
2271 */ 2297 */
2272static void 2298static void
2273qla2x00_get_fcode_version(scsi_qla_host_t *ha, uint32_t pcids) 2299qla2x00_get_fcode_version(struct qla_hw_data *ha, uint32_t pcids)
2274{ 2300{
2275 int ret = QLA_FUNCTION_FAILED; 2301 int ret = QLA_FUNCTION_FAILED;
2276 uint32_t istart, iend, iter, vend; 2302 uint32_t istart, iend, iter, vend;
@@ -2344,13 +2370,14 @@ qla2x00_get_fcode_version(scsi_qla_host_t *ha, uint32_t pcids)
2344} 2370}
2345 2371
2346int 2372int
2347qla2x00_get_flash_version(scsi_qla_host_t *ha, void *mbuf) 2373qla2x00_get_flash_version(scsi_qla_host_t *vha, void *mbuf)
2348{ 2374{
2349 int ret = QLA_SUCCESS; 2375 int ret = QLA_SUCCESS;
2350 uint8_t code_type, last_image; 2376 uint8_t code_type, last_image;
2351 uint32_t pcihdr, pcids; 2377 uint32_t pcihdr, pcids;
2352 uint8_t *dbyte; 2378 uint8_t *dbyte;
2353 uint16_t *dcode; 2379 uint16_t *dcode;
2380 struct qla_hw_data *ha = vha->hw;
2354 2381
2355 if (!ha->pio_address || !mbuf) 2382 if (!ha->pio_address || !mbuf)
2356 return QLA_FUNCTION_FAILED; 2383 return QLA_FUNCTION_FAILED;
@@ -2370,8 +2397,8 @@ qla2x00_get_flash_version(scsi_qla_host_t *ha, void *mbuf)
2370 if (qla2x00_read_flash_byte(ha, pcihdr) != 0x55 || 2397 if (qla2x00_read_flash_byte(ha, pcihdr) != 0x55 ||
2371 qla2x00_read_flash_byte(ha, pcihdr + 0x01) != 0xaa) { 2398 qla2x00_read_flash_byte(ha, pcihdr + 0x01) != 0xaa) {
2372 /* No signature */ 2399 /* No signature */
2373 DEBUG2(printk("scsi(%ld): No matching ROM " 2400 DEBUG2(qla_printk(KERN_DEBUG, ha, "No matching ROM "
2374 "signature.\n", ha->host_no)); 2401 "signature.\n"));
2375 ret = QLA_FUNCTION_FAILED; 2402 ret = QLA_FUNCTION_FAILED;
2376 break; 2403 break;
2377 } 2404 }
@@ -2387,8 +2414,8 @@ qla2x00_get_flash_version(scsi_qla_host_t *ha, void *mbuf)
2387 qla2x00_read_flash_byte(ha, pcids + 0x2) != 'I' || 2414 qla2x00_read_flash_byte(ha, pcids + 0x2) != 'I' ||
2388 qla2x00_read_flash_byte(ha, pcids + 0x3) != 'R') { 2415 qla2x00_read_flash_byte(ha, pcids + 0x3) != 'R') {
2389 /* Incorrect header. */ 2416 /* Incorrect header. */
2390 DEBUG2(printk("%s(): PCI data struct not found " 2417 DEBUG2(qla_printk(KERN_INFO, ha, "PCI data struct not "
2391 "pcir_adr=%x.\n", __func__, pcids)); 2418 "found pcir_adr=%x.\n", pcids));
2392 ret = QLA_FUNCTION_FAILED; 2419 ret = QLA_FUNCTION_FAILED;
2393 break; 2420 break;
2394 } 2421 }
@@ -2402,7 +2429,7 @@ qla2x00_get_flash_version(scsi_qla_host_t *ha, void *mbuf)
2402 qla2x00_read_flash_byte(ha, pcids + 0x12); 2429 qla2x00_read_flash_byte(ha, pcids + 0x12);
2403 ha->bios_revision[1] = 2430 ha->bios_revision[1] =
2404 qla2x00_read_flash_byte(ha, pcids + 0x13); 2431 qla2x00_read_flash_byte(ha, pcids + 0x13);
2405 DEBUG3(printk("%s(): read BIOS %d.%d.\n", __func__, 2432 DEBUG3(qla_printk(KERN_DEBUG, ha, "read BIOS %d.%d.\n",
2406 ha->bios_revision[1], ha->bios_revision[0])); 2433 ha->bios_revision[1], ha->bios_revision[0]));
2407 break; 2434 break;
2408 case ROM_CODE_TYPE_FCODE: 2435 case ROM_CODE_TYPE_FCODE:
@@ -2416,12 +2443,12 @@ qla2x00_get_flash_version(scsi_qla_host_t *ha, void *mbuf)
2416 qla2x00_read_flash_byte(ha, pcids + 0x12); 2443 qla2x00_read_flash_byte(ha, pcids + 0x12);
2417 ha->efi_revision[1] = 2444 ha->efi_revision[1] =
2418 qla2x00_read_flash_byte(ha, pcids + 0x13); 2445 qla2x00_read_flash_byte(ha, pcids + 0x13);
2419 DEBUG3(printk("%s(): read EFI %d.%d.\n", __func__, 2446 DEBUG3(qla_printk(KERN_DEBUG, ha, "read EFI %d.%d.\n",
2420 ha->efi_revision[1], ha->efi_revision[0])); 2447 ha->efi_revision[1], ha->efi_revision[0]));
2421 break; 2448 break;
2422 default: 2449 default:
2423 DEBUG2(printk("%s(): Unrecognized code type %x at " 2450 DEBUG2(qla_printk(KERN_INFO, ha, "Unrecognized code "
2424 "pcids %x.\n", __func__, code_type, pcids)); 2451 "type %x at pcids %x.\n", code_type, pcids));
2425 break; 2452 break;
2426 } 2453 }
2427 2454
@@ -2441,16 +2468,16 @@ qla2x00_get_flash_version(scsi_qla_host_t *ha, void *mbuf)
2441 2468
2442 qla2x00_read_flash_data(ha, dbyte, ha->flt_region_fw * 4 + 10, 2469 qla2x00_read_flash_data(ha, dbyte, ha->flt_region_fw * 4 + 10,
2443 8); 2470 8);
2444 DEBUG3(printk("%s(%ld): dumping fw ver from flash:\n", 2471 DEBUG3(qla_printk(KERN_DEBUG, ha, "dumping fw ver from "
2445 __func__, ha->host_no)); 2472 "flash:\n"));
2446 DEBUG3(qla2x00_dump_buffer((uint8_t *)dbyte, 8)); 2473 DEBUG3(qla2x00_dump_buffer((uint8_t *)dbyte, 8));
2447 2474
2448 if ((dcode[0] == 0xffff && dcode[1] == 0xffff && 2475 if ((dcode[0] == 0xffff && dcode[1] == 0xffff &&
2449 dcode[2] == 0xffff && dcode[3] == 0xffff) || 2476 dcode[2] == 0xffff && dcode[3] == 0xffff) ||
2450 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 2477 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
2451 dcode[3] == 0)) { 2478 dcode[3] == 0)) {
2452 DEBUG2(printk("%s(): Unrecognized fw revision at " 2479 DEBUG2(qla_printk(KERN_INFO, ha, "Unrecognized fw "
2453 "%x.\n", __func__, ha->flt_region_fw * 4)); 2480 "revision at %x.\n", ha->flt_region_fw * 4));
2454 } else { 2481 } else {
2455 /* values are in big endian */ 2482 /* values are in big endian */
2456 ha->fw_revision[0] = dbyte[0] << 16 | dbyte[1]; 2483 ha->fw_revision[0] = dbyte[0] << 16 | dbyte[1];
@@ -2465,7 +2492,7 @@ qla2x00_get_flash_version(scsi_qla_host_t *ha, void *mbuf)
2465} 2492}
2466 2493
2467int 2494int
2468qla24xx_get_flash_version(scsi_qla_host_t *ha, void *mbuf) 2495qla24xx_get_flash_version(scsi_qla_host_t *vha, void *mbuf)
2469{ 2496{
2470 int ret = QLA_SUCCESS; 2497 int ret = QLA_SUCCESS;
2471 uint32_t pcihdr, pcids; 2498 uint32_t pcihdr, pcids;
@@ -2473,6 +2500,7 @@ qla24xx_get_flash_version(scsi_qla_host_t *ha, void *mbuf)
2473 uint8_t *bcode; 2500 uint8_t *bcode;
2474 uint8_t code_type, last_image; 2501 uint8_t code_type, last_image;
2475 int i; 2502 int i;
2503 struct qla_hw_data *ha = vha->hw;
2476 2504
2477 if (!mbuf) 2505 if (!mbuf)
2478 return QLA_FUNCTION_FAILED; 2506 return QLA_FUNCTION_FAILED;
@@ -2489,12 +2517,12 @@ qla24xx_get_flash_version(scsi_qla_host_t *ha, void *mbuf)
2489 last_image = 1; 2517 last_image = 1;
2490 do { 2518 do {
2491 /* Verify PCI expansion ROM header. */ 2519 /* Verify PCI expansion ROM header. */
2492 qla24xx_read_flash_data(ha, dcode, pcihdr >> 2, 0x20); 2520 qla24xx_read_flash_data(vha, dcode, pcihdr >> 2, 0x20);
2493 bcode = mbuf + (pcihdr % 4); 2521 bcode = mbuf + (pcihdr % 4);
2494 if (bcode[0x0] != 0x55 || bcode[0x1] != 0xaa) { 2522 if (bcode[0x0] != 0x55 || bcode[0x1] != 0xaa) {
2495 /* No signature */ 2523 /* No signature */
2496 DEBUG2(printk("scsi(%ld): No matching ROM " 2524 DEBUG2(qla_printk(KERN_DEBUG, ha, "No matching ROM "
2497 "signature.\n", ha->host_no)); 2525 "signature.\n"));
2498 ret = QLA_FUNCTION_FAILED; 2526 ret = QLA_FUNCTION_FAILED;
2499 break; 2527 break;
2500 } 2528 }
@@ -2502,15 +2530,15 @@ qla24xx_get_flash_version(scsi_qla_host_t *ha, void *mbuf)
2502 /* Locate PCI data structure. */ 2530 /* Locate PCI data structure. */
2503 pcids = pcihdr + ((bcode[0x19] << 8) | bcode[0x18]); 2531 pcids = pcihdr + ((bcode[0x19] << 8) | bcode[0x18]);
2504 2532
2505 qla24xx_read_flash_data(ha, dcode, pcids >> 2, 0x20); 2533 qla24xx_read_flash_data(vha, dcode, pcids >> 2, 0x20);
2506 bcode = mbuf + (pcihdr % 4); 2534 bcode = mbuf + (pcihdr % 4);
2507 2535
2508 /* Validate signature of PCI data structure. */ 2536 /* Validate signature of PCI data structure. */
2509 if (bcode[0x0] != 'P' || bcode[0x1] != 'C' || 2537 if (bcode[0x0] != 'P' || bcode[0x1] != 'C' ||
2510 bcode[0x2] != 'I' || bcode[0x3] != 'R') { 2538 bcode[0x2] != 'I' || bcode[0x3] != 'R') {
2511 /* Incorrect header. */ 2539 /* Incorrect header. */
2512 DEBUG2(printk("%s(): PCI data struct not found " 2540 DEBUG2(qla_printk(KERN_INFO, ha, "PCI data struct not "
2513 "pcir_adr=%x.\n", __func__, pcids)); 2541 "found pcir_adr=%x.\n", pcids));
2514 ret = QLA_FUNCTION_FAILED; 2542 ret = QLA_FUNCTION_FAILED;
2515 break; 2543 break;
2516 } 2544 }
@@ -2522,26 +2550,26 @@ qla24xx_get_flash_version(scsi_qla_host_t *ha, void *mbuf)
2522 /* Intel x86, PC-AT compatible. */ 2550 /* Intel x86, PC-AT compatible. */
2523 ha->bios_revision[0] = bcode[0x12]; 2551 ha->bios_revision[0] = bcode[0x12];
2524 ha->bios_revision[1] = bcode[0x13]; 2552 ha->bios_revision[1] = bcode[0x13];
2525 DEBUG3(printk("%s(): read BIOS %d.%d.\n", __func__, 2553 DEBUG3(qla_printk(KERN_DEBUG, ha, "read BIOS %d.%d.\n",
2526 ha->bios_revision[1], ha->bios_revision[0])); 2554 ha->bios_revision[1], ha->bios_revision[0]));
2527 break; 2555 break;
2528 case ROM_CODE_TYPE_FCODE: 2556 case ROM_CODE_TYPE_FCODE:
2529 /* Open Firmware standard for PCI (FCode). */ 2557 /* Open Firmware standard for PCI (FCode). */
2530 ha->fcode_revision[0] = bcode[0x12]; 2558 ha->fcode_revision[0] = bcode[0x12];
2531 ha->fcode_revision[1] = bcode[0x13]; 2559 ha->fcode_revision[1] = bcode[0x13];
2532 DEBUG3(printk("%s(): read FCODE %d.%d.\n", __func__, 2560 DEBUG3(qla_printk(KERN_DEBUG, ha, "read FCODE %d.%d.\n",
2533 ha->fcode_revision[1], ha->fcode_revision[0])); 2561 ha->fcode_revision[1], ha->fcode_revision[0]));
2534 break; 2562 break;
2535 case ROM_CODE_TYPE_EFI: 2563 case ROM_CODE_TYPE_EFI:
2536 /* Extensible Firmware Interface (EFI). */ 2564 /* Extensible Firmware Interface (EFI). */
2537 ha->efi_revision[0] = bcode[0x12]; 2565 ha->efi_revision[0] = bcode[0x12];
2538 ha->efi_revision[1] = bcode[0x13]; 2566 ha->efi_revision[1] = bcode[0x13];
2539 DEBUG3(printk("%s(): read EFI %d.%d.\n", __func__, 2567 DEBUG3(qla_printk(KERN_DEBUG, ha, "read EFI %d.%d.\n",
2540 ha->efi_revision[1], ha->efi_revision[0])); 2568 ha->efi_revision[1], ha->efi_revision[0]));
2541 break; 2569 break;
2542 default: 2570 default:
2543 DEBUG2(printk("%s(): Unrecognized code type %x at " 2571 DEBUG2(qla_printk(KERN_INFO, ha, "Unrecognized code "
2544 "pcids %x.\n", __func__, code_type, pcids)); 2572 "type %x at pcids %x.\n", code_type, pcids));
2545 break; 2573 break;
2546 } 2574 }
2547 2575
@@ -2555,7 +2583,7 @@ qla24xx_get_flash_version(scsi_qla_host_t *ha, void *mbuf)
2555 memset(ha->fw_revision, 0, sizeof(ha->fw_revision)); 2583 memset(ha->fw_revision, 0, sizeof(ha->fw_revision));
2556 dcode = mbuf; 2584 dcode = mbuf;
2557 2585
2558 qla24xx_read_flash_data(ha, dcode, ha->flt_region_fw + 4, 4); 2586 qla24xx_read_flash_data(vha, dcode, ha->flt_region_fw + 4, 4);
2559 for (i = 0; i < 4; i++) 2587 for (i = 0; i < 4; i++)
2560 dcode[i] = be32_to_cpu(dcode[i]); 2588 dcode[i] = be32_to_cpu(dcode[i]);
2561 2589
@@ -2563,8 +2591,8 @@ qla24xx_get_flash_version(scsi_qla_host_t *ha, void *mbuf)
2563 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 2591 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
2564 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 2592 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
2565 dcode[3] == 0)) { 2593 dcode[3] == 0)) {
2566 DEBUG2(printk("%s(): Unrecognized fw version at %x.\n", 2594 DEBUG2(qla_printk(KERN_INFO, ha, "Unrecognized fw "
2567 __func__, ha->flt_region_fw)); 2595 "revision at %x.\n", ha->flt_region_fw * 4));
2568 } else { 2596 } else {
2569 ha->fw_revision[0] = dcode[0]; 2597 ha->fw_revision[0] = dcode[0];
2570 ha->fw_revision[1] = dcode[1]; 2598 ha->fw_revision[1] = dcode[1];
@@ -2593,8 +2621,9 @@ qla2xxx_is_vpd_valid(uint8_t *pos, uint8_t *end)
2593} 2621}
2594 2622
2595int 2623int
2596qla2xxx_get_vpd_field(scsi_qla_host_t *ha, char *key, char *str, size_t size) 2624qla2xxx_get_vpd_field(scsi_qla_host_t *vha, char *key, char *str, size_t size)
2597{ 2625{
2626 struct qla_hw_data *ha = vha->hw;
2598 uint8_t *pos = ha->vpd; 2627 uint8_t *pos = ha->vpd;
2599 uint8_t *end = pos + ha->vpd_size; 2628 uint8_t *end = pos + ha->vpd_size;
2600 int len = 0; 2629 int len = 0;
@@ -2621,9 +2650,10 @@ qla2xxx_get_vpd_field(scsi_qla_host_t *ha, char *key, char *str, size_t size)
2621} 2650}
2622 2651
2623static int 2652static int
2624qla2xxx_hw_event_store(scsi_qla_host_t *ha, uint32_t *fdata) 2653qla2xxx_hw_event_store(scsi_qla_host_t *vha, uint32_t *fdata)
2625{ 2654{
2626 uint32_t d[2], faddr; 2655 uint32_t d[2], faddr;
2656 struct qla_hw_data *ha = vha->hw;
2627 2657
2628 /* Locate first empty entry. */ 2658 /* Locate first empty entry. */
2629 for (;;) { 2659 for (;;) {
@@ -2634,7 +2664,7 @@ qla2xxx_hw_event_store(scsi_qla_host_t *ha, uint32_t *fdata)
2634 return QLA_MEMORY_ALLOC_FAILED; 2664 return QLA_MEMORY_ALLOC_FAILED;
2635 } 2665 }
2636 2666
2637 qla24xx_read_flash_data(ha, d, ha->hw_event_ptr, 2); 2667 qla24xx_read_flash_data(vha, d, ha->hw_event_ptr, 2);
2638 faddr = flash_data_to_access_addr(ha->hw_event_ptr); 2668 faddr = flash_data_to_access_addr(ha->hw_event_ptr);
2639 ha->hw_event_ptr += FA_HW_EVENT_ENTRY_SIZE; 2669 ha->hw_event_ptr += FA_HW_EVENT_ENTRY_SIZE;
2640 if (d[0] == __constant_cpu_to_le32(0xffffffff) && 2670 if (d[0] == __constant_cpu_to_le32(0xffffffff) &&
@@ -2655,12 +2685,12 @@ qla2xxx_hw_event_store(scsi_qla_host_t *ha, uint32_t *fdata)
2655} 2685}
2656 2686
2657int 2687int
2658qla2xxx_hw_event_log(scsi_qla_host_t *ha, uint16_t code, uint16_t d1, 2688qla2xxx_hw_event_log(scsi_qla_host_t *vha, uint16_t code, uint16_t d1,
2659 uint16_t d2, uint16_t d3) 2689 uint16_t d2, uint16_t d3)
2660{ 2690{
2661#define QMARK(a, b, c, d) \ 2691#define QMARK(a, b, c, d) \
2662 cpu_to_le32(LSB(a) << 24 | LSB(b) << 16 | LSB(c) << 8 | LSB(d)) 2692 cpu_to_le32(LSB(a) << 24 | LSB(b) << 16 | LSB(c) << 8 | LSB(d))
2663 2693 struct qla_hw_data *ha = vha->hw;
2664 int rval; 2694 int rval;
2665 uint32_t marker[2], fdata[4]; 2695 uint32_t marker[2], fdata[4];
2666 2696
@@ -2681,7 +2711,7 @@ qla2xxx_hw_event_log(scsi_qla_host_t *ha, uint16_t code, uint16_t d1,
2681 /* Locate marker. */ 2711 /* Locate marker. */
2682 ha->hw_event_ptr = ha->flt_region_hw_event; 2712 ha->hw_event_ptr = ha->flt_region_hw_event;
2683 for (;;) { 2713 for (;;) {
2684 qla24xx_read_flash_data(ha, fdata, ha->hw_event_ptr, 2714 qla24xx_read_flash_data(vha, fdata, ha->hw_event_ptr,
2685 4); 2715 4);
2686 if (fdata[0] == __constant_cpu_to_le32(0xffffffff) && 2716 if (fdata[0] == __constant_cpu_to_le32(0xffffffff) &&
2687 fdata[1] == __constant_cpu_to_le32(0xffffffff)) 2717 fdata[1] == __constant_cpu_to_le32(0xffffffff))
@@ -2700,7 +2730,7 @@ qla2xxx_hw_event_log(scsi_qla_host_t *ha, uint16_t code, uint16_t d1,
2700 } 2730 }
2701 /* No marker, write it. */ 2731 /* No marker, write it. */
2702 if (!ha->flags.hw_event_marker_found) { 2732 if (!ha->flags.hw_event_marker_found) {
2703 rval = qla2xxx_hw_event_store(ha, marker); 2733 rval = qla2xxx_hw_event_store(vha, marker);
2704 if (rval != QLA_SUCCESS) { 2734 if (rval != QLA_SUCCESS) {
2705 DEBUG2(qla_printk(KERN_WARNING, ha, 2735 DEBUG2(qla_printk(KERN_WARNING, ha,
2706 "HW event -- Failed marker write=%x.!\n", 2736 "HW event -- Failed marker write=%x.!\n",
@@ -2714,7 +2744,7 @@ qla2xxx_hw_event_log(scsi_qla_host_t *ha, uint16_t code, uint16_t d1,
2714 /* Store error. */ 2744 /* Store error. */
2715 fdata[0] = cpu_to_le32(code << 16 | d1); 2745 fdata[0] = cpu_to_le32(code << 16 | d1);
2716 fdata[1] = cpu_to_le32(d2 << 16 | d3); 2746 fdata[1] = cpu_to_le32(d2 << 16 | d3);
2717 rval = qla2xxx_hw_event_store(ha, fdata); 2747 rval = qla2xxx_hw_event_store(vha, fdata);
2718 if (rval != QLA_SUCCESS) { 2748 if (rval != QLA_SUCCESS) {
2719 DEBUG2(qla_printk(KERN_WARNING, ha, 2749 DEBUG2(qla_printk(KERN_WARNING, ha,
2720 "HW event -- Failed error write=%x.!\n", 2750 "HW event -- Failed error write=%x.!\n",