diff options
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_mbx.c')
-rw-r--r-- | drivers/scsi/qla2xxx/qla_mbx.c | 266 |
1 files changed, 238 insertions, 28 deletions
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c index 42eb7ffd5942..f3650d0434ca 100644 --- a/drivers/scsi/qla2xxx/qla_mbx.c +++ b/drivers/scsi/qla2xxx/qla_mbx.c | |||
@@ -49,6 +49,14 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp) | |||
49 | if (ha->pdev->error_state > pci_channel_io_frozen) | 49 | if (ha->pdev->error_state > pci_channel_io_frozen) |
50 | return QLA_FUNCTION_TIMEOUT; | 50 | return QLA_FUNCTION_TIMEOUT; |
51 | 51 | ||
52 | if (vha->device_flags & DFLG_DEV_FAILED) { | ||
53 | DEBUG2_3_11(qla_printk(KERN_WARNING, ha, | ||
54 | "%s(%ld): Device in failed state, " | ||
55 | "timeout MBX Exiting.\n", | ||
56 | __func__, base_vha->host_no)); | ||
57 | return QLA_FUNCTION_TIMEOUT; | ||
58 | } | ||
59 | |||
52 | reg = ha->iobase; | 60 | reg = ha->iobase; |
53 | io_lock_on = base_vha->flags.init_done; | 61 | io_lock_on = base_vha->flags.init_done; |
54 | 62 | ||
@@ -85,7 +93,9 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp) | |||
85 | spin_lock_irqsave(&ha->hardware_lock, flags); | 93 | spin_lock_irqsave(&ha->hardware_lock, flags); |
86 | 94 | ||
87 | /* Load mailbox registers. */ | 95 | /* Load mailbox registers. */ |
88 | if (IS_FWI2_CAPABLE(ha)) | 96 | if (IS_QLA82XX(ha)) |
97 | optr = (uint16_t __iomem *)®->isp82.mailbox_in[0]; | ||
98 | else if (IS_FWI2_CAPABLE(ha) && !IS_QLA82XX(ha)) | ||
89 | optr = (uint16_t __iomem *)®->isp24.mailbox0; | 99 | optr = (uint16_t __iomem *)®->isp24.mailbox0; |
90 | else | 100 | else |
91 | optr = (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 0); | 101 | optr = (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 0); |
@@ -133,7 +143,18 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp) | |||
133 | if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) { | 143 | if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) { |
134 | set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); | 144 | set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); |
135 | 145 | ||
136 | if (IS_FWI2_CAPABLE(ha)) | 146 | if (IS_QLA82XX(ha)) { |
147 | if (RD_REG_DWORD(®->isp82.hint) & | ||
148 | HINT_MBX_INT_PENDING) { | ||
149 | spin_unlock_irqrestore(&ha->hardware_lock, | ||
150 | flags); | ||
151 | DEBUG2_3_11(printk(KERN_INFO | ||
152 | "%s(%ld): Pending Mailbox timeout. " | ||
153 | "Exiting.\n", __func__, base_vha->host_no)); | ||
154 | return QLA_FUNCTION_TIMEOUT; | ||
155 | } | ||
156 | WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING); | ||
157 | } else if (IS_FWI2_CAPABLE(ha)) | ||
137 | WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT); | 158 | WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT); |
138 | else | 159 | else |
139 | WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT); | 160 | WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT); |
@@ -147,7 +168,18 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp) | |||
147 | DEBUG3_11(printk("%s(%ld): cmd=%x POLLING MODE.\n", __func__, | 168 | DEBUG3_11(printk("%s(%ld): cmd=%x POLLING MODE.\n", __func__, |
148 | base_vha->host_no, command)); | 169 | base_vha->host_no, command)); |
149 | 170 | ||
150 | if (IS_FWI2_CAPABLE(ha)) | 171 | if (IS_QLA82XX(ha)) { |
172 | if (RD_REG_DWORD(®->isp82.hint) & | ||
173 | HINT_MBX_INT_PENDING) { | ||
174 | spin_unlock_irqrestore(&ha->hardware_lock, | ||
175 | flags); | ||
176 | DEBUG2_3_11(printk(KERN_INFO | ||
177 | "%s(%ld): Pending Mailbox timeout. " | ||
178 | "Exiting.\n", __func__, base_vha->host_no)); | ||
179 | return QLA_FUNCTION_TIMEOUT; | ||
180 | } | ||
181 | WRT_REG_DWORD(®->isp82.hint, HINT_MBX_INT_PENDING); | ||
182 | } else if (IS_FWI2_CAPABLE(ha)) | ||
151 | WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT); | 183 | WRT_REG_DWORD(®->isp24.hccr, HCCRX_SET_HOST_INT); |
152 | else | 184 | else |
153 | WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT); | 185 | WRT_REG_WORD(®->isp.hccr, HCCR_SET_HOST_INT); |
@@ -264,7 +296,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp) | |||
264 | 296 | ||
265 | set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); | 297 | set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); |
266 | clear_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags); | 298 | clear_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags); |
267 | if (qla2x00_abort_isp(base_vha)) { | 299 | if (ha->isp_ops->abort_isp(base_vha)) { |
268 | /* Failed. retry later. */ | 300 | /* Failed. retry later. */ |
269 | set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags); | 301 | set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags); |
270 | } | 302 | } |
@@ -711,7 +743,7 @@ qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr) | |||
711 | * Context: | 743 | * Context: |
712 | * Kernel context. | 744 | * Kernel context. |
713 | */ | 745 | */ |
714 | static int | 746 | int |
715 | qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer, | 747 | qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer, |
716 | dma_addr_t phys_addr, size_t size, uint32_t tov) | 748 | dma_addr_t phys_addr, size_t size, uint32_t tov) |
717 | { | 749 | { |
@@ -952,7 +984,7 @@ qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa, | |||
952 | mcp->mb[9] = vha->vp_idx; | 984 | mcp->mb[9] = vha->vp_idx; |
953 | mcp->out_mb = MBX_9|MBX_0; | 985 | mcp->out_mb = MBX_9|MBX_0; |
954 | mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; | 986 | mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0; |
955 | if (IS_QLA81XX(vha->hw)) | 987 | if (IS_QLA8XXX_TYPE(vha->hw)) |
956 | mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10; | 988 | mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10; |
957 | mcp->tov = MBX_TOV_SECONDS; | 989 | mcp->tov = MBX_TOV_SECONDS; |
958 | mcp->flags = 0; | 990 | mcp->flags = 0; |
@@ -978,7 +1010,7 @@ qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa, | |||
978 | DEBUG11(printk("qla2x00_get_adapter_id(%ld): done.\n", | 1010 | DEBUG11(printk("qla2x00_get_adapter_id(%ld): done.\n", |
979 | vha->host_no)); | 1011 | vha->host_no)); |
980 | 1012 | ||
981 | if (IS_QLA81XX(vha->hw)) { | 1013 | if (IS_QLA8XXX_TYPE(vha->hw)) { |
982 | vha->fcoe_vlan_id = mcp->mb[9] & 0xfff; | 1014 | vha->fcoe_vlan_id = mcp->mb[9] & 0xfff; |
983 | vha->fcoe_fcf_idx = mcp->mb[10]; | 1015 | vha->fcoe_fcf_idx = mcp->mb[10]; |
984 | vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8; | 1016 | vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8; |
@@ -1076,6 +1108,10 @@ qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size) | |||
1076 | DEBUG11(printk("qla2x00_init_firmware(%ld): entered.\n", | 1108 | DEBUG11(printk("qla2x00_init_firmware(%ld): entered.\n", |
1077 | vha->host_no)); | 1109 | vha->host_no)); |
1078 | 1110 | ||
1111 | if (IS_QLA82XX(ha) && ql2xdbwr) | ||
1112 | qla82xx_wr_32(ha, ha->nxdb_wr_ptr, | ||
1113 | (0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16))); | ||
1114 | |||
1079 | if (ha->flags.npiv_supported) | 1115 | if (ha->flags.npiv_supported) |
1080 | mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE; | 1116 | mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE; |
1081 | else | 1117 | else |
@@ -1408,7 +1444,7 @@ qla2x00_lip_reset(scsi_qla_host_t *vha) | |||
1408 | 1444 | ||
1409 | DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no)); | 1445 | DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no)); |
1410 | 1446 | ||
1411 | if (IS_QLA81XX(vha->hw)) { | 1447 | if (IS_QLA8XXX_TYPE(vha->hw)) { |
1412 | /* Logout across all FCFs. */ | 1448 | /* Logout across all FCFs. */ |
1413 | mcp->mb[0] = MBC_LIP_FULL_LOGIN; | 1449 | mcp->mb[0] = MBC_LIP_FULL_LOGIN; |
1414 | mcp->mb[1] = BIT_1; | 1450 | mcp->mb[1] = BIT_1; |
@@ -2428,12 +2464,22 @@ __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport, | |||
2428 | int | 2464 | int |
2429 | qla24xx_abort_target(struct fc_port *fcport, unsigned int l, int tag) | 2465 | qla24xx_abort_target(struct fc_port *fcport, unsigned int l, int tag) |
2430 | { | 2466 | { |
2467 | struct qla_hw_data *ha = fcport->vha->hw; | ||
2468 | |||
2469 | if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha)) | ||
2470 | return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag); | ||
2471 | |||
2431 | return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag); | 2472 | return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag); |
2432 | } | 2473 | } |
2433 | 2474 | ||
2434 | int | 2475 | int |
2435 | qla24xx_lun_reset(struct fc_port *fcport, unsigned int l, int tag) | 2476 | qla24xx_lun_reset(struct fc_port *fcport, unsigned int l, int tag) |
2436 | { | 2477 | { |
2478 | struct qla_hw_data *ha = fcport->vha->hw; | ||
2479 | |||
2480 | if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha)) | ||
2481 | return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag); | ||
2482 | |||
2437 | return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag); | 2483 | return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag); |
2438 | } | 2484 | } |
2439 | 2485 | ||
@@ -2740,6 +2786,48 @@ qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint16_t addr, | |||
2740 | } | 2786 | } |
2741 | 2787 | ||
2742 | int | 2788 | int |
2789 | qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id, | ||
2790 | uint16_t *port_speed, uint16_t *mb) | ||
2791 | { | ||
2792 | int rval; | ||
2793 | mbx_cmd_t mc; | ||
2794 | mbx_cmd_t *mcp = &mc; | ||
2795 | |||
2796 | if (!IS_IIDMA_CAPABLE(vha->hw)) | ||
2797 | return QLA_FUNCTION_FAILED; | ||
2798 | |||
2799 | DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no)); | ||
2800 | |||
2801 | mcp->mb[0] = MBC_PORT_PARAMS; | ||
2802 | mcp->mb[1] = loop_id; | ||
2803 | mcp->mb[2] = mcp->mb[3] = 0; | ||
2804 | mcp->mb[9] = vha->vp_idx; | ||
2805 | mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0; | ||
2806 | mcp->in_mb = MBX_3|MBX_1|MBX_0; | ||
2807 | mcp->tov = MBX_TOV_SECONDS; | ||
2808 | mcp->flags = 0; | ||
2809 | rval = qla2x00_mailbox_command(vha, mcp); | ||
2810 | |||
2811 | /* Return mailbox statuses. */ | ||
2812 | if (mb != NULL) { | ||
2813 | mb[0] = mcp->mb[0]; | ||
2814 | mb[1] = mcp->mb[1]; | ||
2815 | mb[3] = mcp->mb[3]; | ||
2816 | } | ||
2817 | |||
2818 | if (rval != QLA_SUCCESS) { | ||
2819 | DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__, | ||
2820 | vha->host_no, rval)); | ||
2821 | } else { | ||
2822 | DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no)); | ||
2823 | if (port_speed) | ||
2824 | *port_speed = mcp->mb[3]; | ||
2825 | } | ||
2826 | |||
2827 | return rval; | ||
2828 | } | ||
2829 | |||
2830 | int | ||
2743 | qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id, | 2831 | qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id, |
2744 | uint16_t port_speed, uint16_t *mb) | 2832 | uint16_t port_speed, uint16_t *mb) |
2745 | { | 2833 | { |
@@ -2755,7 +2843,7 @@ qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id, | |||
2755 | mcp->mb[0] = MBC_PORT_PARAMS; | 2843 | mcp->mb[0] = MBC_PORT_PARAMS; |
2756 | mcp->mb[1] = loop_id; | 2844 | mcp->mb[1] = loop_id; |
2757 | mcp->mb[2] = BIT_0; | 2845 | mcp->mb[2] = BIT_0; |
2758 | if (IS_QLA81XX(vha->hw)) | 2846 | if (IS_QLA8XXX_TYPE(vha->hw)) |
2759 | mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0); | 2847 | mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0); |
2760 | else | 2848 | else |
2761 | mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0); | 2849 | mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0); |
@@ -3544,7 +3632,7 @@ qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma, | |||
3544 | mbx_cmd_t mc; | 3632 | mbx_cmd_t mc; |
3545 | mbx_cmd_t *mcp = &mc; | 3633 | mbx_cmd_t *mcp = &mc; |
3546 | 3634 | ||
3547 | if (!IS_QLA81XX(vha->hw)) | 3635 | if (!IS_QLA8XXX_TYPE(vha->hw)) |
3548 | return QLA_FUNCTION_FAILED; | 3636 | return QLA_FUNCTION_FAILED; |
3549 | 3637 | ||
3550 | DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no)); | 3638 | DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no)); |
@@ -3582,7 +3670,7 @@ qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma, | |||
3582 | mbx_cmd_t mc; | 3670 | mbx_cmd_t mc; |
3583 | mbx_cmd_t *mcp = &mc; | 3671 | mbx_cmd_t *mcp = &mc; |
3584 | 3672 | ||
3585 | if (!IS_QLA81XX(vha->hw)) | 3673 | if (!IS_QLA8XXX_TYPE(vha->hw)) |
3586 | return QLA_FUNCTION_FAILED; | 3674 | return QLA_FUNCTION_FAILED; |
3587 | 3675 | ||
3588 | DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no)); | 3676 | DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no)); |
@@ -3643,7 +3731,8 @@ qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data) | |||
3643 | } | 3731 | } |
3644 | 3732 | ||
3645 | int | 3733 | int |
3646 | qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, uint16_t *mresp) | 3734 | qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, |
3735 | uint16_t *mresp) | ||
3647 | { | 3736 | { |
3648 | int rval; | 3737 | int rval; |
3649 | mbx_cmd_t mc; | 3738 | mbx_cmd_t mc; |
@@ -3678,7 +3767,7 @@ qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, uint16_t * | |||
3678 | 3767 | ||
3679 | mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15| | 3768 | mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15| |
3680 | MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0; | 3769 | MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0; |
3681 | if (IS_QLA81XX(vha->hw)) | 3770 | if (IS_QLA8XXX_TYPE(vha->hw)) |
3682 | mcp->out_mb |= MBX_2; | 3771 | mcp->out_mb |= MBX_2; |
3683 | mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0; | 3772 | mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0; |
3684 | 3773 | ||
@@ -3690,9 +3779,11 @@ qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, uint16_t * | |||
3690 | 3779 | ||
3691 | if (rval != QLA_SUCCESS) { | 3780 | if (rval != QLA_SUCCESS) { |
3692 | DEBUG2(printk(KERN_WARNING | 3781 | DEBUG2(printk(KERN_WARNING |
3693 | "(%ld): failed=%x mb[0]=0x%x " | 3782 | "(%ld): failed=%x mb[0]=0x%x " |
3694 | "mb[1]=0x%x mb[2]=0x%x mb[3]=0x%x mb[18]=0x%x mb[19]=0x%x. \n", vha->host_no, rval, | 3783 | "mb[1]=0x%x mb[2]=0x%x mb[3]=0x%x mb[18]=0x%x " |
3695 | mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], mcp->mb[18], mcp->mb[19])); | 3784 | "mb[19]=0x%x.\n", |
3785 | vha->host_no, rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], | ||
3786 | mcp->mb[3], mcp->mb[18], mcp->mb[19])); | ||
3696 | } else { | 3787 | } else { |
3697 | DEBUG2(printk(KERN_WARNING | 3788 | DEBUG2(printk(KERN_WARNING |
3698 | "scsi(%ld): done.\n", vha->host_no)); | 3789 | "scsi(%ld): done.\n", vha->host_no)); |
@@ -3706,7 +3797,8 @@ qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, uint16_t * | |||
3706 | } | 3797 | } |
3707 | 3798 | ||
3708 | int | 3799 | int |
3709 | qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, uint16_t *mresp) | 3800 | qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, |
3801 | uint16_t *mresp) | ||
3710 | { | 3802 | { |
3711 | int rval; | 3803 | int rval; |
3712 | mbx_cmd_t mc; | 3804 | mbx_cmd_t mc; |
@@ -3718,9 +3810,10 @@ qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, uint16_t *mres | |||
3718 | memset(mcp->mb, 0 , sizeof(mcp->mb)); | 3810 | memset(mcp->mb, 0 , sizeof(mcp->mb)); |
3719 | mcp->mb[0] = MBC_DIAGNOSTIC_ECHO; | 3811 | mcp->mb[0] = MBC_DIAGNOSTIC_ECHO; |
3720 | mcp->mb[1] = mreq->options | BIT_6; /* BIT_6 specifies 64bit address */ | 3812 | mcp->mb[1] = mreq->options | BIT_6; /* BIT_6 specifies 64bit address */ |
3721 | if (IS_QLA81XX(ha)) | 3813 | if (IS_QLA8XXX_TYPE(ha)) { |
3722 | mcp->mb[1] |= BIT_15; | 3814 | mcp->mb[1] |= BIT_15; |
3723 | mcp->mb[2] = IS_QLA81XX(ha) ? vha->fcoe_fcf_idx : 0; | 3815 | mcp->mb[2] = vha->fcoe_fcf_idx; |
3816 | } | ||
3724 | mcp->mb[16] = LSW(mreq->rcv_dma); | 3817 | mcp->mb[16] = LSW(mreq->rcv_dma); |
3725 | mcp->mb[17] = MSW(mreq->rcv_dma); | 3818 | mcp->mb[17] = MSW(mreq->rcv_dma); |
3726 | mcp->mb[6] = LSW(MSD(mreq->rcv_dma)); | 3819 | mcp->mb[6] = LSW(MSD(mreq->rcv_dma)); |
@@ -3735,13 +3828,13 @@ qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, uint16_t *mres | |||
3735 | 3828 | ||
3736 | mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15| | 3829 | mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15| |
3737 | MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0; | 3830 | MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0; |
3738 | if (IS_QLA81XX(ha)) | 3831 | if (IS_QLA8XXX_TYPE(ha)) |
3739 | mcp->out_mb |= MBX_2; | 3832 | mcp->out_mb |= MBX_2; |
3740 | 3833 | ||
3741 | mcp->in_mb = MBX_0; | 3834 | mcp->in_mb = MBX_0; |
3742 | if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) | 3835 | if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) || IS_QLA8XXX_TYPE(ha)) |
3743 | mcp->in_mb |= MBX_1; | 3836 | mcp->in_mb |= MBX_1; |
3744 | if (IS_QLA81XX(ha)) | 3837 | if (IS_QLA8XXX_TYPE(ha)) |
3745 | mcp->in_mb |= MBX_3; | 3838 | mcp->in_mb |= MBX_3; |
3746 | 3839 | ||
3747 | mcp->tov = MBX_TOV_SECONDS; | 3840 | mcp->tov = MBX_TOV_SECONDS; |
@@ -3764,8 +3857,7 @@ qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq, uint16_t *mres | |||
3764 | return rval; | 3857 | return rval; |
3765 | } | 3858 | } |
3766 | int | 3859 | int |
3767 | qla84xx_reset_chip(scsi_qla_host_t *ha, uint16_t enable_diagnostic, | 3860 | qla84xx_reset_chip(scsi_qla_host_t *ha, uint16_t enable_diagnostic) |
3768 | uint16_t *cmd_status) | ||
3769 | { | 3861 | { |
3770 | int rval; | 3862 | int rval; |
3771 | mbx_cmd_t mc; | 3863 | mbx_cmd_t mc; |
@@ -3782,8 +3874,6 @@ qla84xx_reset_chip(scsi_qla_host_t *ha, uint16_t enable_diagnostic, | |||
3782 | mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD; | 3874 | mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD; |
3783 | rval = qla2x00_mailbox_command(ha, mcp); | 3875 | rval = qla2x00_mailbox_command(ha, mcp); |
3784 | 3876 | ||
3785 | /* Return mailbox statuses. */ | ||
3786 | *cmd_status = mcp->mb[0]; | ||
3787 | if (rval != QLA_SUCCESS) | 3877 | if (rval != QLA_SUCCESS) |
3788 | DEBUG16(printk("%s(%ld): failed=%x.\n", __func__, ha->host_no, | 3878 | DEBUG16(printk("%s(%ld): failed=%x.\n", __func__, ha->host_no, |
3789 | rval)); | 3879 | rval)); |
@@ -3801,7 +3891,7 @@ qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data) | |||
3801 | mbx_cmd_t *mcp = &mc; | 3891 | mbx_cmd_t *mcp = &mc; |
3802 | 3892 | ||
3803 | if (!IS_FWI2_CAPABLE(vha->hw)) | 3893 | if (!IS_FWI2_CAPABLE(vha->hw)) |
3804 | return QLA_FUNCTION_FAILED; | 3894 | return QLA_FUNCTION_FAILED; |
3805 | 3895 | ||
3806 | DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no)); | 3896 | DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no)); |
3807 | 3897 | ||
@@ -3836,7 +3926,8 @@ qla2x00_get_data_rate(scsi_qla_host_t *vha) | |||
3836 | if (!IS_FWI2_CAPABLE(ha)) | 3926 | if (!IS_FWI2_CAPABLE(ha)) |
3837 | return QLA_FUNCTION_FAILED; | 3927 | return QLA_FUNCTION_FAILED; |
3838 | 3928 | ||
3839 | DEBUG11(printk(KERN_INFO "%s(%ld): entered.\n", __func__, vha->host_no)); | 3929 | DEBUG11(qla_printk(KERN_INFO, ha, |
3930 | "%s(%ld): entered.\n", __func__, vha->host_no)); | ||
3840 | 3931 | ||
3841 | mcp->mb[0] = MBC_DATA_RATE; | 3932 | mcp->mb[0] = MBC_DATA_RATE; |
3842 | mcp->mb[1] = 0; | 3933 | mcp->mb[1] = 0; |
@@ -3857,3 +3948,122 @@ qla2x00_get_data_rate(scsi_qla_host_t *vha) | |||
3857 | 3948 | ||
3858 | return rval; | 3949 | return rval; |
3859 | } | 3950 | } |
3951 | |||
3952 | int | ||
3953 | qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority, | ||
3954 | uint16_t *mb) | ||
3955 | { | ||
3956 | int rval; | ||
3957 | mbx_cmd_t mc; | ||
3958 | mbx_cmd_t *mcp = &mc; | ||
3959 | struct qla_hw_data *ha = vha->hw; | ||
3960 | |||
3961 | if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha)) | ||
3962 | return QLA_FUNCTION_FAILED; | ||
3963 | |||
3964 | DEBUG11(printk(KERN_INFO | ||
3965 | "%s(%ld): entered.\n", __func__, ha->host_no)); | ||
3966 | |||
3967 | mcp->mb[0] = MBC_PORT_PARAMS; | ||
3968 | mcp->mb[1] = loop_id; | ||
3969 | if (ha->flags.fcp_prio_enabled) | ||
3970 | mcp->mb[2] = BIT_1; | ||
3971 | else | ||
3972 | mcp->mb[2] = BIT_2; | ||
3973 | mcp->mb[4] = priority & 0xf; | ||
3974 | mcp->mb[9] = vha->vp_idx; | ||
3975 | mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; | ||
3976 | mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0; | ||
3977 | mcp->tov = 30; | ||
3978 | mcp->flags = 0; | ||
3979 | rval = qla2x00_mailbox_command(vha, mcp); | ||
3980 | if (mb != NULL) { | ||
3981 | mb[0] = mcp->mb[0]; | ||
3982 | mb[1] = mcp->mb[1]; | ||
3983 | mb[3] = mcp->mb[3]; | ||
3984 | mb[4] = mcp->mb[4]; | ||
3985 | } | ||
3986 | |||
3987 | if (rval != QLA_SUCCESS) { | ||
3988 | DEBUG2_3_11(printk(KERN_WARNING | ||
3989 | "%s(%ld): failed=%x.\n", __func__, | ||
3990 | vha->host_no, rval)); | ||
3991 | } else { | ||
3992 | DEBUG11(printk(KERN_INFO | ||
3993 | "%s(%ld): done.\n", __func__, vha->host_no)); | ||
3994 | } | ||
3995 | |||
3996 | return rval; | ||
3997 | } | ||
3998 | |||
3999 | int | ||
4000 | qla82xx_mbx_intr_enable(scsi_qla_host_t *vha) | ||
4001 | { | ||
4002 | int rval; | ||
4003 | struct qla_hw_data *ha = vha->hw; | ||
4004 | mbx_cmd_t mc; | ||
4005 | mbx_cmd_t *mcp = &mc; | ||
4006 | |||
4007 | if (!IS_FWI2_CAPABLE(ha)) | ||
4008 | return QLA_FUNCTION_FAILED; | ||
4009 | |||
4010 | DEBUG11(qla_printk(KERN_INFO, ha, | ||
4011 | "%s(%ld): entered.\n", __func__, vha->host_no)); | ||
4012 | |||
4013 | memset(mcp, 0, sizeof(mbx_cmd_t)); | ||
4014 | mcp->mb[0] = MBC_TOGGLE_INTR; | ||
4015 | mcp->mb[1] = 1; | ||
4016 | |||
4017 | mcp->out_mb = MBX_1|MBX_0; | ||
4018 | mcp->in_mb = MBX_0; | ||
4019 | mcp->tov = 30; | ||
4020 | mcp->flags = 0; | ||
4021 | |||
4022 | rval = qla2x00_mailbox_command(vha, mcp); | ||
4023 | if (rval != QLA_SUCCESS) { | ||
4024 | DEBUG2_3_11(qla_printk(KERN_WARNING, ha, | ||
4025 | "%s(%ld): failed=%x mb[0]=%x.\n", __func__, | ||
4026 | vha->host_no, rval, mcp->mb[0])); | ||
4027 | } else { | ||
4028 | DEBUG11(qla_printk(KERN_INFO, ha, | ||
4029 | "%s(%ld): done.\n", __func__, vha->host_no)); | ||
4030 | } | ||
4031 | |||
4032 | return rval; | ||
4033 | } | ||
4034 | |||
4035 | int | ||
4036 | qla82xx_mbx_intr_disable(scsi_qla_host_t *vha) | ||
4037 | { | ||
4038 | int rval; | ||
4039 | struct qla_hw_data *ha = vha->hw; | ||
4040 | mbx_cmd_t mc; | ||
4041 | mbx_cmd_t *mcp = &mc; | ||
4042 | |||
4043 | if (!IS_QLA82XX(ha)) | ||
4044 | return QLA_FUNCTION_FAILED; | ||
4045 | |||
4046 | DEBUG11(qla_printk(KERN_INFO, ha, | ||
4047 | "%s(%ld): entered.\n", __func__, vha->host_no)); | ||
4048 | |||
4049 | memset(mcp, 0, sizeof(mbx_cmd_t)); | ||
4050 | mcp->mb[0] = MBC_TOGGLE_INTR; | ||
4051 | mcp->mb[1] = 0; | ||
4052 | |||
4053 | mcp->out_mb = MBX_1|MBX_0; | ||
4054 | mcp->in_mb = MBX_0; | ||
4055 | mcp->tov = 30; | ||
4056 | mcp->flags = 0; | ||
4057 | |||
4058 | rval = qla2x00_mailbox_command(vha, mcp); | ||
4059 | if (rval != QLA_SUCCESS) { | ||
4060 | DEBUG2_3_11(qla_printk(KERN_WARNING, ha, | ||
4061 | "%s(%ld): failed=%x mb[0]=%x.\n", __func__, | ||
4062 | vha->host_no, rval, mcp->mb[0])); | ||
4063 | } else { | ||
4064 | DEBUG11(qla_printk(KERN_INFO, ha, | ||
4065 | "%s(%ld): done.\n", __func__, vha->host_no)); | ||
4066 | } | ||
4067 | |||
4068 | return rval; | ||
4069 | } | ||