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diff --git a/drivers/scsi/psi_dale.h b/drivers/scsi/psi_dale.h
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1/****************************************************************************
2 * Perceptive Solutions, Inc. PCI-2220I device driver for Linux.
3 *
4 * psi_dalei.h - Linux Host Driver for PCI-2220i EIDE Adapters
5 *
6 * Copyright (c) 1997-1999 Perceptive Solutions, Inc.
7 * All Rights Reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that redistributions of source
11 * code retain the above copyright notice and this comment without
12 * modification.
13 *
14 * Technical updates and product information at:
15 * http://www.psidisk.com
16 *
17 * Please send questions, comments, bug reports to:
18 * tech@psidisk.com Technical Support
19 *
20 ****************************************************************************/
21
22/************************************************/
23/* Some defines that we like */
24/************************************************/
25#define CHAR char
26#define UCHAR unsigned char
27#define SHORT short
28#define USHORT unsigned short
29#define BOOL unsigned short
30#define LONG long
31#define ULONG unsigned long
32#define VOID void
33
34/************************************************/
35/* Dale PCI setup */
36/************************************************/
37#define VENDOR_PSI 0x1256
38#define DEVICE_DALE_1 0x4401 /* 'D1' */
39#define DEVICE_BIGD_1 0x4201 /* 'B1' */
40#define DEVICE_BIGD_2 0x4202 /* 'B2' */
41
42/************************************************/
43/* Misc konstants */
44/************************************************/
45#define DALE_MAXDRIVES 4
46#define BIGD_MAXDRIVES 8
47#define SECTORSXFER 8
48#define ATAPI_TRANSFER 8192
49#define BYTES_PER_SECTOR 512
50#define DEFAULT_TIMING_MODE 5
51
52/************************************************/
53/* EEPROM locations */
54/************************************************/
55#define DALE_FLASH_PAGE_SIZE 128 // number of bytes per page
56#define DALE_FLASH_SIZE 65536L
57
58#define DALE_FLASH_BIOS 0x00080000L // BIOS base address
59#define DALE_FLASH_SETUP 0x00088000L // SETUP PROGRAM base address offset from BIOS
60#define DALE_FLASH_RAID 0x00088400L // RAID signature storage
61#define DALE_FLASH_FACTORY 0x00089000L // FACTORY data base address offset from BIOS
62
63#define DALE_FLASH_BIOS_SIZE 32768U // size of FLASH BIOS REGION
64
65/************************************************/
66/* DALE Register address offsets */
67/************************************************/
68#define REG_DATA 0x80
69#define REG_ERROR 0x84
70#define REG_SECTOR_COUNT 0x88
71#define REG_LBA_0 0x8C
72#define REG_LBA_8 0x90
73#define REG_LBA_16 0x94
74#define REG_LBA_24 0x98
75#define REG_STAT_CMD 0x9C
76#define REG_STAT_SEL 0xA0
77#define REG_FAIL 0xB0
78#define REG_ALT_STAT 0xB8
79#define REG_DRIVE_ADRS 0xBC
80
81#define DALE_DATA_SLOW 0x00040000L
82#define DALE_DATA_MODE2 0x00040000L
83#define DALE_DATA_MODE3 0x00050000L
84#define DALE_DATA_MODE4 0x00060000L
85#define DALE_DATA_MODE5 0x00070000L
86
87#define BIGD_DATA_SLOW 0x00000000L
88#define BIGD_DATA_MODE0 0x00000000L
89#define BIGD_DATA_MODE2 0x00000000L
90#define BIGD_DATA_MODE3 0x00000008L
91#define BIGD_DATA_MODE4 0x00000010L
92#define BIGD_DATA_MODE5 0x00000020L
93
94#define RTR_LOCAL_RANGE 0x000
95#define RTR_LOCAL_REMAP 0x004
96#define RTR_EXP_RANGE 0x010
97#define RTR_EXP_REMAP 0x014
98#define RTR_REGIONS 0x018
99#define RTR_DM_MASK 0x01C
100#define RTR_DM_LOCAL_BASE 0x020
101#define RTR_DM_IO_BASE 0x024
102#define RTR_DM_PCI_REMAP 0x028
103#define RTR_DM_IO_CONFIG 0x02C
104#define RTR_MAILBOX 0x040
105#define RTR_LOCAL_DOORBELL 0x060
106#define RTR_PCI_DOORBELL 0x064
107#define RTR_INT_CONTROL_STATUS 0x068
108#define RTR_EEPROM_CONTROL_STATUS 0x06C
109
110#define RTR_DMA0_MODE 0x0080
111#define RTR_DMA0_PCI_ADDR 0x0084
112#define RTR_DMA0_LOCAL_ADDR 0x0088
113#define RTR_DMA0_COUNT 0x008C
114#define RTR_DMA0_DESC_PTR 0x0090
115#define RTR_DMA1_MODE 0x0094
116#define RTR_DMA1_PCI_ADDR 0x0098
117#define RTR_DMA1_LOCAL_ADDR 0x009C
118#define RTR_DMA1_COUNT 0x00A0
119#define RTR_DMA1_DESC_PTR 0x00A4
120#define RTR_DMA_COMMAND_STATUS 0x00A8
121#define RTR_DMA_ARB0 0x00AC
122#define RTR_DMA_ARB1 0x00B0
123
124#define RTL_DMA0_MODE 0x00
125#define RTL_DMA0_PCI_ADDR 0x04
126#define RTL_DMA0_LOCAL_ADDR 0x08
127#define RTL_DMA0_COUNT 0x0C
128#define RTL_DMA0_DESC_PTR 0x10
129#define RTL_DMA1_MODE 0x14
130#define RTL_DMA1_PCI_ADDR 0x18
131#define RTL_DMA1_LOCAL_ADDR 0x1C
132#define RTL_DMA1_COUNT 0x20
133#define RTL_DMA1_DESC_PTR 0x24
134#define RTL_DMA_COMMAND_STATUS 0x28
135#define RTL_DMA_ARB0 0x2C
136#define RTL_DMA_ARB1 0x30
137
138/************************************************/
139/* Dale Scratchpad locations */
140/************************************************/
141#define DALE_CHANNEL_DEVICE_0 0 // device channel locations
142#define DALE_CHANNEL_DEVICE_1 1
143#define DALE_CHANNEL_DEVICE_2 2
144#define DALE_CHANNEL_DEVICE_3 3
145
146#define DALE_SCRATCH_DEVICE_0 4 // device type codes
147#define DALE_SCRATCH_DEVICE_1 5
148#define DALE_SCRATCH_DEVICE_2 6
149#define DALE_SCRATCH_DEVICE_3 7
150
151#define DALE_RAID_0_STATUS 8
152#define DALE_RAID_1_STATUS 9
153
154#define DALE_TIMING_MODE 12 // bus master timing mode (2, 3, 4, 5)
155#define DALE_NUM_DRIVES 13 // number of addressable drives on this board
156#define DALE_RAID_ON 14 // RAID status On
157#define DALE_LAST_ERROR 15 // Last error code from BIOS
158
159/************************************************/
160/* BigD Scratchpad locations */
161/************************************************/
162#define BIGD_DEVICE_0 0 // device channel locations
163#define BIGD_DEVICE_1 1
164#define BIGD_DEVICE_2 2
165#define BIGD_DEVICE_3 3
166
167#define BIGD_DEVICE_4 4 // device type codes
168#define BIGD_DEVICE_5 5
169#define BIGD_DEVICE_6 6
170#define BIGD_DEVICE_7 7
171
172#define BIGD_ALARM_IMAGE 11 // ~image of alarm fail register
173#define BIGD_TIMING_MODE 12 // bus master timing mode (2, 3, 4, 5)
174#define BIGD_NUM_DRIVES 13 // number of addressable drives on this board
175#define BIGD_RAID_ON 14 // RAID status is on for the whole board
176#define BIGD_LAST_ERROR 15 // Last error code from BIOS
177
178#define BIGD_RAID_0_STATUS 16
179#define BIGD_RAID_1_STATUS 17
180#define BIGD_RAID_2_STATUS 18
181#define BIGD_RAID_3_STATUS 19
182#define BIGD_RAID_4_STATUS 20
183#define BIGD_RAID_5_STATUS 21
184#define BIGD_RAID_6_STATUS 22
185#define BIGD_RAID_7_STATUS 23
186
187/************************************************/
188/* Dale cable select bits */
189/************************************************/
190#define SEL_NONE 0x00
191#define SEL_1 0x01
192#define SEL_2 0x02
193#define SEL_3 0x04
194#define SEL_4 0x08
195#define SEL_NEW_SPEED_1 0x20
196#define SEL_COPY 0x40
197#define SEL_IRQ_OFF 0x80
198
199/************************************************/
200/* Device/Geometry controls */
201/************************************************/
202#define GEOMETRY_NONE 0x0 // No device
203#define GEOMETRY_SET 0x1 // Geometry set
204#define GEOMETRY_LBA 0x2 // Geometry set in default LBA mode
205#define GEOMETRY_PHOENIX 0x3 // Geometry set in Pheonix BIOS compatibility mode
206
207#define DEVICE_NONE 0x0 // No device present
208#define DEVICE_INACTIVE 0x1 // device present but not registered active
209#define DEVICE_ATAPI 0x2 // ATAPI device (CD_ROM, Tape, Etc...)
210#define DEVICE_DASD_NONLBA 0x3 // Non LBA incompatible device
211#define DEVICE_DASD_LBA 0x4 // LBA compatible device
212
213/************************************************/
214/* BigD fail register bits */
215/************************************************/
216#define FAIL_NONE 0x00
217#define FAIL_0 0x01
218#define FAIL_1 0x02
219#define FAIL_2 0x04
220#define FAIL_MULTIPLE 0x08
221#define FAIL_GOOD 0x20
222#define FAIL_AUDIBLE 0x40
223#define FAIL_ANY 0x80
224
225/************************************************/
226/* Setup Structure Definitions */
227/************************************************/
228typedef struct // device setup parameters
229 {
230 UCHAR geometryControl; // geometry control flags
231 UCHAR device; // device code
232 USHORT sectors; // number of sectors per track
233 USHORT heads; // number of heads
234 USHORT cylinders; // number of cylinders for this device
235 ULONG blocks; // number of blocks on device
236 ULONG realCapacity; // number of real blocks on this device for drive changed testing
237 } SETUP_DEVICE, *PSETUP_DEVICE;
238
239typedef struct // master setup structure
240 {
241 USHORT startupDelay;
242 BOOL promptBIOS;
243 BOOL fastFormat;
244 BOOL shareInterrupt;
245 BOOL rebootRebuild;
246 USHORT timingMode;
247 USHORT spare5;
248 USHORT spare6;
249 SETUP_DEVICE setupDevice[BIGD_MAXDRIVES];
250 } SETUP, *PSETUP;
251
252/************************************************/
253/* RAID Structure Definitions */
254/************************************************/
255typedef struct
256 {
257 UCHAR signature; // 0x55 our mirror signature
258 UCHAR status; // current status bits
259 UCHAR pairIdentifier; // unique identifier for pair
260 ULONG reconstructPoint; // recontruction point for hot reconstruct
261 } DISK_MIRROR;
262
263typedef struct DEVICE_RAID1
264 {
265 long TotalSectors;
266 DISK_MIRROR DiskRaid1;
267 } DEVICE_RAID1, *PDEVICE_RAID1;
268
269#define DISK_MIRROR_POSITION 0x01A8
270#define SIGNATURE 0x55
271
272#define MASK_SERIAL_NUMBER 0x0FFE // mask for serial number matching
273#define MASK_SERIAL_UNIT 0x0001 // mask for unit portion of serial number
274
275// Status bits
276#define UCBF_MIRRORED 0x0010 // drive has a pair
277#define UCBF_MATCHED 0x0020 // drive pair is matched
278#define UCBF_SURVIVOR 0x0040 // this unit is a survivor of a pair
279#define UCBF_REBUILD 0x0080 // rebuild in progress on this device
280
281// SCSI controls for RAID
282#define SC_MY_RAID 0xBF // our special CDB command byte for Win95... interface
283#define MY_SCSI_QUERY1 0x32 // byte 1 subcommand to query driver for RAID 1 informatation
284#define MY_SCSI_REBUILD 0x40 // byte 1 subcommand to reconstruct a mirrored pair
285#define MY_SCSI_DEMOFAIL 0x54 // byte 1 subcommand for RAID failure demonstration
286#define MY_SCSI_ALARMMUTE 0x60 // byte 1 subcommand to mute any alarm currently on
287
288/************************************************/
289/* Timeout konstants */
290/************************************************/
291#define TIMEOUT_READY 100 // 100 mSec
292#define TIMEOUT_DRQ 300 // 300 mSec
293#define TIMEOUT_DATA (3 * HZ) // 3 seconds
294
295/************************************************/
296/* Misc. macros */
297/************************************************/
298#define ANY2SCSI(up, p) \
299((UCHAR *)up)[0] = (((ULONG)(p)) >> 8); \
300((UCHAR *)up)[1] = ((ULONG)(p));
301
302#define SCSI2LONG(up) \
303( (((long)*(((UCHAR *)up))) << 16) \
304+ (((long)(((UCHAR *)up)[1])) << 8) \
305+ ((long)(((UCHAR *)up)[2])) )
306
307#define XANY2SCSI(up, p) \
308((UCHAR *)up)[0] = ((long)(p)) >> 24; \
309((UCHAR *)up)[1] = ((long)(p)) >> 16; \
310((UCHAR *)up)[2] = ((long)(p)) >> 8; \
311((UCHAR *)up)[3] = ((long)(p));
312
313#define XSCSI2LONG(up) \
314( (((long)(((UCHAR *)up)[0])) << 24) \
315+ (((long)(((UCHAR *)up)[1])) << 16) \
316+ (((long)(((UCHAR *)up)[2])) << 8) \
317+ ((long)(((UCHAR *)up)[3])) )
318
319#define SelectSpigot(padapter,spigot) outb_p (spigot, padapter->regStatSel)
320#define WriteCommand(padapter,cmd) outb_p (cmd, padapter->regStatCmd)
321#define AtapiDevice(padapter,b) outb_p (b, padapter->regLba24);
322#define AtapiCountLo(padapter,b) outb_p (b, padapter->regLba8)
323#define AtapiCountHi(padapter,b) outb_p (b, padapter->regLba16)
324
325/************************************************/
326/* SCSI CDB operation codes */
327/************************************************/
328#define SCSIOP_TEST_UNIT_READY 0x00
329#define SCSIOP_REZERO_UNIT 0x01
330#define SCSIOP_REWIND 0x01
331#define SCSIOP_REQUEST_BLOCK_ADDR 0x02
332#define SCSIOP_REQUEST_SENSE 0x03
333#define SCSIOP_FORMAT_UNIT 0x04
334#define SCSIOP_READ_BLOCK_LIMITS 0x05
335#define SCSIOP_REASSIGN_BLOCKS 0x07
336#define SCSIOP_READ6 0x08
337#define SCSIOP_RECEIVE 0x08
338#define SCSIOP_WRITE6 0x0A
339#define SCSIOP_PRINT 0x0A
340#define SCSIOP_SEND 0x0A
341#define SCSIOP_SEEK6 0x0B
342#define SCSIOP_TRACK_SELECT 0x0B
343#define SCSIOP_SLEW_PRINT 0x0B
344#define SCSIOP_SEEK_BLOCK 0x0C
345#define SCSIOP_PARTITION 0x0D
346#define SCSIOP_READ_REVERSE 0x0F
347#define SCSIOP_WRITE_FILEMARKS 0x10
348#define SCSIOP_FLUSH_BUFFER 0x10
349#define SCSIOP_SPACE 0x11
350#define SCSIOP_INQUIRY 0x12
351#define SCSIOP_VERIFY6 0x13
352#define SCSIOP_RECOVER_BUF_DATA 0x14
353#define SCSIOP_MODE_SELECT 0x15
354#define SCSIOP_RESERVE_UNIT 0x16
355#define SCSIOP_RELEASE_UNIT 0x17
356#define SCSIOP_COPY 0x18
357#define SCSIOP_ERASE 0x19
358#define SCSIOP_MODE_SENSE 0x1A
359#define SCSIOP_START_STOP_UNIT 0x1B
360#define SCSIOP_STOP_PRINT 0x1B
361#define SCSIOP_LOAD_UNLOAD 0x1B
362#define SCSIOP_RECEIVE_DIAGNOSTIC 0x1C
363#define SCSIOP_SEND_DIAGNOSTIC 0x1D
364#define SCSIOP_MEDIUM_REMOVAL 0x1E
365#define SCSIOP_READ_CAPACITY 0x25
366#define SCSIOP_READ 0x28
367#define SCSIOP_WRITE 0x2A
368#define SCSIOP_SEEK 0x2B
369#define SCSIOP_LOCATE 0x2B
370#define SCSIOP_WRITE_VERIFY 0x2E
371#define SCSIOP_VERIFY 0x2F
372#define SCSIOP_SEARCH_DATA_HIGH 0x30
373#define SCSIOP_SEARCH_DATA_EQUAL 0x31
374#define SCSIOP_SEARCH_DATA_LOW 0x32
375#define SCSIOP_SET_LIMITS 0x33
376#define SCSIOP_READ_POSITION 0x34
377#define SCSIOP_SYNCHRONIZE_CACHE 0x35
378#define SCSIOP_COMPARE 0x39
379#define SCSIOP_COPY_COMPARE 0x3A
380#define SCSIOP_WRITE_DATA_BUFF 0x3B
381#define SCSIOP_READ_DATA_BUFF 0x3C
382#define SCSIOP_CHANGE_DEFINITION 0x40
383#define SCSIOP_READ_SUB_CHANNEL 0x42
384#define SCSIOP_READ_TOC 0x43
385#define SCSIOP_READ_HEADER 0x44
386#define SCSIOP_PLAY_AUDIO 0x45
387#define SCSIOP_PLAY_AUDIO_MSF 0x47
388#define SCSIOP_PLAY_TRACK_INDEX 0x48
389#define SCSIOP_PLAY_TRACK_RELATIVE 0x49
390#define SCSIOP_PAUSE_RESUME 0x4B
391#define SCSIOP_LOG_SELECT 0x4C
392#define SCSIOP_LOG_SENSE 0x4D
393#define SCSIOP_MODE_SELECT10 0x55
394#define SCSIOP_MODE_SENSE10 0x5A
395#define SCSIOP_LOAD_UNLOAD_SLOT 0xA6
396#define SCSIOP_MECHANISM_STATUS 0xBD
397#define SCSIOP_READ_CD 0xBE
398
399// IDE command definitions
400#define IDE_COMMAND_ATAPI_RESET 0x08
401#define IDE_COMMAND_READ 0x20
402#define IDE_COMMAND_WRITE 0x30
403#define IDE_COMMAND_RECALIBRATE 0x10
404#define IDE_COMMAND_SEEK 0x70
405#define IDE_COMMAND_SET_PARAMETERS 0x91
406#define IDE_COMMAND_VERIFY 0x40
407#define IDE_COMMAND_ATAPI_PACKET 0xA0
408#define IDE_COMMAND_ATAPI_IDENTIFY 0xA1
409#define IDE_CMD_READ_MULTIPLE 0xC4
410#define IDE_CMD_WRITE_MULTIPLE 0xC5
411#define IDE_CMD_SET_MULTIPLE 0xC6
412#define IDE_COMMAND_IDENTIFY 0xEC
413
414// IDE status definitions
415#define IDE_STATUS_ERROR 0x01
416#define IDE_STATUS_INDEX 0x02
417#define IDE_STATUS_CORRECTED_ERROR 0x04
418#define IDE_STATUS_DRQ 0x08
419#define IDE_STATUS_DSC 0x10
420#define IDE_STATUS_WRITE_FAULT 0x20
421#define IDE_STATUS_DRDY 0x40
422#define IDE_STATUS_BUSY 0x80
423
424typedef struct _ATAPI_STATUS
425 {
426 CHAR check :1;
427 CHAR reserved1 :1;
428 CHAR corr :1;
429 CHAR drq :1;
430 CHAR dsc :1;
431 CHAR reserved2 :1;
432 CHAR drdy :1;
433 CHAR bsy :1;
434 } ATAPI_STATUS;
435
436typedef struct _ATAPI_REASON
437 {
438 CHAR cod :1;
439 CHAR io :1;
440 CHAR reserved1 :6;
441 } ATAPI_REASON;
442
443typedef struct _ATAPI_ERROR
444 {
445 CHAR ili :1;
446 CHAR eom :1;
447 CHAR abort :1;
448 CHAR mcr :1;
449 CHAR senseKey :4;
450 } ATAPI_ERROR;
451
452// IDE error definitions
453#define IDE_ERROR_AMNF 0x01
454#define IDE_ERROR_TKONF 0x02
455#define IDE_ERROR_ABRT 0x04
456#define IDE_ERROR_MCR 0x08
457#define IDE_ERROR_IDFN 0x10
458#define IDE_ERROR_MC 0x20
459#define IDE_ERROR_UNC 0x40
460#define IDE_ERROR_BBK 0x80
461
462// SCSI read capacity structure
463typedef struct _READ_CAPACITY_DATA
464 {
465 ULONG blks; /* total blocks (converted to little endian) */
466 ULONG blksiz; /* size of each (converted to little endian) */
467 } READ_CAPACITY_DATA, *PREAD_CAPACITY_DATA;
468
469// SCSI inquiry data
470typedef struct _INQUIRYDATA
471 {
472 UCHAR DeviceType :5;
473 UCHAR DeviceTypeQualifier :3;
474 UCHAR DeviceTypeModifier :7;
475 UCHAR RemovableMedia :1;
476 UCHAR Versions;
477 UCHAR ResponseDataFormat;
478 UCHAR AdditionalLength;
479 UCHAR Reserved[2];
480 UCHAR SoftReset :1;
481 UCHAR CommandQueue :1;
482 UCHAR Reserved2 :1;
483 UCHAR LinkedCommands :1;
484 UCHAR Synchronous :1;
485 UCHAR Wide16Bit :1;
486 UCHAR Wide32Bit :1;
487 UCHAR RelativeAddressing :1;
488 UCHAR VendorId[8];
489 UCHAR ProductId[16];
490 UCHAR ProductRevisionLevel[4];
491 UCHAR VendorSpecific[20];
492 UCHAR Reserved3[40];
493 } INQUIRYDATA, *PINQUIRYDATA;
494
495// IDE IDENTIFY data
496#pragma pack (1)
497typedef struct _IDENTIFY_DATA
498 {
499 USHORT GeneralConfiguration; // 0
500 USHORT NumberOfCylinders; // 1
501 USHORT Reserved1; // 2
502 USHORT NumberOfHeads; // 3
503 USHORT UnformattedBytesPerTrack; // 4
504 USHORT UnformattedBytesPerSector; // 5
505 USHORT SectorsPerTrack; // 6
506 USHORT NumBytesISG; // 7 Byte Len - inter-sector gap
507 USHORT NumBytesSync; // 8 - sync field
508 USHORT NumWordsVUS; // 9 Len - Vendor Unique Info
509 USHORT SerialNumber[10]; // 10
510 USHORT BufferType; // 20
511 USHORT BufferSectorSize; // 21
512 USHORT NumberOfEccBytes; // 22
513 USHORT FirmwareRevision[4]; // 23
514 USHORT ModelNumber[20]; // 27
515 USHORT NumSectorsPerInt :8; // 47 Multiple Mode - Sec/Blk
516 USHORT Reserved2 :8; // 47
517 USHORT DoubleWordMode; // 48 flag for double word mode capable
518 USHORT VendorUnique1 :8; // 49
519 USHORT SupportDMA :1; // 49 DMA supported
520 USHORT SupportLBA :1; // 49 LBA supported
521 USHORT SupportIORDYDisable :1; // 49 IORDY can be disabled
522 USHORT SupportIORDY :1; // 49 IORDY supported
523 USHORT ReservedPsuedoDMA :1; // 49 reserved for pseudo DMA mode support
524 USHORT Reserved3 :3; // 49
525 USHORT Reserved4; // 50
526 USHORT Reserved5 :8; // 51 Transfer Cycle Timing - PIO
527 USHORT PIOCycleTime :8; // 51 Transfer Cycle Timing - PIO
528 USHORT Reserved6 :8; // 52 - DMA
529 USHORT DMACycleTime :8; // 52 - DMA
530 USHORT Valid_54_58 :1; // 53 words 54 - 58 are valid
531 USHORT Valid_64_70 :1; // 53 words 64 - 70 are valid
532 USHORT Reserved7 :14; // 53
533 USHORT LogNumCyl; // 54 Current Translation - Num Cyl
534 USHORT LogNumHeads; // 55 Num Heads
535 USHORT LogSectorsPerTrack; // 56 Sec/Trk
536 ULONG LogTotalSectors; // 57 Total Sec
537 USHORT CurrentNumSecPerInt :8; // 59 current setting for number of sectors per interrupt
538 USHORT ValidNumSecPerInt :1; // 59 Current setting is valid for number of sectors per interrupt
539 USHORT Reserved8 :7; // 59
540 ULONG LBATotalSectors; // 60 LBA Mode - Sectors
541 USHORT DMASWordFlags; // 62
542 USHORT DMAMWordFlags; // 63
543 USHORT AdvancedPIOSupport :8; // 64 Flow control PIO transfer modes supported
544 USHORT Reserved9 :8; // 64
545 USHORT MinMultiDMACycle; // 65 minimum multiword DMA transfer cycle time per word
546 USHORT RecomendDMACycle; // 66 Manufacturer's recommende multiword DMA transfer cycle time
547 USHORT MinPIOCycleWithoutFlow; // 67 Minimum PIO transfer cycle time without flow control
548 USHORT MinPIOCylceWithFlow; // 68 Minimum PIO transfer cycle time with IORDY flow control
549 USHORT ReservedSpace[256-69]; // 69
550 } IDENTIFY_DATA, *PIDENTIFY_DATA;
551
552// ATAPI configuration bits
553typedef struct _ATAPI_GENERAL_0
554 {
555 USHORT CmdPacketSize :2; // Command packet size
556 USHORT Reserved1 :3;
557 USHORT CmdDrqType :2;
558 USHORT Removable :1;
559 USHORT DeviceType :5;
560 USHORT Reserved2 :1;
561 USHORT ProtocolType :2;
562 } ATAPI_GENERAL_0;
563
564#pragma pack ()
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-19 09:33:18 -0500