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diff --git a/drivers/scsi/pm8001/pm8001_sas.h b/drivers/scsi/pm8001/pm8001_sas.h
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1/*
2 * PMC-Sierra SPC 8001 SAS/SATA based host adapters driver
3 *
4 * Copyright (c) 2008-2009 USI Co., Ltd.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions, and the following disclaimer,
12 * without modification.
13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14 * substantially similar to the "NO WARRANTY" disclaimer below
15 * ("Disclaimer") and any redistribution must be conditioned upon
16 * including a substantially similar Disclaimer requirement for further
17 * binary redistribution.
18 * 3. Neither the names of the above-listed copyright holders nor the names
19 * of any contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
21 *
22 * Alternatively, this software may be distributed under the terms of the
23 * GNU General Public License ("GPL") version 2 as published by the Free
24 * Software Foundation.
25 *
26 * NO WARRANTY
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
30 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
31 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
35 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
36 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGES.
38 *
39 */
40
41#ifndef _PM8001_SAS_H_
42#define _PM8001_SAS_H_
43
44#include <linux/kernel.h>
45#include <linux/module.h>
46#include <linux/spinlock.h>
47#include <linux/delay.h>
48#include <linux/types.h>
49#include <linux/ctype.h>
50#include <linux/dma-mapping.h>
51#include <linux/pci.h>
52#include <linux/interrupt.h>
53#include <linux/smp_lock.h>
54#include <scsi/libsas.h>
55#include <scsi/scsi_tcq.h>
56#include <scsi/sas_ata.h>
57#include <asm/atomic.h>
58#include "pm8001_defs.h"
59
60#define DRV_NAME "pm8001"
61#define DRV_VERSION "0.1.36"
62#define PM8001_FAIL_LOGGING 0x01 /* libsas EH function logging */
63#define PM8001_INIT_LOGGING 0x02 /* driver init logging */
64#define PM8001_DISC_LOGGING 0x04 /* discovery layer logging */
65#define PM8001_IO_LOGGING 0x08 /* I/O path logging */
66#define PM8001_EH_LOGGING 0x10 /* Error message logging */
67#define PM8001_IOCTL_LOGGING 0x20 /* IOCTL message logging */
68#define PM8001_MSG_LOGGING 0x40 /* misc message logging */
69#define pm8001_printk(format, arg...) printk(KERN_INFO "%s %d:" format,\
70 __func__, __LINE__, ## arg)
71#define PM8001_CHECK_LOGGING(HBA, LEVEL, CMD) \
72do { \
73 if (unlikely(HBA->logging_level & LEVEL)) \
74 do { \
75 CMD; \
76 } while (0); \
77} while (0);
78
79#define PM8001_EH_DBG(HBA, CMD) \
80 PM8001_CHECK_LOGGING(HBA, PM8001_EH_LOGGING, CMD)
81
82#define PM8001_INIT_DBG(HBA, CMD) \
83 PM8001_CHECK_LOGGING(HBA, PM8001_INIT_LOGGING, CMD)
84
85#define PM8001_DISC_DBG(HBA, CMD) \
86 PM8001_CHECK_LOGGING(HBA, PM8001_DISC_LOGGING, CMD)
87
88#define PM8001_IO_DBG(HBA, CMD) \
89 PM8001_CHECK_LOGGING(HBA, PM8001_IO_LOGGING, CMD)
90
91#define PM8001_FAIL_DBG(HBA, CMD) \
92 PM8001_CHECK_LOGGING(HBA, PM8001_FAIL_LOGGING, CMD)
93
94#define PM8001_IOCTL_DBG(HBA, CMD) \
95 PM8001_CHECK_LOGGING(HBA, PM8001_IOCTL_LOGGING, CMD)
96
97#define PM8001_MSG_DBG(HBA, CMD) \
98 PM8001_CHECK_LOGGING(HBA, PM8001_MSG_LOGGING, CMD)
99
100
101#define PM8001_USE_TASKLET
102#define PM8001_USE_MSIX
103
104
105#define DEV_IS_EXPANDER(type) ((type == EDGE_DEV) || (type == FANOUT_DEV))
106
107#define PM8001_NAME_LENGTH 32/* generic length of strings */
108extern struct list_head hba_list;
109extern const struct pm8001_dispatch pm8001_8001_dispatch;
110
111struct pm8001_hba_info;
112struct pm8001_ccb_info;
113struct pm8001_device;
114struct pm8001_tmf_task;
115struct pm8001_dispatch {
116 char *name;
117 int (*chip_init)(struct pm8001_hba_info *pm8001_ha);
118 int (*chip_soft_rst)(struct pm8001_hba_info *pm8001_ha, u32 signature);
119 void (*chip_rst)(struct pm8001_hba_info *pm8001_ha);
120 int (*chip_ioremap)(struct pm8001_hba_info *pm8001_ha);
121 void (*chip_iounmap)(struct pm8001_hba_info *pm8001_ha);
122 void (*isr)(struct pm8001_hba_info *pm8001_ha);
123 u32 (*is_our_interupt)(struct pm8001_hba_info *pm8001_ha);
124 int (*isr_process_oq)(struct pm8001_hba_info *pm8001_ha);
125 void (*interrupt_enable)(struct pm8001_hba_info *pm8001_ha);
126 void (*interrupt_disable)(struct pm8001_hba_info *pm8001_ha);
127 void (*make_prd)(struct scatterlist *scatter, int nr, void *prd);
128 int (*smp_req)(struct pm8001_hba_info *pm8001_ha,
129 struct pm8001_ccb_info *ccb);
130 int (*ssp_io_req)(struct pm8001_hba_info *pm8001_ha,
131 struct pm8001_ccb_info *ccb);
132 int (*sata_req)(struct pm8001_hba_info *pm8001_ha,
133 struct pm8001_ccb_info *ccb);
134 int (*phy_start_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
135 int (*phy_stop_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
136 int (*reg_dev_req)(struct pm8001_hba_info *pm8001_ha,
137 struct pm8001_device *pm8001_dev, u32 flag);
138 int (*dereg_dev_req)(struct pm8001_hba_info *pm8001_ha, u32 device_id);
139 int (*phy_ctl_req)(struct pm8001_hba_info *pm8001_ha,
140 u32 phy_id, u32 phy_op);
141 int (*task_abort)(struct pm8001_hba_info *pm8001_ha,
142 struct pm8001_device *pm8001_dev, u8 flag, u32 task_tag,
143 u32 cmd_tag);
144 int (*ssp_tm_req)(struct pm8001_hba_info *pm8001_ha,
145 struct pm8001_ccb_info *ccb, struct pm8001_tmf_task *tmf);
146 int (*get_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
147 int (*set_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
148 int (*fw_flash_update_req)(struct pm8001_hba_info *pm8001_ha,
149 void *payload);
150 int (*set_dev_state_req)(struct pm8001_hba_info *pm8001_ha,
151 struct pm8001_device *pm8001_dev, u32 state);
152 int (*sas_diag_start_end_req)(struct pm8001_hba_info *pm8001_ha,
153 u32 state);
154 int (*sas_diag_execute_req)(struct pm8001_hba_info *pm8001_ha,
155 u32 state);
156};
157
158struct pm8001_chip_info {
159 u32 n_phy;
160 const struct pm8001_dispatch *dispatch;
161};
162#define PM8001_CHIP_DISP (pm8001_ha->chip->dispatch)
163
164struct pm8001_port {
165 struct asd_sas_port sas_port;
166};
167
168struct pm8001_phy {
169 struct pm8001_hba_info *pm8001_ha;
170 struct pm8001_port *port;
171 struct asd_sas_phy sas_phy;
172 struct sas_identify identify;
173 struct scsi_device *sdev;
174 u64 dev_sas_addr;
175 u32 phy_type;
176 struct completion *enable_completion;
177 u32 frame_rcvd_size;
178 u8 frame_rcvd[32];
179 u8 phy_attached;
180 u8 phy_state;
181 enum sas_linkrate minimum_linkrate;
182 enum sas_linkrate maximum_linkrate;
183};
184
185struct pm8001_device {
186 enum sas_dev_type dev_type;
187 struct domain_device *sas_device;
188 u32 attached_phy;
189 u32 id;
190 struct completion *dcompletion;
191 struct completion *setds_completion;
192 u32 device_id;
193 u32 running_req;
194};
195
196struct pm8001_prd_imt {
197 __le32 len;
198 __le32 e;
199};
200
201struct pm8001_prd {
202 __le64 addr; /* 64-bit buffer address */
203 struct pm8001_prd_imt im_len; /* 64-bit length */
204} __attribute__ ((packed));
205/*
206 * CCB(Command Control Block)
207 */
208struct pm8001_ccb_info {
209 struct list_head entry;
210 struct sas_task *task;
211 u32 n_elem;
212 u32 ccb_tag;
213 dma_addr_t ccb_dma_handle;
214 struct pm8001_device *device;
215 struct pm8001_prd buf_prd[PM8001_MAX_DMA_SG];
216 struct fw_control_ex *fw_control_context;
217};
218
219struct mpi_mem {
220 void *virt_ptr;
221 dma_addr_t phys_addr;
222 u32 phys_addr_hi;
223 u32 phys_addr_lo;
224 u32 total_len;
225 u32 num_elements;
226 u32 element_size;
227 u32 alignment;
228};
229
230struct mpi_mem_req {
231 /* The number of element in the mpiMemory array */
232 u32 count;
233 /* The array of structures that define memroy regions*/
234 struct mpi_mem region[USI_MAX_MEMCNT];
235};
236
237struct main_cfg_table {
238 u32 signature;
239 u32 interface_rev;
240 u32 firmware_rev;
241 u32 max_out_io;
242 u32 max_sgl;
243 u32 ctrl_cap_flag;
244 u32 gst_offset;
245 u32 inbound_queue_offset;
246 u32 outbound_queue_offset;
247 u32 inbound_q_nppd_hppd;
248 u32 outbound_hw_event_pid0_3;
249 u32 outbound_hw_event_pid4_7;
250 u32 outbound_ncq_event_pid0_3;
251 u32 outbound_ncq_event_pid4_7;
252 u32 outbound_tgt_ITNexus_event_pid0_3;
253 u32 outbound_tgt_ITNexus_event_pid4_7;
254 u32 outbound_tgt_ssp_event_pid0_3;
255 u32 outbound_tgt_ssp_event_pid4_7;
256 u32 outbound_tgt_smp_event_pid0_3;
257 u32 outbound_tgt_smp_event_pid4_7;
258 u32 upper_event_log_addr;
259 u32 lower_event_log_addr;
260 u32 event_log_size;
261 u32 event_log_option;
262 u32 upper_iop_event_log_addr;
263 u32 lower_iop_event_log_addr;
264 u32 iop_event_log_size;
265 u32 iop_event_log_option;
266 u32 fatal_err_interrupt;
267 u32 fatal_err_dump_offset0;
268 u32 fatal_err_dump_length0;
269 u32 fatal_err_dump_offset1;
270 u32 fatal_err_dump_length1;
271 u32 hda_mode_flag;
272 u32 anolog_setup_table_offset;
273};
274struct general_status_table {
275 u32 gst_len_mpistate;
276 u32 iq_freeze_state0;
277 u32 iq_freeze_state1;
278 u32 msgu_tcnt;
279 u32 iop_tcnt;
280 u32 reserved;
281 u32 phy_state[8];
282 u32 reserved1;
283 u32 reserved2;
284 u32 reserved3;
285 u32 recover_err_info[8];
286};
287struct inbound_queue_table {
288 u32 element_pri_size_cnt;
289 u32 upper_base_addr;
290 u32 lower_base_addr;
291 u32 ci_upper_base_addr;
292 u32 ci_lower_base_addr;
293 u32 pi_pci_bar;
294 u32 pi_offset;
295 u32 total_length;
296 void *base_virt;
297 void *ci_virt;
298 u32 reserved;
299 __le32 consumer_index;
300 u32 producer_idx;
301};
302struct outbound_queue_table {
303 u32 element_size_cnt;
304 u32 upper_base_addr;
305 u32 lower_base_addr;
306 void *base_virt;
307 u32 pi_upper_base_addr;
308 u32 pi_lower_base_addr;
309 u32 ci_pci_bar;
310 u32 ci_offset;
311 u32 total_length;
312 void *pi_virt;
313 u32 interrup_vec_cnt_delay;
314 u32 dinterrup_to_pci_offset;
315 __le32 producer_index;
316 u32 consumer_idx;
317};
318struct pm8001_hba_memspace {
319 void __iomem *memvirtaddr;
320 u64 membase;
321 u32 memsize;
322};
323struct pm8001_hba_info {
324 char name[PM8001_NAME_LENGTH];
325 struct list_head list;
326 unsigned long flags;
327 spinlock_t lock;/* host-wide lock */
328 struct pci_dev *pdev;/* our device */
329 struct device *dev;
330 struct pm8001_hba_memspace io_mem[6];
331 struct mpi_mem_req memoryMap;
332 void __iomem *msg_unit_tbl_addr;/*Message Unit Table Addr*/
333 void __iomem *main_cfg_tbl_addr;/*Main Config Table Addr*/
334 void __iomem *general_stat_tbl_addr;/*General Status Table Addr*/
335 void __iomem *inbnd_q_tbl_addr;/*Inbound Queue Config Table Addr*/
336 void __iomem *outbnd_q_tbl_addr;/*Outbound Queue Config Table Addr*/
337 struct main_cfg_table main_cfg_tbl;
338 struct general_status_table gs_tbl;
339 struct inbound_queue_table inbnd_q_tbl[PM8001_MAX_INB_NUM];
340 struct outbound_queue_table outbnd_q_tbl[PM8001_MAX_OUTB_NUM];
341 u8 sas_addr[SAS_ADDR_SIZE];
342 struct sas_ha_struct *sas;/* SCSI/SAS glue */
343 struct Scsi_Host *shost;
344 u32 chip_id;
345 const struct pm8001_chip_info *chip;
346 struct completion *nvmd_completion;
347 int tags_num;
348 unsigned long *tags;
349 struct pm8001_phy phy[PM8001_MAX_PHYS];
350 struct pm8001_port port[PM8001_MAX_PHYS];
351 u32 id;
352 u32 irq;
353 struct pm8001_device *devices;
354 struct pm8001_ccb_info *ccb_info;
355#ifdef PM8001_USE_MSIX
356 struct msix_entry msix_entries[16];/*for msi-x interrupt*/
357 int number_of_intr;/*will be used in remove()*/
358#endif
359#ifdef PM8001_USE_TASKLET
360 struct tasklet_struct tasklet;
361#endif
362 struct list_head wq_list;
363 u32 logging_level;
364 u32 fw_status;
365 const struct firmware *fw_image;
366};
367
368struct pm8001_wq {
369 struct delayed_work work_q;
370 struct pm8001_hba_info *pm8001_ha;
371 void *data;
372 int handler;
373 struct list_head entry;
374};
375
376struct pm8001_fw_image_header {
377 u8 vender_id[8];
378 u8 product_id;
379 u8 hardware_rev;
380 u8 dest_partition;
381 u8 reserved;
382 u8 fw_rev[4];
383 __be32 image_length;
384 __be32 image_crc;
385 __be32 startup_entry;
386} __attribute__((packed, aligned(4)));
387
388/* define task management IU */
389struct pm8001_tmf_task {
390 u8 tmf;
391 u32 tag_of_task_to_be_managed;
392};
393/**
394 * FW Flash Update status values
395 */
396#define FLASH_UPDATE_COMPLETE_PENDING_REBOOT 0x00
397#define FLASH_UPDATE_IN_PROGRESS 0x01
398#define FLASH_UPDATE_HDR_ERR 0x02
399#define FLASH_UPDATE_OFFSET_ERR 0x03
400#define FLASH_UPDATE_CRC_ERR 0x04
401#define FLASH_UPDATE_LENGTH_ERR 0x05
402#define FLASH_UPDATE_HW_ERR 0x06
403#define FLASH_UPDATE_DNLD_NOT_SUPPORTED 0x10
404#define FLASH_UPDATE_DISABLED 0x11
405
406/**
407 * brief param structure for firmware flash update.
408 */
409struct fw_flash_updata_info {
410 u32 cur_image_offset;
411 u32 cur_image_len;
412 u32 total_image_len;
413 struct pm8001_prd sgl;
414};
415
416struct fw_control_info {
417 u32 retcode;/*ret code (status)*/
418 u32 phase;/*ret code phase*/
419 u32 phaseCmplt;/*percent complete for the current
420 update phase */
421 u32 version;/*Hex encoded firmware version number*/
422 u32 offset;/*Used for downloading firmware */
423 u32 len; /*len of buffer*/
424 u32 size;/* Used in OS VPD and Trace get size
425 operations.*/
426 u32 reserved;/* padding required for 64 bit
427 alignment */
428 u8 buffer[1];/* Start of buffer */
429};
430struct fw_control_ex {
431 struct fw_control_info *fw_control;
432 void *buffer;/* keep buffer pointer to be
433 freed when the responce comes*/
434 void *virtAddr;/* keep virtual address of the data */
435 void *usrAddr;/* keep virtual address of the
436 user data */
437 dma_addr_t phys_addr;
438 u32 len; /* len of buffer */
439 void *payload; /* pointer to IOCTL Payload */
440 u8 inProgress;/*if 1 - the IOCTL request is in
441 progress */
442 void *param1;
443 void *param2;
444 void *param3;
445};
446
447/******************** function prototype *********************/
448int pm8001_tag_alloc(struct pm8001_hba_info *pm8001_ha, u32 *tag_out);
449void pm8001_tag_init(struct pm8001_hba_info *pm8001_ha);
450u32 pm8001_get_ncq_tag(struct sas_task *task, u32 *tag);
451void pm8001_ccb_free(struct pm8001_hba_info *pm8001_ha, u32 ccb_idx);
452void pm8001_ccb_task_free(struct pm8001_hba_info *pm8001_ha,
453 struct sas_task *task, struct pm8001_ccb_info *ccb, u32 ccb_idx);
454int pm8001_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
455 void *funcdata);
456int pm8001_slave_alloc(struct scsi_device *scsi_dev);
457int pm8001_slave_configure(struct scsi_device *sdev);
458void pm8001_scan_start(struct Scsi_Host *shost);
459int pm8001_scan_finished(struct Scsi_Host *shost, unsigned long time);
460int pm8001_queue_command(struct sas_task *task, const int num,
461 gfp_t gfp_flags);
462int pm8001_abort_task(struct sas_task *task);
463int pm8001_abort_task_set(struct domain_device *dev, u8 *lun);
464int pm8001_clear_aca(struct domain_device *dev, u8 *lun);
465int pm8001_clear_task_set(struct domain_device *dev, u8 *lun);
466int pm8001_dev_found(struct domain_device *dev);
467void pm8001_dev_gone(struct domain_device *dev);
468int pm8001_lu_reset(struct domain_device *dev, u8 *lun);
469int pm8001_I_T_nexus_reset(struct domain_device *dev);
470int pm8001_query_task(struct sas_task *task);
471int pm8001_mem_alloc(struct pci_dev *pdev, void **virt_addr,
472 dma_addr_t *pphys_addr, u32 *pphys_addr_hi, u32 *pphys_addr_lo,
473 u32 mem_size, u32 align);
474
475
476/* ctl shared API */
477extern struct device_attribute *pm8001_host_attrs[];
478
479#endif
480
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-12 23:44:40 -0500